JP2004199658A5 - - Google Patents

Claims (18)

An input unit for receiving each input signal from a plurality of channels;
A plurality of functional modules, each of which is capable of receiving a signal from the input unit in common, and performing signal processing by a function specific to each of the signals received in a predetermined order;
Module selection / control means for sequentially selecting one or a plurality of the function modules corresponding to each of the plurality of channels and causing the selected function modules to perform signal processing of the input signal;
A digital signal processing apparatus comprising:   The memory means further includes a sequence memory that holds rewritable processing sequence information for designating the one or more functional modules to be selected corresponding to each channel. The digital signal processing apparatus according to claim 1.   2. The digital memory according to claim 1, further comprising a memory unit, wherein the memory unit includes a parameter memory that rewrites and retains parameter information for modifying the content of the signal processing in each functional module. Signal processing device.   The digital signal processing apparatus according to claim 1, further comprising a channel order memory that holds processing order information of each signal to be subjected to the signal processing.   The module selection / control means selects the functional module to be selected for each channel according to a specified series of processing sequences, and when a new interrupt input signal is generated as the input signal, the module selection / control means is specified. 2. The digital signal processing apparatus according to claim 1, wherein an interrupt processing sequence is inserted into the series of processing sequences.   A shared bus that connects at least the input unit, the functional module, and the module selection / control unit, and the shared bus is a plurality of individual buses separated for each data type handled in the signal processing The digital signal processing apparatus according to claim 1, comprising:   A shared bus that connects at least the input unit, the functional module, and the module selection / control unit; and the shared bus transfers a plurality of types of data handled in the signal processing in a time-sharing manner The digital signal processing apparatus according to claim 1, comprising a single bus.   An output unit that transmits the processing result of the signal processing to the outside; and the output unit includes an ID indicating a processing result for the input signal from which of the plurality of channels, the ID The digital signal processing apparatus according to claim 1, wherein the digital signal processing apparatus further transmits the processed result data.   An output unit configured to transmit the processing result of the signal processing to the outside; and the output unit sequentially transmits the processing result for each of the input signals of the plurality of channels according to a transmission order assigned to each of the channels. The digital signal processing apparatus according to claim 1.   A shared bus connecting at least the plurality of functional modules is provided, and when the plurality of functional modules are defined as an active function module group, a spare function module group that forms a mirror with the active function module group is provided via the shared bus. 2. When one of the function modules in the active function module group is determined to be faulty, the corresponding function module in the spare function module group is selected and used. The digital signal processing device according to 1.   A shared bus connecting at least the plurality of functional modules is provided, and when the plurality of functional modules are defined as an active function module group, a spare function module group that forms a mirror with the active function module group is provided via the shared bus. 2. The digital signal processing device according to claim 1, wherein, when it is determined that there is a failure in any of the function modules in the active function module group, the digital signal processing apparatus is used by switching to the spare function module group. .   The digital signal processing device according to claim 1, wherein a communication interface capable of transmitting and receiving the processing result of the signal processing is provided, and a plurality of digital signal processing devices similar to the digital signal processing device are provided, and each of the communication A digital signal processing system characterized in that these are cascade-connected through an interface.   The digital signal processing device according to claim 1, wherein a communication interface capable of transmitting and receiving the processing result of the signal processing is provided, and a plurality of digital signal processing devices similar to the digital signal processing device are provided. The master digital signal processing device and the others are slave digital signal processing devices, and these are star-connected with the master digital signal processing device as a center through the respective communication interfaces. Digital signal processing system. In a digital signal processing device including at least an input unit and a plurality of functional modules,
Each of the plurality of functional modules has a unique signal processing function,
A digital signal processing method, wherein an input signal for each of a plurality of channels input to the input unit is provided to one or a plurality of the functional modules selected corresponding to each channel to perform signal processing. A host device that receives data of a processing result by the signal processing transmitted from the digital signal processing device according to claim 1,
A host device characterized in that when there is an abnormality in the data of the processing result, the default value stored in advance is used instead of discarding the data. A host device that receives data of a processing result by the signal processing transmitted from the digital signal processing device according to claim 1,
When it is determined that there is an abnormality in the data of the processing result, the signal processing that caused the abnormal data is identified, and this identification information is returned to the digital signal processing device to correspond to the identified signal processing A host device characterized in that a default value held in advance is used. A host device that receives data of a processing result by the signal processing transmitted from the digital signal processing device according to claim 1,
When the ID indicating the functional module that has generated each processing result is received by adding to each processing result data and transmitted from the digital signal processing device, and when it is determined that the functional module has a failure, A host device characterized in that an ID of a functional module is transmitted to the digital signal processing device to identify the failure location. A host device that receives data of a processing result by the signal processing transmitted from the digital signal processing device according to claim 1,
Processing sequence information for designating the one or a plurality of functional modules to be selected corresponding to each channel is transmitted to the digital signal processing device, and further, predetermined data is transmitted to execute the processing sequence. A host device characterized in that the processing result data is received from the digital signal processing device and compared with a predetermined expected value to determine the normality of the read processing sequence information.