CN109638151A - Storage unit, cryogenic memory and its reading/writing method - Google Patents

Storage unit, cryogenic memory and its reading/writing method Download PDF

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Publication number
CN109638151A
CN109638151A CN201811473848.0A CN201811473848A CN109638151A CN 109638151 A CN109638151 A CN 109638151A CN 201811473848 A CN201811473848 A CN 201811473848A CN 109638151 A CN109638151 A CN 109638151A
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layer
superconduction
storage unit
memory device
magnetic memory
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CN109638151B (en
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郎莉莉
叶力
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Shanghai Institute of Microsystem and Information Technology of CAS
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Shanghai Institute of Microsystem and Information Technology of CAS
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/80Constructional details
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1673Reading or sensing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1675Writing or programming circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/44Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using super-conductive elements, e.g. cryotron
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B61/00Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/10Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having two electrodes, e.g. diodes or MIM elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/10Magnetoresistive devices

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Hall/Mr Elements (AREA)
  • Semiconductor Memories (AREA)

Abstract

The present invention provides a kind of storage unit, cryogenic memory and its reading/writing method, it include: magnetic memory device, first and second superconductive device being arranged in parallel under superconduction top electrode and superconduction between electrode, magnetic memory device is between the first, second superconductive device;The spin current generating layer of magnetic memory device runs through electrode (or superconduction top electrode) under superconduction, and spin current generating layer upper surface (or lower surface) neighbour's free layer on thickness and width direction.Multiple storage units arrange to form array, and electrode is connected under the superconduction top electrode of two neighboring storage unit or superconduction, and to realize the series connection of each row or each array storage unit, electrode is as superconduction bit line under superconduction top electrode and superconduction;A superconduction wordline is correspondingly arranged above or below each superconductive device.SOT-MRAM storage unit is completely embedded into superconduction integrated logic circuit composition low temperature magnetic memory by the present invention, to realize information in limit low temperature, high speed, low-power consumption storage, caching and main memory suitable for superconducting computer.

Description

Storage unit, cryogenic memory and its reading/writing method
Technical field
The present invention relates to integrated circuit memory fields, more particularly to a kind of storage unit, cryogenic memory and its reading Write method.
Background technique
Magnetic RAM (Magnetic Random Access Memory, MRAM) is used as one kind is novel to deposit Storage technology has the high speed random read-write comparable with SRAM/DRAM, good fatigue performance and low write power, also simultaneous It is standby identical with Flash flash memory non-volatile.In addition, MRAM economy is also considerable.Thus, the development of MRAM is by science Boundary and industrial circle are attracted attention.Currently, MRAM is embedded in mostly in CMOS logic processing procedure, it is mainly directed towards consumer electronics, artificial intelligence, vapour The fields such as vehicle electronics, Internet of Things, industrial automation, space flight and aviation.In above-mentioned application, the preparation process of mram memory cell, The development comparatively perfect of read/write circuit design, chip batch production etc., and the operation temperature area of MRAM is generally not less than Room temperature.But how to search out and still protected under limit low temperature still in development phase about application of the MRAM under limit low temperature The read/write circuit holding the magnetic cell of superior electrical performance and being consistent with limit low temperature becomes the above-mentioned low temperature based on MRAM The emphasis of memory research and development.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of storage unit, low temperature to store Device and its reading/writing method, for solving in the prior art in limit low temperature magnetic memory cisco unity malfunction and energy consumption height etc. Problem.
In order to achieve the above objects and other related objects, the present invention provides a kind of storage unit, and the storage unit is at least Include:
The magnetic memory device that is connected in parallel by superconduction top electrode with electrode under superconduction, the first superconductive device and the second surpass Device is led, the magnetic memory device is between first superconductive device and second superconductive device;
Wherein, the spin current generating layer of the magnetic memory device runs through the superconduction on thickness direction and width direction Electrode under top electrode or the superconduction, and spin current generating layer is disposed adjacent with free layer in the magnetic memory device.
Optionally, the magnetic memory device include the spin current generating layer being sequentially stacked from bottom to up, it is free layer, non-magnetic Material layer, reference layer, pinning layer, coating, and it is set to the permanent magnet at left and right sides of the free layer;Wherein, it is described from Eddy flow generating layer includes the thick films such as single layer.
Optionally, the magnetic memory device include the spin current generating layer being sequentially stacked from bottom to up, it is free layer, non-magnetic Material layer, reference layer, pinning layer and coating;Wherein, the spin current generating layer includes single layer wedge film.
Optionally, the magnetic memory device include the spin current generating layer being sequentially stacked from bottom to up, it is free layer, non-magnetic Material layer, reference layer, pinning layer and coating;Wherein, the spin current generating layer is including the first film layer and between described first The second film layer between film layer and the free layer, the symbol phase of first film layer and the spin Hall angle of second film layer Instead, first film layer and second film layer include waiting thick films.
Optionally, the magnetic memory device include the spin current generating layer being sequentially stacked from bottom to up, it is free layer, non-magnetic Material layer, reference layer, pinning layer and coating;Wherein, the spin current generating layer is including the first film layer and between described first The second film layer between film layer and the free layer, the symbol phase of first film layer and the spin Hall angle of second film layer Instead, first film layer includes waiting thick films, and second film layer includes wedge film.
Optionally, the magnetic memory device include the buffer layer being sequentially stacked from bottom to up, it is pinning layer, reference layer, non- Flux material layer, free layer, spin current generating layer, and it is set to the permanent magnet at left and right sides of the free layer.
Optionally, the magnetic memory device include the buffer layer being sequentially stacked from bottom to up, it is pinning layer, reference layer, non- Flux material layer, free layer, spin current generating layer, wherein the spin current generating layer includes single layer wedge film.
Optionally, the magnetic memory device include the buffer layer being sequentially stacked from bottom to up, it is pinning layer, reference layer, non- Flux material layer, free layer, spin current generating layer, wherein the spin current generating layer is including the first film layer and between described first The second film layer between film layer and the free layer, the symbol phase of first film layer and the spin Hall angle of second film layer Instead, first film layer and second film layer include waiting thick films.
Optionally, the magnetic memory device include the buffer layer being sequentially stacked from bottom to up, it is pinning layer, reference layer, non- Flux material layer, free layer, spin current generating layer, wherein the spin current generating layer is including the first film layer and between described first The second film layer between film layer and the free layer, the symbol phase of first film layer and the spin Hall angle of second film layer Instead, first film layer includes waiting thick films, and second film layer includes wedge film.
More optionally, the material of the spin current generating layer include Ta, W, Mo, Pt, Pd, Ir, Ru, Nb, FeMn, IrMn, PdMn、PtMn、Bi2Se3、(Bi0.5Sb0.5)2Te3Or BixSe1-x, wherein x is the real number between 0 and 1.
More optionally, the free layer and the reference layer includes single layer ferromagnetic thin film, or at least two layers of ferromagnetic thin film With the laminated construction of non-magnetic space layer.
More optionally, the material of the ferromagnetic thin film include Co, Fe, Ni, Mn, Rh, Pd, Pt, Gd, Tb, Dy, Ho, Al, One or more of Si, Ga, Ge and B combination.
More optionally, the material of the non-magnetic space layer includes Cr, Cu, Mo, Ru, Pd, Hf, Ta, W, Tb, Ir or Pt.
More optionally, the material of the nonmagnetic material layer includes MgO or AlOy, wherein y is real number.
More optionally, the material of the nonmagnetic material layer includes Cu, Ag or Au.
More optionally, the material of the coating includes Ru, Ta, W, Ti, TiN or TaN.
More optionally, the material of the buffer layer includes Ru, Ta, W, TaN, SiN, TiN, Ti, Zn or Mg.
Optionally, first superconductive device includes traditional Josephson junction, superconducting nano bridge knot, n-Tron type superconduction material Material or high temperature superconducting materia, second superconductive device include traditional Josephson junction, superconducting nano bridge knot, n-Tron type superconduction Material or high temperature superconducting materia
More optionally, traditional Josephson junction includes the first superconducting material being sequentially stacked, insulating layer and second Superconducting material.
More optionally, the material of first superconducting material includes Nb, NbN, NbTi, NbTiN and Nb3In Sn at least The material of one kind, second superconducting material includes Nb, NbN, NbTi, NbTiN and Nb3At least one of Sn.
More optionally, the material of the insulating layer includes MgO, Si3N4、Al2O3And SiO2At least one of.
More optionally, the resistance of first superconductive device and second superconductive device in its non-superconducting state is Ten times or more of the resistance of the magnetic memory device.
More optionally, the material of each superconducting electrode includes Nb, NbN, NbTi, NbTiN and Nb3At least one of Sn.
In order to achieve the above objects and other related objects, the present invention provides a kind of cryogenic memory, the cryogenic memory It includes at least:
Multiple said memory cells arrange to form array, and two neighboring storage unit is super in each row or each array storage unit Electrode is led under top electrode or superconduction to be connected, to realize the series connection of each row or each array storage unit, the superconduction top electrode with it is described Electrode is as superconduction bit line under superconduction;
It is correspondingly arranged a superconduction wordline above or below each superconductive device, is deposited between each superconduction wordline and each storage unit In spacing.
Optionally, each superconduction wordline is vertically arranged in horizontal plane with superconduction bit line, and is not attached to.
Optionally, the material of the superconduction bit line includes Nb, NbN, NbTi, NbTiN and Nb3At least one of Sn, institute The material for stating superconduction wordline includes Nb, NbN, NbTi, NbTiN and Nb3At least one of Sn.
In order to achieve the above objects and other related objects, the present invention provides the write operation method of above-mentioned cryogenic memory, institute Write operation method is stated to include at least:
Corresponding superconduction bit line and superconduction wordline is selected to be powered based on address decoding, not selected magnetic memory device It is short-circuited, electric current flows through the spin current generating layer of selected magnetic memory device based on the superconduction bit line, and data are write Enter in corresponding magnetic memory device.
In order to achieve the above objects and other related objects, the present invention provides the read operation method of above-mentioned cryogenic memory, institute Read operation method is stated to include at least:
Corresponding superconduction bit line and superconduction wordline is selected to be powered based on address decoding, not selected magnetic memory device It is short-circuited, electric current flows through each layer of selected magnetic memory device based on the superconduction bit line, obtains on the superconduction bit line Resistance, and then read the data of selected magnetic memory device.
As described above, storage unit of the invention, cryogenic memory and its reading/writing method, have the advantages that
Storage unit, cryogenic memory and its reading/writing method of the invention is based on SOT writing mode, including a series of magnetism Memory device and superconductive device, constitute the storage array of multirow or multiple row, and the basic unit of each storage array is set by parallel connection The magnetic memory device and two superconductive devices set form, by electric under superconduction top electrode and superconduction between each basic unit Pole alternately connects.The upper surface of magnetic memory device and superconductive device be equipped with superconduction top electrode, the magnetic memory device from Eddy flow generating layer is embedded in electrode under superconduction, and magnetism described in the spin current generating layer upper surface neighbour of the magnetic memory device is deposited The free layer of memory device, and right above each superconductive device or it is arranged right below superconduction wordline.In addition, the magnetic storage The spin current generating layer of part is also embeddable in superconduction top electrode, and the spin current generating layer lower surface of the magnetic memory device The free layer of magnetic memory device described in neighbour.Wherein, except magnetic memory device both sides be arranged permanent magnet in addition to, also based on tradition Magnetic memory device construct structural symmetry and break nullisomic system, the double-layer heavy metal system of spin current competition or based on above-mentioned two The compound system of kind system, realizes the field-free overturning of SOT.Magnetic memory device is integrated in superconducting logic by memory of the invention In circuit, it is not necessarily to CMOS logic circuit, and can be in lower electricity by the periphery read-write of superconducting logic unit making and control circuit Work is depressed, to realize ultralow temperature, high speed, low-power consumption storage, caching and main memory suitable for superconducting computer.
Detailed description of the invention
The direction of magnetization that Fig. 1 is shown as the basic stored bits unit of magnetic RAM is parallel to material interface Schematic diagram.
The direction of magnetization that Fig. 2 is shown as the basic stored bits unit of magnetic RAM is flat perpendicular to material circle The schematic diagram in face.
Fig. 3 is shown as a kind of structural schematic diagram of magnetic memory device.
Fig. 4 is shown as another structural schematic diagram of magnetic memory device.
Fig. 5 is shown as the structural schematic diagram of cryogenic memory of the invention.
Fig. 6 is shown as the structural schematic diagram of storage unit of the invention.
Fig. 7 is shown as the first structural schematic diagram of magnetic memory device of the invention.
Fig. 8 is shown as the structural schematic diagram of traditional Josephson junction of the invention.
Fig. 9 is shown as the write operation schematic illustration of cryogenic memory of the invention.
Figure 10 is shown as the read operation schematic illustration of cryogenic memory of the invention.
Figure 11 is shown as second of structural schematic diagram of magnetic memory device of the invention.
Figure 12 is shown as the third structural schematic diagram of magnetic memory device of the invention.
Figure 13 is shown as the 4th kind of structural schematic diagram of magnetic memory device of the invention.
Component label instructions
1 stored bits unit
11 free layers
12 nonmagnetic insulating layers or nonmagnetic metal layer
13 reference layers
14 spin current generating layers
2 cryogenic memories
21 storage units
211a superconduction top electrode
Electrode under 211b superconduction
212 magnetic memory devices
212a spin current generating layer
212b free layer
212c nonmagnetic material layer
212d reference layer
212e pinning layer
212f coating
212g permanent magnet
213 first superconductive devices
213 ' traditional Josephson junctions
The first superconducting material of 213a '
213b ' insulating layer
The second superconducting material of 213c '
214 second superconductive devices
22 superconduction bit lines
The superconduction wordline of 231a~234b first~the 8th
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from Various modifications or alterations are carried out under spirit of the invention.
Please refer to Fig. 1~Figure 13.It should be noted that diagram provided in the present embodiment only illustrates this in a schematic way The basic conception of invention, only shown in schema then with related component in the present invention rather than package count when according to actual implementation Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its Assembly layout kenel may also be increasingly complex.
The basic stored bits unit 1 of common MRAM include magnetic tunnel-junction (Magnetic Tunnel Junction, MTJ) and Spin Valve (Spin Valve) device, core group become one layer of ultra-thin nonmagnetic insulating layer of insertion in two ferromagnetic layers Or nonmagnetic metal layer material.As shown in FIG. 1 to FIG. 2, bottom ferromagnetic layer magnetic moment direction is variable, referred to as free layer 11;Top layer is ferromagnetic Layer magnetic moment direction is fixed, referred to as reference layer 13;Middle layer be nonmagnetic insulating layer or nonmagnetic metal layer 12 (free layer 11 with The upper and lower position of the reference layer 13 is interchangeable).When the free layer 11 is consistent with the magnetic moment direction of the reference layer 13, magnetic Low resistance state is presented in the resistance of tunnel knot or Spin Valve device, can indicate logic state " 0 ";When the free layer 11 and reference layer 13 Magnetic moment direction it is opposite when, high-impedance state is presented in the resistance of magnetic tunnel-junction or Spin Valve device, can indicate logic state " 1 ".As it can be seen that MRAM storing process mainly regulates and controls resistance state locating for magnetic tunnel-junction or Spin Valve device by changing ferromagnetic layer magnetic moment direction Represent different logic states.As shown in FIG. 1 to FIG. 2, mram memory cell can have different magnetic anisotropy, be divided into face Magnetic anisotropy and perpendicular magnetic anisotropic.
MRAM writing process mainly passes through current induced free layer Magnetic moment reversal, and concrete principle involved in the process can divide It is following three kinds: (1) cuts down your law than Ao-Sa;(2) spin-torque (Spin transfer torque, STT);(3) spin rail Road square (Spin orbit torque, SOT).As shown in figure 3, electric current is run through and is passed through when spin-torque mode carries out write operation Magnetic memory device applies electric current to port 1 and port 2, STT effect will act on free layer magnetic moment, when electric current reaches certain When one critical current, it will lead to free layer magnetic moment and be flipped, and then realize the write-in of data;Only when free layer magnetic moment direction When not conllinear with reference layer magnetic moment direction, free layer magnetic moment just will receive STT, and the moment loading will become as angle increases By force.When carrying out read operation, it equally need to apply a Weak current to port 1 and port 2, obtain the resistance value of magnetic memory device. As shown in figure 4, when spin(-)orbit square mode carries out write operation, to applying in 14 face of spin current generating layer in magnetic memory device Electric current applies electric current to port 2 and port 3, due to the effect of Quantum geometrical phase, spin current will result from the spin current Generating layer 14, direction along film surface normal;When impressed current is continuously increased, more spins for carrying energy and angular momentum The spin current generating layer 14 is born in miscarriage, and is flowed into the free layer 11, makes free layer magnetic moment in SOT and auxiliary magnetic field It is flipped under effect, realizes the write operation of " 0 " and " 1 ".It, need to be small to port 1 and the application of port 3 one when carrying out read operation Electric current measures the resistance of magnetic memory device.
It can be seen from the above, the read-write current path of SOT is separated from each other, non-interference compared to STT.Also, utilize SOT When write-in, it is not necessary that through entire magnetic memory device, barrier layer service life can be effectively increased and reduces device quilt electric current The probability of breakdown.In addition, if the magnetic moment direction of reference layer 13 and free layer 11 is strictly along film normal direction, when giving device After being passed through electric current, as long as theoretically there is spin current to be flowed into free layer, SOT can still exist, and STT will be completely disappeared.Also with regard to table Show, when MRAM is in limit low operating temperatures, thermal excitation effect very little or can be ignored, and the perpendicular magnetic of free layer 11 respectively to In the case that the opposite sex is enhanced compared to room temperature, the difficulty using STT overturning free layer magnetic moment will become increasing, and The writing mode of SOT can exactly make up above-mentioned limitation, thus, SOT-MRAM is applied to superconducting integrated circuit by the present invention In, form Novel ultralow-temperature magnetic memory, can further expansion MRAM operation temperature area to limit low temperature (4.2K), and guarantee MRAM still achievable information storage at lower voltages, is expected to play an important role in the application of superconducting computer.
Embodiment one
As shown in figure 5, the present embodiment provides a kind of cryogenic memory 2, the cryogenic memory 2 includes:
Storage unit 21, superconduction bit line 22 (read or write bit line) and superconduction wordline (word line).
As shown in figure 5, multiple arrangements of the storage unit 21 form array.
Specifically, multiple storage units 21 arrange form array structure in length and breadth, for the ease of illustration, only show in Fig. 5 Show a line (or column), multirow (or column) storage unit 21 longitudinal (transverse direction) arrangement forms array, will not repeat them here.
Specifically, as shown in fig. 6, the storage unit 21 includes being connected in parallel in electricity under superconduction top electrode 211a and superconduction Magnetic memory device 212, the first superconductive device 213 and the second superconductive device 214 between the 211b of pole, the magnetic memory device 212 between first superconductive device 213 and second superconductive device 214.In the present embodiment, first superconduction Device 213 and second superconductive device 214 are located at the left and right sides of the magnetic memory device 212, and the magnetism is deposited Each material layer is cascading in memory device 212, first superconductive device 213 and second superconductive device 214, and Each material layer level is laid with, in parallel with electrode 211b realization under the superconduction by the superconduction top electrode 211a.The magnetism The spin current generating layer of memory device 212 is embedded under the superconduction in electrode 211b.
It should be noted that the spin current generating layer of the magnetic memory device 212 in the direction thickness H and the width side W Electrode 211b under the superconduction is extended upward through, that is, electrode 211b under the superconduction is truncated, electric current passes through the magnetic memory device The spin current generating layer of the magnetic memory device 212 is had to flow through when 212 lower section.
More specifically, as shown in fig. 7, the magnetic memory device 212 include be sequentially stacked spin current generating layer 212a, Free layer 212b, nonmagnetic material layer 212c, reference layer 212d, pinning layer 212e, coating 212f and permanent magnet 212g.? In the present embodiment, each material layer is successively stacked from bottom to up, and each material layer is equal thick films.The permanent magnet 212g is set to The left and right sides of the free layer 212b assists the magnetic moment of the free layer 212b to be flipped for providing an additional field.
It should be noted that each material layer may be configured as film thickness not equal film, it is not limited to this embodiment.
Wherein, the spin current generating layer 212a is located at bottom, is the uniform film of single layer, and thickness can be set as needed, In the present embodiment, the thickness of the spin current generating layer 212a is set as 1.0nm~4.0nm, step size settings 0.5nm.Institute The material for stating spin current generating layer 212a includes but is not limited to big antiferromagnetic of the big heavy metal of Hall angle, spin Hall angle of spinning The topological insulating materials of material and spin Hall angle greatly.Wherein, the big heavy metal of spin Hall angle include but is not limited to Ta, W, Mo, Pt, Pd, Ir, Ru and Nb;The big antiferromagnet of Hall angle that spins includes but is not limited to FeMn, IrMn, PdMn and PtMn; The big topological insulating materials of Hall angle that spins includes but is not limited to Bi2Se3、(Bi0.5Sb0.5)2Te3And BixSe1-x, x is between 0 He Real number between 1.
Wherein, the free layer 212b is located at the upper layer of the spin current generating layer 212a.In a kind of reality of the present embodiment In existing mode, the free layer 212b is the uniform ferromagnetic thin film of single layer, and the thickness of the free layer 212b is set as being no more than 2.5nm, the material of the ferromagnetic thin film include but is not limited to Co, Fe, Ni, Mn, Rh, Pd, Pt, Gd, Tb, Dy, Ho, Al, Si, One or more of Ga, Ge and B combination, the preferably pure metals of Co, Fe or Ni, Co, Fe, Ni and Mn, Rh, Pd, Pt, At least two alloy material in Gd, Tb, Dy, Ho, B, Al, Si, Ga, Ge, B.More preferably CoFeB, CoNi, CoTb, FePt, CoFezMn1-zSi、Co2MnGe、Co2One of MnSi, CoFeAl or CoFeSi, wherein z is the real number between 0 and 1. In another implementation of the present embodiment, the free layer 212b includes at least two layers of ferromagnetic thin film and non-magnetic space layer Laminated construction, the ferromagnetic thin film are in ferromagnetic coupling or antiferromagnetic coupling, and the material of the non-magnetic space layer includes but not It is limited to the conductive metallic materials such as Cr, Cu, Mo, Ru, Pd, Hf, Ta, W, Tb, Ir and Pt, the free layer 212b is preferably [Co/ Pt]n、[Co/Pd]n、Pt/[Co/Ni]n、[Co/Tb]n、[CoFe/Pt]n、[Fe/Cr]nLaminated construction, wherein n be greater than 1 Natural number, the overall thickness of the free layer 212b are set as being no more than 2.5nm.
Wherein, the nonmagnetic material layer 212c is located at the upper layer of the free layer 212b.In a kind of realization of the present embodiment In mode, the magnetic memory device 212 is magnetic tunnel device, and the nonmagnetic material layer 212c is barrier layer, thickness setting For 0.5nm~2.5nm, the material of the nonmagnetic material layer 212c includes but is not limited to MgO and AlOyEqual metal oxide materials, Wherein, y is real number, and when y is set as 3/2, the material of the nonmagnetic material layer 212c is Al2O3.In the another kind of the present embodiment In implementation, the magnetic memory device 212 is Spin Valve device, and the nonmagnetic material layer 212c is space layer, and thickness is set It is set to and is no more than 5nm, the material of the nonmagnetic material layer 212c includes but is not limited to the conductive metallic materials such as Cu, Ag and Au.
Wherein, the reference layer 212d is located at the upper layer of the nonmagnetic material layer 212c.In a kind of realization of the present embodiment In mode, the reference layer 212d is the strong uniform ferromagnetic thin film of single layer of magnetic anisotropy, the material packet of the reference layer 212d Combination one or more of is included but is not limited to Co, Fe, Ni, Mn, Rh, Pd, Pt, Gd, Tb, Dy, Ho, Al, Si, Ga, Ge and B, The preferably pure metals of Co, Fe or Ni, in Co, Fe, Ni and Mn, Rh, Pd, Pt, Gd, Tb, Dy, Ho, B, Al, Si, Ga, Ge, B At least two alloy material.More preferably CoFeB, CoNi, CoTb, FePt, CoFezMn1-zSi、Co2MnGe、Co2MnSi、 One of CoFeAl or CoFeSi, wherein z is the real number between 0 and 1.In another implementation of the present embodiment In, the reference layer 212d includes the laminated construction of at least two layers ferromagnetic thin film and non-magnetic space layer, and the ferromagnetic thin film is in iron Magnetic coupling or antiferromagnetic coupling, material include but is not limited to Co, Fe, Ni, Mn, Rh, Pd, Pt, Gd, Tb, Dy, Ho, B, Al, The alloy material of Si, Ga, Ge and above two or two or more metal composition;The material of the non-magnetic space layer includes but not It is limited to the conductive metallic materials such as Cr, Cu, Mo, Ru, Pd, Hf, Ta, W, Tb, Ir and Pt.The reference layer 212d is preferably [Co/ Pt]n、[Co/Pd]n、Pt/[Co/Ni]n、[Co/Tb]n、[CoFe/Pt]n、[Fe/Cr]nLaminated construction, wherein n be greater than 1 Natural number.
Wherein, the pinning layer 212e is located at the upper layer of the reference layer 212d.
Wherein, the coating 212f is located at the upper layer of the pinning layer 212e, and connects with the superconduction top electrode 211a It connects;The material of the coating 212f but it is not limited to Ru, Ta, W, Ti, TiN and TaN.
It should be noted that the magnetic memory device 212 can be inverted, so that the spin of the magnetic memory device 212 The generating layer 212a that miscarries is embedded in the superconduction top electrode 211a, at this point, the coating 212f is defined as buffer layer.The covering Layer is for protecting each film layer structure below;The buffer layer helps to deposit to form each film layer structure on its surface, described The material of buffer layer includes but is not limited to Ru, Ta, W, TaN, SiN, TiN, Ti, Zn and Mg;Other film layer structures and material are identical, It will not repeat them here.
It should be noted that in the present embodiment, the shape of the magnetic memory device 212 is cylinder, in practical application In, the shape of the magnetic memory device 212 includes but is not limited to any one of cylindroid, cuboid and square.At this In embodiment, the size of the magnetic memory device 212 is in nanometer scale, in practical applications, magnetism can be set as needed The size of memory device 212, will not repeat them here.The magnetic anisotropy of the magnetic memory device 212 include in face magnetic it is each One of anisotropy or perpendicular magnetic anisotropic do not limit one by one herein.
It should be noted that the multilayer membrane preparation method of the magnetic memory device 212 includes but is not limited to direct current or penetrates The physical gas-phase deposite methods preparations such as frequency magnetron sputtering, molecular beam epitaxy, pulse laser deposition;Pass through electricity after completing film layer preparation The mode that beamlet photoetching is combined with reactive ion beam etching (RIBE) (or ion beam etching), the magnetism for obtaining different shape or size are deposited Memory device.
Specifically, first superconductive device 213 and second superconductive device 214 are located at the magnetic storage The two sides of part 411, first superconductive device 213, second superconductive device 214 and the magnetic memory device 212 are arranged side by side Setting.First superconductive device 213 includes but is not limited to traditional Josephson junction, superconducting nano bridge knot, n-Tron type superconduction Material, high temperature superconducting materia etc..As shown in figure 8, in the present embodiment, selecting traditional Josephson junction, the tradition Joseph Gloomy knot 213 ' includes the first superconducting material 213a ', insulating layer 213b ' and the second superconducting material being sequentially stacked from bottom to up 213c’。
Wherein, the material of the first superconducting material 213a ' and the second superconducting material 213c ' include but unlimited In Nb, NbN, NbTi, NbTiN and Nb3Sn, any superconductor are suitable for the present invention.The material packet of the insulating layer 213b ' It includes but is not limited to MgO, Si3N4、Al2O3And SiO2
The structure of second superconductive device 214, material are identical as first superconductive device 213, herein not one by one It repeats.
It should be noted that first superconductive device 213 and second superconductive device 214 are in its non-superconducting state The resistance of (normal state) is much larger than the resistance of the magnetic memory device 212, is set as five times in the present embodiment More than, preferably ten times or more, specific multiple can be set according to actual needs, can read in the magnetic memory device 212 Subject to the data of storage, it is not limited to this embodiment.First superconductive device 213 and second superconductive device 214 are super The resistance led under state is substantially zeroed, much smaller than the resistance of spin current generating layer 212a in the magnetic memory device 212 Resistance value is set to be lower than 1 percent in the present embodiment, and specific multiple can be set according to actual needs, not be with the present embodiment Limit.
As shown in figure 5, electrode under the superconduction top electrode 211a of two neighboring storage unit 21 or superconduction in each row or each column 211b is connected, to realize the series connection of each row or each array storage unit, the superconduction top electrode 211a and electrode under the superconduction 211b is as superconduction bit line 22.
Specifically, in the present embodiment, each line storage unit 21 is connected by the superconduction bit line 22, each storage unit 21 Superconduction top electrode 211a be connected with the superconduction top electrode 211a of the storage unit 21 of adjacent side, the superconduction of each storage unit 21 Lower electrode 211b is connected with electrode 211b under the superconduction of the storage unit 21 of the adjacent other side, and then realizes each storage unit 21 Series connection.The material of the superconduction bit line includes but is not limited to Nb, NbN, NbTi, NbTiN and Nb3Sn。
As shown in figure 5, a superconduction wordline is correspondingly arranged above or below each superconductive device, each superconduction wordline and each storage Unit 21 does not contact.
Specifically, in the present embodiment, be correspondingly arranged a superconduction wordline above each superconductive device, and each superconduction wordline with There are spacing between the superconduction top electrode 211a, are not directly contacted with.Each superconduction wordline and the superconduction bit line 22 are flat in level It is vertically arranged, and is not attached in face, same array storage unit 21 shares a superconduction wordline (not shown).In the present embodiment In, each superconduction wordline is located at the surface of corresponding superconductive device, and in practical applications, the superconduction wordline can deviate the superconduction The surface of device, the magnetic field energy of the superconduction wordline influence corresponding superconductive device, are not limited to this embodiment.It is described super The material for leading wordline includes but is not limited to Nb, NbN, NbTi, NbTiN and Nb3Sn.In the present embodiment, each superconduction wordline is from a left side It turns right successively labeled as the first superconduction wordline 231a, the second superconduction wordline 231b, third superconduction wordline 232a, the 4th superconduction wordline 232b, the 5th superconduction wordline 233a, the 6th superconduction wordline 233b, the 7th superconduction wordline 234a, the 8th superconduction wordline 234b.
The working principle of the cryogenic memory 2 is as follows:
As shown in figure 9, write operation method includes:
Corresponding superconduction bit line and superconduction wordline is selected to be powered based on address decoding, not selected magnetic memory device 212 are short-circuited, and electric current flows through the spin current generating layer of selected magnetic memory device 212 based on the superconduction bit line, will Data are written in corresponding magnetic memory device 212.
Specifically, superconduction bit line corresponding with address is selected by address decoding circuitry (not shown) when write operation 22 and superconduction wordline be powered.In the present embodiment, right data instance is written to second magnetic memory device 212 of current line The corresponding superconduction bit line 22 of current line is powered, and is powered to the third superconduction wordline 232a.At this point, due to the third Superconduction wordline 232a is powered, and corresponding superconductive device is in normal state, resistance value under the action of Oersted magnetic field below Much larger than the resistance of magnetic memory device adjacent thereto, it is equivalent to open circuit;Remaining superconduction wordline no power, they are corresponding super It leads device and is in superconducting state, corresponding magnetic memory device is short-circuited.Therefore, write current is flowed into from the left side of current line, and is passed through Cross the superconductive device on right side in first storage unit 21 of current line, magnetic memory device in second storage unit 21 of current line 212 spin current generating layer 212a, the superconductive device on right side in second storage unit 21 of current line, current line third are deposited The superconductive device in the left side in the 4th storage unit 21 of superconductive device and current line on the right side in storage unit 21 flows out;Only when The spin current generating layer 212a of magnetic memory device 212 has electric current to flow through in second storage unit 21 that move ahead, and other magnetism are deposited The spin current generating layer 212a of memory device 212 does not have electric current to flow through, and due to the effect of Quantum geometrical phase, current line second is deposited Spin current is generated in the spin current generating layer 212a of storage unit 21, spin current simultaneously injects the free layer 212b, makes free layer magnetic Square is flipped under the action of SOT and auxiliary magnetic field, and then realizes the write-in of data.Since superconduction wordline is by superconductivity wire structure At only need to apply a lesser electric current can make the superconductive device of wordline arest neighbors be in normal state.
As shown in Figure 10, read operation method includes:
Corresponding superconduction bit line and superconduction wordline is selected to be powered based on address decoding, not selected magnetic memory device 212 are short-circuited, and electric current flows through each layer of selected magnetic memory device 212 based on the superconduction bit line, obtain the superconduction Resistance on bit line, and then read the data of selected magnetic memory device 212.
Specifically, superconduction bit line 22 corresponding with address and two are selected by the address decoding circuitry when read operation Superconduction wordline is powered.In the present embodiment, to read data instance to second magnetic memory device 212 of current line, to current The corresponding superconduction bit line 22 of row is powered, and logical to the third superconduction wordline 232a and the 4th superconduction wordline 232b Electricity.At this point, since the third superconduction wordline 232a and the 4th superconduction wordline 232b are powered, corresponding superconduction device below Part is in normal state under the action of Oersted magnetic field, and resistance value is much larger than the resistance of magnetic memory device adjacent thereto, It is equivalent to open circuit;Remaining superconduction wordline no power, their corresponding superconductive devices are in superconducting state, corresponding magnetic memory device It is short-circuited.Therefore, read current is flowed into from the left side of current line, and by the superconduction on right side in first storage unit 21 of current line Device, the magnetic memory device 212 in second storage unit 21 of current line, the right side in current line third storage unit 21 The 4th storage unit 21 of superconductive device and current line in left side superconductive device outflow;Only second storage of current line is single There is electric current to flow through from bottom to top in magnetic memory device 212 in member 21, other magnetic memory devices 212 are flowed through without electric current, are obtained Fetch road all-in resistance.The magnetic memory device 212 among superconductive device and the two that all-in resistance is mainly in normal state by two Parallel resistance constitute, due in normal state superconductive device resistance be much larger than magnetic memory device 212 resistance, because This, it is in parallel after resistance generally show the resistance of magnetic memory device 212, i.e., by address decode selected wordline with Sense bit line realizes the read operation to designated memory cell.
Due to the effect of Quantum geometrical phase, generated in the spin current generating layer 212a of second storage unit 21 of current line Spin current, spin current simultaneously inject the free layer 212b, turn over free layer magnetic moment under the action of SOT and auxiliary magnetic field Turn, and then realizes the write-in of data.Since superconduction wordline is made of superconductivity wire, only need to apply a lesser electric current can make The superconductive device of wordline arest neighbors is in normal state.Since superconduction wordline and superconduction bit line are all made of superconductor, and superconduction device The short circuit of other storage units is only needed small voltage that read operation can be realized by part.
Magnetic memory cell is integrated in superconducting logic circuit by cryogenic memory 2 of the invention, without CMOS logic electricity Road, and by superconducting logic unit making periphery read-write and control circuit can work at the lower voltage, with realize ultralow temperature, At a high speed, low-power consumption stores, caching and main memory suitable for superconducting computer.
Embodiment two
As shown in figure 11, the present invention provides a kind of cryogenic memory 2, with embodiment one the difference is that, the magnetic Property memory device 212 structure it is different.
Specifically, the magnetic memory device 212 include be sequentially stacked spin current generating layer 212a, free layer 212b, Nonmagnetic material layer 212c, reference layer 212d, pinning layer 212e and coating 212f, wherein the spin current generating layer 212a is Single layer wedge film.
More specifically, as shown in figure 11, the spin current generating layer 212a is located at bottom, the spin current generating layer 212a Thickness linear change, in the present embodiment, the lower interface of the spin current generating layer 212a is horizontal plane, and upper interface is inclination Face.During the preparation process, the thickness gradient of the spin current generating layer 212a can pass through different positions on control revolving speed, regulation substrate It is prepared by the sputtering or deposition duration set;It can also made by the way that substrate is fixed on the position deviateed right above sample target It is set not rotate or move to realize when standby wedge film;And then knot is constructed by the regulation of growth time and growth rate The asymmetric magnetic memory device 212a of structure.The spin current generating layer 212a (wedge film) induces the free layer 212b in thickness Spending gradient direction has non-uniform magnetic anisotropy, and when the data is written, current direction is applied to perpendicular to thickness gradient Direction (being in the present embodiment horizontal direction) does not need additionally to add auxiliary magnetic field or permanent magnet under the action of SOT Realize the overturning of free layer magnetic moment.
More specifically, as shown in figure 11, the free layer 212b, the nonmagnetic material layer 212c, the reference layer 212d And the pinning layer 212e be etc. thick films, thereon interface, lower interface according to the spin current generating layer 212a upper interface ladder Degree setting.
More specifically, as shown in figure 11, the coating 212f is wedge film, and lower interface is according to the spin current generating layer The upper interface gradients of 212a are arranged, and upper interface is horizontal plane, so that the upper and lower surfaces of the magnetic memory device 212 are Horizontal plane.
The other structures and reading/writing method of the cryogenic memory 2 are the same as example 1, and will not repeat them here.
Embodiment three
As shown in figure 12, the present invention provides a kind of cryogenic memory 2, with embodiment one the difference is that, the magnetic Property memory device 212 structure it is different.
Specifically, the magnetic memory device 212 include be sequentially stacked spin current generating layer 212a, free layer 212b, Nonmagnetic material layer 212c, reference layer 212d, pinning layer 212e and coating 212f.
More specifically, the spin current generating layer 212a is including the first film layer and between first film layer and the freedom The second film layer between layer 212b, first film layer and second film layer such as are at the thick film layers, and first film layer with The symbol of the spin Hall angle of second film layer is opposite.When the data is written, the lower interface of the free layer 212b is nearby deposited In vying each other for spin current, makes the 212 spontaneous one additional effective field of generation in inside of magnetic memory device, assist free layer Magnetic moment is flipped in the case where lacking outer plus auxiliary magnetic field.The effective field additionally generated independent of free layer magnetic moment whether It is flipped, but closely related with current direction, when current direction is fixed, the direction of the effective field will be remained unchanged;When When current direction is reversed, the direction of the effective field is also reversed immediately.
The other structures and reading/writing method of the cryogenic memory 2 are the same as example 1, and will not repeat them here.
Example IV
As shown in figure 13, the present invention provides a kind of cryogenic memory 2, with embodiment three the difference is that, the magnetic Property memory device 212 structure it is different.
Specifically, the magnetic memory device 212 include be sequentially stacked spin current generating layer 212a, free layer 212b, Nonmagnetic material layer 212c, reference layer 212d, pinning layer 212e and coating 212f.
More specifically, as shown in figure 11, the first film layer is to wait thick films, second film in the spin current generating layer 212a Layer is wedge film, and first film layer is opposite with the spin symbol of Hall angle of second film layer.When the data is written, electric Stream direction is applied to the direction perpendicular to thickness gradient, and not only there are the phases of spin current near interface at the free layer 212b Mutually competition, its own has non-uniform magnetic anisotropy also on thickness gradient direction, and the two assists free layer magnetic moment jointly Field-free overturning occurs under SOT effect.
More specifically, as shown in figure 11, the free layer 212b, the nonmagnetic material layer 212c and the reference layer 212d For etc. thick films, thereon interface, lower interface according to the spin current generating layer 212a upper interface gradients be arranged.
More specifically, as shown in figure 11, the coating 212f is wedge film, and lower interface is according to the spin current generating layer The upper interface gradients of 212a are arranged, and upper interface is horizontal plane, so that the upper and lower surfaces of the magnetic memory device 212 are Horizontal plane.
The other structures and reading/writing method of the cryogenic memory 2 are the same as example 1, and will not repeat them here.
In conclusion the present invention provides a kind of storage unit, cryogenic memory and its reading/writing method, comprising: pass through superconduction Magnetic memory device, the first superconductive device and the second superconductive device that electrode is connected in parallel under top electrode and superconduction, the magnetism Memory device is between first superconductive device and second superconductive device;Wherein, the magnetic memory device from Eddy flow generating layer electrode under the superconduction top electrode or the superconduction on thickness direction and width direction, and the magnetism Spin current generating layer is disposed adjacent with free layer in memory device.Multiple said memory cells arrange to form array, each row or each Electrode is connected under the superconduction top electrode or superconduction of two neighboring storage unit in array storage unit, to realize each row or each column storage Electrode is as superconduction bit line under the series connection of unit, the superconduction top electrode and the superconduction;Above or below each superconductive device It is correspondingly arranged a superconduction wordline, there are spacing between each superconduction wordline and each storage unit, and not Contact Superconducting bit line.Based on ground Location decoding selects corresponding superconduction bit line and superconduction wordline to be powered, and not selected magnetic memory device is short-circuited, electric current base The spin current generating layer of selected magnetic memory device is flowed through in the superconduction bit line, to write data into corresponding magnetic storage In device.Corresponding superconduction bit line and superconduction wordline is selected to be powered based on address decoding, not selected magnetic memory device It is short-circuited, electric current flows through each layer of selected magnetic memory device based on the superconduction bit line, measures on the superconduction bit line Resistance, and then read the data of selected magnetic memory device.SOT-MRAM storage unit is completely embedded into super by the present invention It leads in the ultralow temperature magnetic memory of integrated logic circuit, to realize that information in limit low temperature, high speed, low-power consumption storage, is suitable for The caching and main memory of superconducting computer.So the present invention effectively overcomes various shortcoming in the prior art and has high industrial Utility value.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as At all equivalent modifications or change, should be covered by the claims of the present invention.

Claims (28)

1. a kind of storage unit, which is characterized in that the storage unit includes at least:
Magnetic memory device, the first superconductive device and the second superconduction device being connected in parallel by electrode under superconduction top electrode and superconduction Part, the magnetic memory device is between first superconductive device and second superconductive device;
Wherein, the spin current generating layer of the magnetic memory device powers on thickness direction and width direction through the superconduction Electrode under pole or the superconduction, and spin current generating layer is disposed adjacent with free layer in the magnetic memory device.
2. storage unit according to claim 1, it is characterised in that: the magnetic memory device includes from bottom to up successively Stacked spin current generating layer, free layer, nonmagnetic material layer, reference layer, pinning layer and coating, and it is set to the freedom The permanent magnet of the layer left and right sides;Wherein, the spin current generating layer includes the thick films such as single layer.
3. storage unit according to claim 1, it is characterised in that: the magnetic memory device includes from bottom to up successively Stacked spin current generating layer, free layer, nonmagnetic material layer, reference layer, pinning layer and coating;Wherein, the spin miscarriage Generating layer includes single layer wedge film.
4. storage unit according to claim 1, it is characterised in that: the magnetic memory device includes from bottom to up successively Stacked spin current generating layer, free layer, nonmagnetic material layer, reference layer, pinning layer and coating;Wherein, the spin miscarriage Generating layer includes the first film layer and the second film layer between first film layer and the free layer, first film layer and institute The symbol of the spin Hall angle of the second film layer is stated on the contrary, first film layer and second film layer include waiting thick films.
5. storage unit according to claim 1, it is characterised in that: the magnetic memory device includes from bottom to up successively Stacked spin current generating layer, free layer, nonmagnetic material layer, reference layer, pinning layer and coating;Wherein, the spin miscarriage Generating layer includes the first film layer and the second film layer between first film layer and the free layer, first film layer and institute The symbol of the spin Hall angle of the second film layer is stated on the contrary, first film layer includes waiting thick films, second film layer includes wedge shape Film.
6. storage unit according to claim 1, it is characterised in that: the magnetic memory device includes from bottom to up successively Stacked buffer layer, pinning layer, reference layer, nonmagnetic material layer, free layer, spin current generating layer, and it is set to the freedom The permanent magnet of the layer left and right sides.
7. storage unit according to claim 1, it is characterised in that: the magnetic memory device includes from bottom to up successively Stacked buffer layer, pinning layer, reference layer, nonmagnetic material layer, free layer, spin current generating layer, wherein the spin current generates Layer includes single layer wedge film.
8. storage unit according to claim 1, it is characterised in that: the magnetic memory device includes from bottom to up successively Stacked buffer layer, pinning layer, reference layer, nonmagnetic material layer, free layer, spin current generating layer, wherein the spin current generates Layer include the first film layer and the second film layer between first film layer and the free layer, first film layer with it is described The symbol of the spin Hall angle of second film layer is on the contrary, first film layer and second film layer include waiting thick films.
9. storage unit according to claim 1, it is characterised in that: the magnetic memory device includes from bottom to up successively Stacked buffer layer, pinning layer, reference layer, nonmagnetic material layer, free layer, spin current generating layer, wherein the spin current generates Layer include the first film layer and the second film layer between first film layer and the free layer, first film layer with it is described For the symbol of the spin Hall angle of second film layer on the contrary, first film layer includes waiting thick films, second film layer includes wedge film.
10. storage unit described in any one according to claim 1~9, it is characterised in that: the material of the spin current generating layer Matter includes Ta, W, Mo, Pt, Pd, Ir, Ru, Nb, FeMn, IrMn, PdMn, PtMn, Bi2Se3、(Bi0.5Sb0.5)2Te3Or BixSe1-x, wherein x is the real number between 0 and 1.
11. storage unit described in any one according to claim 1~9, it is characterised in that: the free layer and the reference Layer includes single layer ferromagnetic thin film, or the laminated construction of at least two layers ferromagnetic thin film and non-magnetic space layer.
12. storage unit according to claim 11, it is characterised in that: the material of the ferromagnetic thin film include Co, Fe, One or more of Ni, Mn, Rh, Pd, Pt, Gd, Tb, Dy, Ho, Al, Si, Ga, Ge and B combination.
13. storage unit according to claim 11, it is characterised in that: the material of the non-magnetic space layer include Cr, Cu, Mo, Ru, Pd, Hf, Ta, W, Tb, Ir or Pt.
14. according to storage unit described in claim 2~9 any one, it is characterised in that: the material of the nonmagnetic material layer Including MgO or AlOy, wherein y is real number.
15. according to storage unit described in claim 2~9 any one, it is characterised in that: the material of the nonmagnetic material layer Including Cu, Ag or Au.
16. according to storage unit described in claim 2~5 any one, it is characterised in that: the material of the coating includes Ru, Ta, W, Ti, TiN or TaN.
17. according to storage unit described in claim 6~9 any one, it is characterised in that: the material of the buffer layer includes Ru, Ta, W, TaN, SiN, TiN, Ti, Zn or Mg.
18. storage unit according to claim 1, it is characterised in that: first superconductive device includes traditional Joseph Gloomy knot, superconducting nano bridge knot, n-Tron type superconductor or high temperature superconducting materia, second superconductive device include tradition about plucked instrument The gloomy knot of husband, superconducting nano bridge knot, n-Tron type superconductor or high temperature superconducting materia.
19. storage unit according to claim 18, it is characterised in that: the tradition Josephson junction includes being sequentially stacked The first superconducting material, insulating layer and the second superconducting material.
20. storage unit according to claim 19, it is characterised in that: the material of first superconducting material includes Nb, NbN, NbTi, NbTiN and Nb3At least one of Sn, the material of second superconducting material include Nb, NbN, NbTi, NbTiN and Nb3At least one of Sn.
21. storage unit according to claim 19, it is characterised in that: the material of the insulating layer includes MgO, Si3N4、 Al2O3And SiO2At least one of.
22. storage unit according to claim 1, it is characterised in that: first superconductive device and second superconduction The resistance of device in its non-superconducting state is ten times or more of the resistance of the magnetic memory device.
23. storage unit according to claim 1, it is characterised in that: the material of each superconducting electrode include Nb, NbN, NbTi, NbTiN and Nb3At least one of Sn.
24. a kind of cryogenic memory, which is characterized in that the cryogenic memory includes at least:
Multiple storage units as described in claim 1~23 any one arrange to form array, each row or each array storage unit In two neighboring storage unit superconduction top electrode or superconduction under electrode be connected, to realize the string of each row or each array storage unit Electrode is as superconduction bit line under connection, the superconduction top electrode and the superconduction;
A superconduction wordline is correspondingly arranged above or below each superconductive device, between existing between each superconduction wordline and each storage unit Away from.
25. cryogenic memory according to claim 24, it is characterised in that: each superconduction wordline and superconduction bit line are flat in level It is vertically arranged, and is not attached in face.
26. cryogenic memory according to claim 24, it is characterised in that: the material of the superconduction bit line include Nb, NbN, NbTi, NbTiN and Nb3At least one of Sn, the material of the superconduction wordline include Nb, NbN, NbTi, NbTiN and Nb3At least one of Sn.
27. a kind of write operation method of the cryogenic memory as described in claim 24~26 any one, which is characterized in that institute Write operation method is stated to include at least:
Corresponding superconduction bit line and superconduction wordline is selected to be powered based on address decoding, not selected magnetic memory device is short Road, electric current flow through the spin current generating layer of selected magnetic memory device based on the superconduction bit line, to write data into pair In magnetropism memory device.
28. a kind of read operation method of the cryogenic memory as described in claim 24~26 any one, which is characterized in that institute Read operation method is stated to include at least:
Corresponding superconduction bit line and superconduction wordline is selected to be powered based on address decoding, not selected magnetic memory device is short Road, electric current flow through each layer of selected magnetic memory device based on the superconduction bit line, obtain the electricity on the superconduction bit line Resistance, and then read the data of selected magnetic memory device.
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