CN109638080A - Active switch and preparation method thereof, display device - Google Patents
Active switch and preparation method thereof, display device Download PDFInfo
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- CN109638080A CN109638080A CN201811465763.8A CN201811465763A CN109638080A CN 109638080 A CN109638080 A CN 109638080A CN 201811465763 A CN201811465763 A CN 201811465763A CN 109638080 A CN109638080 A CN 109638080A
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- insulating layer
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- 238000002360 preparation method Methods 0.000 title abstract description 5
- 239000011159 matrix material Substances 0.000 claims abstract description 60
- 239000004065 semiconductor Substances 0.000 claims abstract description 60
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 238000004519 manufacturing process Methods 0.000 claims abstract description 23
- 239000010410 layer Substances 0.000 claims description 210
- 238000000034 method Methods 0.000 claims description 47
- 230000008569 process Effects 0.000 claims description 30
- 229910052751 metal Inorganic materials 0.000 claims description 25
- 239000002184 metal Substances 0.000 claims description 25
- 230000000903 blocking effect Effects 0.000 claims description 23
- 239000000463 material Substances 0.000 claims description 22
- 238000005530 etching Methods 0.000 claims description 21
- 239000011229 interlayer Substances 0.000 claims description 19
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 11
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 7
- 229910052733 gallium Inorganic materials 0.000 claims description 7
- 229910044991 metal oxide Inorganic materials 0.000 claims description 7
- 150000004706 metal oxides Chemical class 0.000 claims description 7
- 239000005416 organic matter Substances 0.000 claims description 5
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 4
- 229910052725 zinc Inorganic materials 0.000 claims description 4
- 239000011701 zinc Substances 0.000 claims description 4
- 229910003437 indium oxide Inorganic materials 0.000 claims 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical group [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 230000007797 corrosion Effects 0.000 abstract description 8
- 238000005260 corrosion Methods 0.000 abstract description 8
- 230000015572 biosynthetic process Effects 0.000 description 28
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 20
- 239000010408 film Substances 0.000 description 18
- 230000008020 evaporation Effects 0.000 description 14
- 238000001704 evaporation Methods 0.000 description 14
- 238000005229 chemical vapour deposition Methods 0.000 description 13
- 238000002207 thermal evaporation Methods 0.000 description 13
- 238000001755 magnetron sputter deposition Methods 0.000 description 12
- 229920002120 photoresistant polymer Polymers 0.000 description 12
- 239000000377 silicon dioxide Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 9
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 6
- 239000011521 glass Substances 0.000 description 6
- 229910052738 indium Inorganic materials 0.000 description 6
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 6
- 239000010409 thin film Substances 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 4
- 239000004411 aluminium Substances 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 229910052750 molybdenum Inorganic materials 0.000 description 4
- 239000011733 molybdenum Substances 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- 229910052719 titanium Inorganic materials 0.000 description 4
- 239000003513 alkali Substances 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 239000002585 base Substances 0.000 description 3
- 239000005388 borosilicate glass Substances 0.000 description 3
- 230000006378 damage Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 239000011787 zinc oxide Substances 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- 208000027418 Wounds and injury Diseases 0.000 description 1
- RQIPKMUHKBASFK-UHFFFAOYSA-N [O-2].[Zn+2].[Ge+2].[In+3] Chemical compound [O-2].[Zn+2].[Ge+2].[In+3] RQIPKMUHKBASFK-UHFFFAOYSA-N 0.000 description 1
- -1 aluminium tin-oxide Chemical compound 0.000 description 1
- JYMITAMFTJDTAE-UHFFFAOYSA-N aluminum zinc oxygen(2-) Chemical compound [O-2].[Al+3].[Zn+2] JYMITAMFTJDTAE-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 208000014674 injury Diseases 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000010025 steaming Methods 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41758—Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
Abstract
This application involves a kind of active switches and preparation method thereof, display device.The active switch includes: substrate；Grid is formed on the substrate；Gate insulating layer is formed on the substrate and covers the grid；Oxide semiconductor layer is formed in the top that gate insulating layer corresponds to the grid；Black matrix" is formed on the gate insulating layer and covers oxide semiconductor layer；Source electrode, drain electrode, are formed on black matrix"；Wherein, the source electrode, drain electrode are electrically connected by the via hole through black matrix" with oxide semiconductor layer respectively.The application can also effectively prevent back channel corrosion by substituting the etch stop layer of script with black matrix", simultaneously as source and drain electrode are blocked respectively in the region of black matrix" aperture, so the phenomenon that light leakage is not present；Further, as soon as due to eliminating a layer etch stop layer, the light shield of an etch stop layer also can be accordingly reduced, so that the cost of manufacture of entire active switch is minimized.
Description
Technical field
This application involves field of display technology, more particularly to a kind of active switch and preparation method thereof, display device.
Background technique
IGZO (Indium gallium zinc oxide, indium gallium zinc), it is a kind of novel semiconductor material, is had
Electron mobility more higher than amorphous silicon.IGZO be frequently used in high performance TFT of new generation (Thin Film Transistor,
Thin film transistor (TFT)) in be used as channel material, to improve display panel resolution ratio.
In IGZO TFT structure, IGZO carries on the back the etching injury of channel in order to prevent, generallys use ESL (Etch stop
Layer, etching barrier layer) structure, to prevent back channel etching damage, but need to increase by one of ESL light shield；IGZO ESL mono-
As for large scale, high-resolution display panel design in, Pixel Dimensions very little, in order to prevent CF (Color Filter,
Colored filter) in conjunction with Array (array) substrate when shift and lead to display panel light leakage or other display brightness
Non-uniform problem can select for black matrix" or color blocking to be all produced on Array substrate, but will increase TFT in this way
The cost of manufacture of structure.How the cost of manufacture for reducing TFT structure while back channel etching damage is being prevented, is being urgent need to resolve
The problem of.
Summary of the invention
Based on this, it is necessary to for how in the cost of manufacture for preventing from carrying on the back reduction TFT structure while channel etching is damaged
The problem of, a kind of active switch and preparation method thereof, display device are provided.
A kind of active switch, the active switch include:
Substrate；
Grid is formed on the substrate；
Gate insulating layer is formed on the substrate and covers the grid；
Oxide semiconductor layer is formed in the top that the gate insulating layer corresponds to the grid；
Black matrix" is formed on the gate insulating layer and covers the oxide semiconductor layer；
Source electrode, drain electrode are formed on the black matrix"；Wherein, the source electrode, drain electrode are respectively by running through the black
The via hole of matrix is electrically connected with the oxide semiconductor layer.
The active switch in one of the embodiments, further include:
Interlayer insulating film is formed in the source electrode, in drain electrode.
In one of the embodiments, further include:
Color blocking layer is formed on the interlayer insulating film.
In one of the embodiments, further include:
Insulating layer is protected, is formed in the color blocking layer.
In one of the embodiments, further include:
Pixel electrode is formed on the protection insulating layer；Wherein, the pixel electrode and the drain electrode are by running through institute
State the via hole electrical connection of protection insulating layer, color blocking layer and interlayer insulating film.
The material of the oxide semiconductor layer is indium gallium zinc in one of the embodiments,.
The black matrix" includes organic matter and/or metal oxide in one of the embodiments,.
A kind of manufacturing method of active switch, for manufacturing the aforementioned active switch, which comprises
One substrate is provided, and deposits the first metal layer on the substrate, the first metal layer is carried out at patterning
Reason forms grid；
Gate insulating layer is formed on the grid；
On the gate insulating layer deposited semiconductor layer and to the semiconductor layer perform etching with formed correspond to institute
State the oxide semiconductor layer above grid；
Black matrix" is formed on the oxide semiconductor layer and is formed on the black matrix" corresponds to the oxygen
The via hole of compound semiconductor layer two sides；
The depositing second metal layer on the black matrix" performs etching the second metal layer to form source electrode, leakage
Pole；Wherein, the source electrode, drain electrode are contacted by the via hole with the oxide semiconductor layer respectively.
The gate insulating layer includes silica and/or silicon nitride in one of the embodiments,.
A kind of display device, including the aforementioned active switch.
Above-mentioned active switch can also effectively prevent back channel by substituting the etch stop layer of script with black matrix"
Corrosion, simultaneously as source, drain electrode are blocked respectively in the region of black matrix" aperture, so the phenomenon that light leakage is not present；
Further, as soon as due to eliminating a layer etch stop layer, the light shield of an etch stop layer also can be accordingly reduced, so that whole
The cost of manufacture of a TFT structure is minimized.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the active switch in an embodiment；
Fig. 2 is the production method flow chart of the active switch in an embodiment；
Fig. 3 is the partial structure diagram formed according to step S100 in Fig. 2；
Fig. 4 is the partial structure diagram formed according to step S200 in Fig. 2；
Fig. 5 is the partial structure diagram formed according to step S300 in Fig. 2；
Fig. 6 is the partial structure diagram formed according to step S400 in Fig. 2；
Fig. 7 is the partial structure diagram formed according to step S500 in Fig. 2；
Fig. 8 is the structural schematic diagram of the active switch in another embodiment.
Specific embodiment
The application in order to facilitate understanding is described more fully the application below with reference to relevant drawings.In attached drawing
Give the better embodiment of the application.But the application can realize in many different forms, however it is not limited to herein
Described embodiment.On the contrary, the purpose of providing these embodiments is that making to understand more disclosure of this application
Add thorough and comprehensive.
It should be noted that it can directly on the other element when element is referred to as " being fixed on " another element
Or there may also be elements placed in the middle.When an element is considered as " connection " another element, it, which can be, is directly connected to
To another element or it may be simultaneously present centering elements.Term as used herein " vertical ", " horizontal ", " left side ",
" right side " and similar statement for illustrative purposes only, are not meant to be the only embodiment.
Unless otherwise defined, all technical and scientific terms used herein and the technical field for belonging to the application
The normally understood meaning of technical staff is identical.The term used in the description of the present application is intended merely to description tool herein
The purpose of the embodiment of body, it is not intended that in limitation the application.
Fig. 1 is please referred to, is the structural schematic diagram of the active switch in an embodiment；The active switch may include: substrate
10, grid 20, gate insulating layer 30, oxide semiconductor layer 40, black matrix" 50 and source electrode 610, drain electrode 620.Wherein, grid
20 are formed on substrate 10；Gate insulating layer 30 is formed on substrate 10 and covers grid 20；Oxide semiconductor layer 40, shape
At in the top of the corresponding grid 20 of gate insulating layer 30；Black matrix" 50 is formed on gate insulating layer 30 and covers oxide
Semiconductor layer 40；Source electrode 610, drain electrode 620, are formed on black matrix" 50；Wherein, source electrode 610, drain electrode 620 are respectively by passing through
The via hole for wearing black matrix" 50 is electrically connected with oxide semiconductor layer 40.
Above-mentioned active switch can also effectively prevent back channel by substituting the etch stop layer of script with black matrix"
Corrosion, simultaneously as source and drain electrode are blocked respectively in the region of black matrix" aperture, so showing there is no light leakage
As；Further, as soon as due to eliminating a layer etch stop layer, the light shield of an etch stop layer also can be accordingly reduced, is made
The cost of manufacture for obtaining entire TFT structure is minimized.
Substrate 10 can be glass substrate or plastic base, wherein glass substrate can be the ultra-thin glass of alkali-free borosilicate
Glass, no alkali borosilicate glass physical characteristic with higher, preferable corrosion resistance, higher thermal stability and lower
Density and higher elasticity modulus.
Grid 20 is formed on substrate 10, wherein the formation process of grid 20 may include rf magnetron sputtering, heat steaming
Hair, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that the formation process of grid 20 can be with
It is selected and is adjusted according to practical situations and properties of product, be not further limited herein.The material of grid 20
It can be the heap stack combination of one or more of molybdenum, titanium, aluminium and copper；Select molybdenum, titanium, aluminium and copper can as 20 material of grid
To guarantee good electric conductivity.It is appreciated that the material of grid 20 can according to practical situations and properties of product into
Row selection and adjustment, are not further limited herein.The thickness range of grid 20 can be 2000 angstroms -6000 angstroms, optionally,
The thickness of grid 20 can be 2000 angstroms -4000 angstroms, and further, the thickness of grid 20 can be 4000 angstroms -6000 angstroms.It can be with
Understand, the thickness of grid 20 can be selected and be adjusted according to practical situations and properties of product, do not made herein into one
The restriction of step.
Gate insulating layer 30 is formed on substrate 10, and the formation process of gate insulating layer 30 may include that radio frequency magnetron splashes
It penetrates, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that gate insulating layer 30
Formation process can be selected and be adjusted according to practical situations and properties of product, do not limit further herein
It is fixed.The material of gate insulating layer 30 can be one of silica, silicon nitride or combination, i.e. gate insulating layer 30
It can be silica, be also possible to silicon nitride, can also be the mixture of silica and silicon nitride.It is appreciated that gate insulator
The material of layer 30 can be selected and be adjusted according to practical situations and properties of product, not limited further herein
It is fixed.The thickness of gate insulating layer 30 can be 1000 angstroms -4000 angstroms, and optionally, the thickness of gate insulating layer 30 can be 1000
Angstroms -2500 angstroms, further, the thickness of gate insulating layer 30 can be 2500 angstroms -4000 angstroms.It is appreciated that gate insulating layer
30 thickness can be selected and be adjusted according to practical situations and properties of product, be not further limited herein.
Oxide semiconductor layer 40 is formed in the top of the corresponding grid 20 of gate insulating layer 30, in other words, oxide half
Conductor layer 40 is made only in the top opposite with grid 20.The formation process of oxide semiconductor layer 40 may include radio frequency magnetron
Sputtering, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that oxide is partly led
The formation process of body layer 40 can be selected and be adjusted according to practical situations and properties of product, not made herein further
Restriction.Further, the material of oxide semiconductor layer 40 is indium gallium zinc oxide (Indium Gallium Zinc
Oxide, IGZO), use metal oxide to have the advantages that following both sides as the active layer material of thin film transistor (TFT): (1)
Forbidden band is wide (> 3.0eV), thus can bring extraordinary light durability, so, metal different from amorphous silicon film transistor
Oxide thin film transistor can be fabricated to all-transparent device, to dramatically increase the aperture opening ratio of display panel, and then reduce aobvious
The power consumption of showing device；(2) high mobility (about 10cm2/V·s).To sum up, metal oxide thin-film transistor can be simultaneously
Have the technical advantage of amorphous silicon film transistor and polycrystalline SiTFT, and there is feasibility in scale of mass production.
The thickness of oxide semiconductor layer 40 can be 100 angstroms -1000 angstroms, and optionally, the thickness of oxide semiconductor layer 40 can be
100 angstroms -1000 angstroms, further, the thickness of oxide semiconductor layer 40 can be 300 angstroms -600 angstroms.It is appreciated that oxide
The thickness of semiconductor layer 40 can be selected and be adjusted according to practical situations and properties of product, not made herein further
Restriction.
Black matrix" 50 is formed on gate insulating layer 30 and covers oxide semiconductor layer 40, the shape of black matrix" 50
It may include rf magnetron sputtering, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition work at technique
Skill.It is appreciated that the formation process of black matrix" 50 can be selected and be adjusted according to practical situations and properties of product
It is whole, it is not further limited herein.The material of black matrix" 50 can be organic matter and/or metal oxide, illustratively,
Black matrix" 50 can be organic matter, be also possible to metal oxide, can also be the combination of organic matter and metal oxide.It can
Selection of land, black matrix" 50 can be copper oxide.It is appreciated that the material of black matrix" 50 can according to practical situations and
Properties of product are selected and are adjusted, and are not further limited herein.The thickness of black matrix" 50 can for 10000 angstroms-
15000 angstroms, optionally, the thickness of black matrix" 50 can be 10000 angstroms -12000 angstroms, further, the thickness of black matrix" 50
Degree can be 12000 angstroms -15000 angstroms.It is appreciated that the thickness of black matrix" 50 can be according to practical situations and product
Performance is selected and is adjusted, and is not further limited herein.By the way that the etch stop layer of script is replaced with black matrix",
It can equally play the role of preventing back channel corrosion；One of light shield needed for production etch stop layer can also be saved, and then drop
The cost of manufacture of low TFT structure, while black matrix" can also play the role of light leakage.
Source electrode 610 and drain electrode 620 are formed on black matrix" 50, wherein source electrode 610 is with drain electrode 620 respectively by running through
The via hole of black matrix" 50 is electrically connected with oxide semiconductor layer 40.Source electrode 610 and the formation process of drain electrode 620 may include penetrating
Frequency magnetron sputtering, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that source electrode
610 with drain electrode 620 formation process can be selected and be adjusted according to practical situations and properties of product, do not make herein
It is further to limit.Source electrode 610 and the material of drain electrode 620 can be the storehouse group of one or more of molybdenum, titanium, aluminium and copper
It closes；Select molybdenum, titanium, aluminium and copper that can guarantee good electric conductivity as source electrode 610 and 620 materials of drain electrode.The source of being appreciated that
Pole 610 and drain 620 material can be selected and be adjusted according to practical situations and properties of product, do not make herein into
The restriction of one step.
Referring to Fig. 2, for the production method flow chart of the active switch in an embodiment；The production method of the active switch
For manufacturing the aforementioned active switch, the active switch of the present embodiment may be, for example, thin film transistor (TFT).The active switch
Production method may include step: S100-S500.
Step S100 provides a substrate, and deposits the first metal layer on the substrate, carries out to the first metal layer
Patterned process forms grid.
Specifically, it please assist refering to Fig. 3, substrate 10 can be glass substrate or plastic base, wherein glass substrate can be with
For no alkali borosilicate ultra-thin glass, no alkali borosilicate glass physical characteristic with higher, preferable corrosion resistance, compared with
High thermal stability and lower density and higher elasticity modulus.Forming the first metal layer on the substrate 10, (Fig. 3 is not marked
Show), the formation process of the first metal layer may include rf magnetron sputtering, thermal evaporation, vacuum electronic beam evaporation and plasma
Enhance chemical vapor deposition process.It is appreciated that the formation process of the first metal layer can be according to practical situations and production
Moral character can be carried out selection and adjustment, not be further limited herein.Patterned process is carried out to the first metal layer and forms grid
20.Specifically, it can be coated with one layer of photoresist layer (Fig. 3 is not indicated) in the top of the first metal layer, then uses one of light shield technique
Patterned process is carried out to photoresist layer, the photoresist (Fig. 3 is not indicated) for obtaining having predetermined pattern can be used on this basis
Wet-etching technology performs etching the first metal layer to form grid 20.
Step S200 forms gate insulating layer on the grid.
Specifically, referring to Fig. 4, forming gate insulating layer 30 on grid 20.The gate insulating layer 30 of formation is by grid
20 cover, the formation process of gate insulating layer 30 may include rf magnetron sputtering, thermal evaporation, vacuum electronic beam evaporation and
Plasma reinforced chemical vapour deposition technique.It is appreciated that the formation process of gate insulating layer 30 can be according to practical application feelings
Condition and properties of product are selected and are adjusted, and are not further limited herein.
Step S300 deposited semiconductor layer and performs etching on the gate insulating layer with shape the semiconductor layer
At the oxide semiconductor layer corresponded to above the grid.
Specifically, it please assist refering to Fig. 5, semiconductor layer (Fig. 5 is not indicated) be formed on gate insulating layer 30, to semiconductor
Layer is performed etching to form the oxide semiconductor layer 40 for corresponding to 20 top of grid.Can by rf magnetron sputtering, thermal evaporation,
Vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique form semiconductor layer on gate insulating layer 30, then
It is coated with one layer of photoresist layer (Fig. 5 is not indicated) in the top of semiconductor layer, figure is then carried out to photoresist layer using one of light shield technique
Caseization processing, obtains the photoresist (Fig. 5 is not indicated) with predetermined pattern, on this basis, using dry etch process to the
One metal layer is performed etching to form oxide semiconductor layer 40.The material of oxide semiconductor layer 40 can aoxidize for indium gallium zinc
Object.
Step S400 forms black matrix" and the formation pair on the black matrix" on the oxide semiconductor layer
The via hole of oxide semiconductor layer two sides described in Ying Yu.
Specifically, Fig. 6 is seen, black matrix" 50, the shape of black matrix" 50 can be formed on oxide semiconductor layer 40
It may include rf magnetron sputtering, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition work at technique
Skill.It is appreciated that the formation process of black matrix" 50 can be selected and be adjusted according to practical situations and properties of product
It is whole, it is not further limited herein.Then black matrix" 50 is performed etching with formation pair using photoetching or etching technics
It should be in the via hole H1 and H2 of 40 two sides of oxide semiconductor layer.
Step S500, the depositing second metal layer on the black matrix" perform etching with shape the second metal layer
At source electrode, drain electrode；Wherein, the source electrode, drain electrode are contacted by the via hole with the oxide semiconductor layer respectively.
Specifically, it please assist refering to Fig. 7, second metal layer (Fig. 7 is not indicated) be formed on black matrix" 50, to the second gold medal
The formation process for belonging to layer may include rf magnetron sputtering, thermal evaporation, vacuum electronic beam evaporation and plasma-reinforced chemical gas
Phase depositing operation.It is appreciated that the formation process of second metal layer can be carried out according to practical situations and properties of product
Selection and adjustment, are not further limited herein.Second metal layer is performed etching with the source electrode 610 of formation, drain electrode 620；
Wherein, source electrode 610 is contacted by via hole H1 with oxide semiconductor layer 40, and drain electrode 620 passes through via hole H2 and oxide semiconductor
Layer 40 contacts.Specifically, it can be coated with one layer of photoresist layer (Fig. 7 is not indicated) in the top of second metal layer, then uses one of light
Cover technique carries out patterned process to photoresist layer, obtains the photoresist (Fig. 7 is not indicated) with predetermined pattern, on this basis,
Wet-etching technology is used to perform etching second metal layer to form source electrode 610, drain electrode 620, wherein source electrode 610 passed through
Hole H1 is electrically connected with the realization of oxide semiconductor layer 40, and drain electrode 620 is electrically connected by via hole H2 and the realization of oxide semiconductor layer 40
It connects.
The production method of above-mentioned active switch also can be effective by substituting the etch stop layer of script with black matrix"
Back channel corrosion is prevented, simultaneously as source and drain electrode are blocked respectively in the region of black matrix" aperture, so being not present
The phenomenon that light leakage；Further, as soon as due to eliminating a layer etch stop layer, it also can accordingly reduce by an etch stop layer
Light shield, so that the cost of manufacture of entire TFT structure is minimized.
Referring to Fig. 8, the active switch may include: base for the structural schematic diagram of the active switch in another embodiment
Plate 10, grid 20, gate insulating layer 30, oxide semiconductor layer 40, black matrix" 50, source electrode 610, drain electrode 620, layer insulation
Layer 70, color blocking layer 80 protect insulating layer 90 and pixel electrode 100.Wherein, grid 20 is formed on substrate 10；Gate insulating layer
30 are formed on substrate 10 and cover grid 10；Oxide semiconductor layer 40 is formed in the corresponding grid 20 of gate insulating layer 30
Top；Black matrix" 50 is formed on gate insulating layer 30 and covers oxide semiconductor layer 40；Source electrode 610, drain electrode 620,
It is formed on black matrix" 50；Wherein, source electrode 610, drain electrode 620 pass through the via hole and oxide half through black matrix" 50 respectively
Conductor layer 40 is electrically connected；Layer frame insulating layer 70 be formed in source electrode 610, drain electrode 620 on；Color blocking layer 80 is formed in interlayer insulating film 70
On；Protection insulating layer 90 is formed in color blocking layer 80；Pixel electrode 100 is formed on protection insulating layer 90, wherein pixel electrode
100 are electrically connected with drain electrode 620 by running through the via hole of protection insulating layer 90, color blocking layer 80 and interlayer insulating film 70.
Above-mentioned active switch can also effectively prevent back channel by substituting the etch stop layer of script with black matrix"
Corrosion, simultaneously as source and drain electrode are blocked respectively in the region of black matrix" aperture, so showing there is no light leakage
As；Further, as soon as due to eliminating a layer etch stop layer, the light shield of an etch stop layer also can be accordingly reduced, is made
The cost of manufacture for obtaining entire TFT structure is minimized.
It is appreciated that for substrate, grid, gate insulating layer, oxide semiconductor layer, black matrix" and source electrode, drain electrode
Description be referred to the description of aforementioned active switch embodiment, do not repeat further herein.
Interlayer insulating film 70 be formed in source electrode 610, drain electrode 620 on, the formation process of interlayer insulating film 70 may include penetrating
Frequency magnetron sputtering, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that interlayer
The formation process of insulating layer 70 can be selected and be adjusted according to practical situations and properties of product, not made herein into one
The restriction of step.The material of interlayer insulating film 70 can be one of silica, silicon nitride or combination, i.e. interlayer is exhausted
Edge layer 70 can be silica, be also possible to silicon nitride, can also be the mixture of silica and silicon nitride.It is appreciated that layer
Between the material of insulating layer 70 can be selected and be adjusted according to practical situations and properties of product, do not make herein further
Restriction.The thickness of interlayer insulating film 70 can be 2000 angstroms -6500 angstroms, and optionally, the thickness of interlayer insulating film 70 can be
2000 angstroms -4500 angstroms, further, the thickness of interlayer insulating film 70 can be 4500 angstroms -6500 angstroms.It is appreciated that interlayer is exhausted
The thickness of edge layer 70 can be selected and be adjusted according to practical situations and properties of product, not limited further herein
It is fixed.
Color blocking layer 80 is formed on interlayer insulating film 70, the formation process of color blocking layer 80 may include rf magnetron sputtering,
Thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that the formation work of color blocking layer 80
Skill can be selected and be adjusted according to practical situations and properties of product, be not further limited herein.Color blocking layer
80 can be red color resistance, or green color blocking can also be blue color blocking.The material of color blocking layer 80 can be organic
Object.The thickness of color blocking layer 80 can be 1.5 μm -3 μm；Optionally, the thickness of color blocking layer 80 can be 1.5 μm -2 μm；Optionally,
The thickness of color blocking layer 80 can be 2 μm -3 μm.
Protection insulating layer 90 is formed in color blocking layer 80, and the formation process of protection insulating layer 90 may include that radio frequency magnetron splashes
It penetrates, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that protection insulating layer 90
Formation process can be selected and be adjusted according to practical situations and properties of product, do not limit further herein
It is fixed.The material of protection insulating layer 90 can be one of silica, silicon nitride or combination, i.e. protection insulating layer 90
It can be silica, be also possible to silicon nitride, can also be the mixture of silica and silicon nitride.It is appreciated that protection insulation
The material of layer 90 can be selected and be adjusted according to practical situations and properties of product, not limited further herein
It is fixed.The thickness for protecting insulating layer 90 can be 2000 angstroms -6500 angstroms, and optionally, protecting the thickness of insulating layer 90 can be 2000
Angstroms -4500 angstroms, further, protecting the thickness of insulating layer 90 can be 4500 angstroms -6500 angstroms.It is appreciated that protection insulating layer
90 thickness can be selected and be adjusted according to practical situations and properties of product, be not further limited herein.
Pixel electrode 100 is formed on protection insulating layer 90, and the formation process of pixel electrode 100 may include radio frequency magnetron
Sputtering, thermal evaporation, vacuum electronic beam evaporation and plasma reinforced chemical vapour deposition technique.It is appreciated that pixel electrode 100
Formation process can be selected and be adjusted according to practical situations and properties of product, do not limit further herein
It is fixed.Pixel electrode 100 can be indium tin oxide, indium-zinc oxide, aluminium tin-oxide, aluminium zinc oxide, indium germanium zinc oxide
One of or it is a variety of.Pixel electrode 100 and drain electrode 620 pass through through protection insulating layer 90, color blocking layer 80 and interlayer insulating film
70 via hole electrical connection." running through " can be formed by photoetching or etching technics, be set specifically, photoetching refers to using with a certain layer
The mask of meter figure makes photosensitive photoresist that three-dimensional relief pattern be formed on the substrate by exposure and imaging.Etching refers to
Under photoresist masking, the film layer for forming micrographics as needed is different, using different etching substances and method in film layer
Carry out selective etch.In this way, three dimensional design figure has been transferred in the related film layer of substrate after removing photoresist.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The several embodiments of the application above described embodiment only expresses, the description thereof is more specific and detailed, but simultaneously
The limitation to claim therefore cannot be interpreted as.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the concept of this application, various modifications and improvements can be made, these belong to the protection of the application
Range.Therefore, the scope of protection shall be subject to the appended claims for the application patent.
Claims (10)
1. a kind of active switch, which is characterized in that the active switch includes:
Substrate；
Grid is formed on the substrate；
Gate insulating layer is formed on the substrate and covers the grid；
Oxide semiconductor layer is formed in the top that the gate insulating layer corresponds to the grid；
Black matrix" is formed on the gate insulating layer and covers the oxide semiconductor layer；
Source electrode, drain electrode are formed on the black matrix"；Wherein, the source electrode, drain electrode are respectively by running through the black matrix"
Via hole be electrically connected with the oxide semiconductor layer.
2. active switch according to claim 1, which is characterized in that further include:
Interlayer insulating film is formed in the source electrode, in drain electrode.
3. active switch according to claim 2, which is characterized in that further include:
Color blocking layer is formed on the interlayer insulating film.
4. active switch according to claim 3, which is characterized in that further include:
Insulating layer is protected, is formed in the color blocking layer.
5. active switch according to claim 4, which is characterized in that further include:
Pixel electrode is formed on the protection insulating layer；Wherein, the pixel electrode and the drain electrode are by running through the guarantor
Protect the via hole electrical connection of insulating layer, color blocking layer and interlayer insulating film.
6. active switch according to claim 1, which is characterized in that the material of the oxide semiconductor layer is indium oxide
Gallium zinc.
7. active switch according to claim 1, which is characterized in that the black matrix" includes organic matter and/or metal
Oxide.
8. a kind of manufacturing method of active switch, which is characterized in that for manufacturing such as the described in any item actives of claim 1-7
Switch, which comprises
One substrate is provided, and deposits the first metal layer on the substrate, patterned process shape is carried out to the first metal layer
At grid；
Gate insulating layer is formed on the grid；
On the gate insulating layer deposited semiconductor layer and to the semiconductor layer perform etching with formed correspond to the grid
Oxide semiconductor layer above pole；
Black matrix" is formed on the oxide semiconductor layer and is formed on the black matrix" corresponds to the oxide
The via hole of semiconductor layer two sides；
The depositing second metal layer on the black matrix" performs etching the second metal layer to form source electrode, drain electrode；Its
In, the source electrode, drain electrode are contacted by the via hole with the oxide semiconductor layer respectively.
9. the production method of active switch according to claim 8, which is characterized in that the gate insulating layer includes oxidation
Silicon and/or silicon nitride.
10. a kind of display device, which is characterized in that including such as described in any item active switches of claim 1-7.
Priority Applications (2)
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| CN201811465763.8A CN109638080A (en) | 2018-12-03 | 2018-12-03 | Active switch and preparation method thereof, display device |
| PCT/CN2018/120129 WO2020113597A1 (en) | 2018-12-03 | 2018-12-10 | Active switch and manufacturing method therefor, and display apparatus |
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| CN201811465763.8A CN109638080A (en) | 2018-12-03 | 2018-12-03 | Active switch and preparation method thereof, display device |
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| CN109638080A true CN109638080A (en) | 2019-04-16 |
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| CN103943626A (en) * | 2013-02-04 | 2014-07-23 | 上海天马微电子有限公司 | TFT array substrate, display panel and display device |
| US20140209894A1 (en) * | 2013-01-25 | 2014-07-31 | Lg Display Co., Ltd. | Thin film transistor and method for fabricating the same |
| CN104867877A (en) * | 2015-04-09 | 2015-08-26 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof, display panel and display device |
| CN107170762A (en) * | 2017-06-16 | 2017-09-15 | 武汉华星光电半导体显示技术有限公司 | OLED display panel and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100495793B1 (en) * | 1997-10-07 | 2005-09-02 | 삼성전자주식회사 | Thin film transistor substrate and manufacturing method for liquid crystal display |
| CN105652541B (en) * | 2016-01-20 | 2018-11-23 | 深圳市华星光电技术有限公司 | The production method and liquid crystal display panel of array substrate |
| CN106449656A (en) * | 2016-10-26 | 2017-02-22 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof and display panel and display device |
| CN107248373B (en) * | 2017-06-08 | 2020-03-06 | 京东方科技集团股份有限公司 | Display panel, manufacturing method and display device |
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- 2018-12-03 CN CN201811465763.8A patent/CN109638080A/en active Pending
- 2018-12-10 WO PCT/CN2018/120129 patent/WO2020113597A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140209894A1 (en) * | 2013-01-25 | 2014-07-31 | Lg Display Co., Ltd. | Thin film transistor and method for fabricating the same |
| CN103943626A (en) * | 2013-02-04 | 2014-07-23 | 上海天马微电子有限公司 | TFT array substrate, display panel and display device |
| CN104867877A (en) * | 2015-04-09 | 2015-08-26 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof, display panel and display device |
| CN107170762A (en) * | 2017-06-16 | 2017-09-15 | 武汉华星光电半导体显示技术有限公司 | OLED display panel and preparation method thereof |
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