CN109637435B - Driving circuit and driving method of display panel and display device - Google Patents
Driving circuit and driving method of display panel and display device Download PDFInfo
- Publication number
- CN109637435B CN109637435B CN201910054282.6A CN201910054282A CN109637435B CN 109637435 B CN109637435 B CN 109637435B CN 201910054282 A CN201910054282 A CN 201910054282A CN 109637435 B CN109637435 B CN 109637435B
- Authority
- CN
- China
- Prior art keywords
- unit
- thin film
- film transistor
- terminal
- setting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 34
- 239000010409 thin film Substances 0.000 claims description 72
- 239000003990 capacitor Substances 0.000 claims description 47
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 6
- 230000005669 field effect Effects 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 239000011787 zinc oxide Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 101150005295 GATA2 gene Proteins 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000004590 computer program Methods 0.000 description 1
- 230000001808 coupling effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000002096 quantum dot Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The embodiment of the application belongs to the technical field of display, and provides a driving circuit, a driving method and a display device of a display panel.
Description
Technical Field
The embodiment of the application belongs to the technical field of display, and particularly relates to a driving circuit, a driving method and a display device of a display panel.
Background
With the continuous development of display technology, display devices such as liquid crystal panels and displays are continuously developing towards high resolution, large screen, low power consumption and low cost. The liquid crystal panel comprises pixel units which are arranged in rows and columns, when the liquid crystal panel works, a grid driving signal controls the on and off of a Thin Film Transistor (TFT) in the pixel unit, so that the line scanning of the liquid crystal panel is completed, the function of displaying images by the liquid crystal panel is realized, and in order to improve the display effect, an active array LED driving circuit is usually adopted for driving the display panel.
However, the current of the thin film transistor drifts due to the drift of the threshold voltage under the gate stress (gate stress) of the thin film transistor for a long time, so that the micro light emitting diode has the problem of uneven display.
Content of application
The embodiment of the application provides a driving circuit, a driving method and a display device of a display panel, and aims to solve the problem that the current of a thin film transistor drifts due to the drift of threshold voltage under long-time gate stress (gate stress) of the thin film transistor, so that a micro light-emitting diode displays unevenly.
The embodiment of the application provides a drive circuit of a display panel, including:
the input end of the first switch unit is connected with the data line, and the control end of the first switch unit is connected with the first scanning line and is arranged to control the on and off of a data voltage signal provided by the data line according to a first scanning signal input by the first scanning line;
a first end of the first capacitor unit is connected with the output end of the first switch unit, and a second end of the first capacitor unit is grounded;
the output end of the second switch unit is grounded, the control end of the second switch unit is connected with a second scanning line, and the second scanning line is used for providing a second scanning signal;
a third switching unit, a first control terminal of which is connected to an output terminal of the first switching unit, a second control terminal of which is connected to an input terminal of the second switching unit, an input terminal of which is connected to a power line, the power line being configured to provide a power signal;
a first end of the second capacitor unit is connected with a second control end of the third switch unit, and a second end of the second capacitor unit is connected with an output end of the third switch unit; and
and a first end of the light emitting unit is connected with the output end of the third switching unit, and a second end of the light emitting unit is connected with the common electrode.
Optionally, the first switch unit and the second switch unit are electronic switch tubes.
Optionally, the electronic switching tube is an N-type thin film transistor field effect transistor;
the drain electrode of the N-type thin film transistor is the input end of the electronic switch tube, the source electrode of the N-type thin film transistor is the output end of the electronic switch tube, and the grid electrode of the N-type thin film transistor is the control end of the electronic switch tube.
Optionally, the first capacitor unit includes a first capacitor, a first end of the first capacitor is used as a first end of the first capacitor unit, and a second end of the first capacitor is used as a second end of the first capacitor unit.
Optionally, the second capacitor unit includes a second capacitor, a first end of the second capacitor is used as a first end of the second capacitor unit, and a second end of the second capacitor is used as a second end of the second capacitor unit.
Optionally, the light emitting unit includes a micro light emitting diode, an anode of the micro light emitting diode is a first end of the light emitting unit, and a cathode of the micro light emitting diode is a second end of the light emitting unit.
Optionally, the electronic switching tube is any one of a polycrystalline silicon thin film transistor, an amorphous silicon thin film transistor, a zinc oxide-based thin film transistor, or an organic thin film transistor.
An embodiment of the present application provides a driving method of a driving circuit of any one of the above display panels, the driving method including:
in an initialization stage, setting a first scanning signal and a second scanning signal as high level, setting a data voltage signal as a first data voltage, and setting the first data voltage as a low level signal;
in the threshold voltage compensation stage, setting the first scanning signal and the second scanning signal as high levels, and setting the data voltage signal as a second data voltage;
in a charging stage, setting a first scanning signal to be at a high level, setting a second scanning signal to be at a low level, and setting a data voltage signal to be at a second data voltage;
in the light emitting period, the first and second scan signals are set to a low level, and the data voltage signal is set to the first data voltage.
Optionally, the driving method further includes:
and in the charging phase, setting the voltage signal of the common electrode to be low level.
Another embodiment of the present application also provides a display device including:
a display panel; and
a control unit, wherein the control unit comprises a drive circuit as defined in any of the above.
The embodiment of the application provides a driving circuit, a driving method and a display device of a display panel, wherein a first switch unit receives a first scanning signal, a second switch unit receives a second scanning signal, a third switch unit receives a power supply signal provided by a power line, and the on or off of a data voltage signal provided by a data line is controlled to charge a first capacitor unit and a second capacitor unit, so that the current flowing through a light-emitting unit is not influenced by a threshold voltage in the switch unit, and the problem of uneven display of the light-emitting unit is avoided.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a driving circuit of a display panel according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a driving circuit of a display panel according to another embodiment of the present application;
fig. 3 is a schematic flow chart of a driving method according to an embodiment of the present application;
fig. 4 is a schematic driving timing diagram of a driving method according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "comprises" and "comprising," and any variations thereof, in the description and claims of this application and the drawings described above, are intended to cover non-exclusive inclusions. For example, a process, method, or system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus. Further, the terms "first", "second", and "third", etc. are provided to distinguish different objects, and are not provided to describe a specific order.
Fig. 1 is a schematic structural diagram of a driving circuit of a display panel according to an embodiment of the present disclosure. As shown in fig. 1, the drive circuit in the present embodiment includes:
the display device comprises a first switch unit 10, wherein the input end of the first switch unit 10 is connected with a data line, the control end of the first switch unit 10 is connected with a first scanning line, and the first switch unit is arranged to control the on and off of a data voltage signal provided by the data line according to a first scanning signal input by the first scanning line;
a first end of the first capacitor unit 101 is connected with the output end of the first switch unit 10, and a second end of the first capacitor unit 101 is grounded;
the output end of the second switch unit 20 is grounded, the control end of the second switch unit 20 is connected with a second scanning line, and the second scanning line is configured to provide a second scanning signal;
a third switching unit 30, a first control terminal of the third switching unit 30 being connected to the output terminal of the first switching unit 10, a second control terminal of the third switching unit 30 being connected to the input terminal of the second switching unit 20, an input terminal of the third switching unit 30 being connected to a power line, the power line being configured to provide a power signal;
a first end of the second capacitor unit 102 is connected to the second control end of the third switch unit 30, and a second end of the second capacitor unit 102 is connected to the output end of the third switch unit 30; and
and a light emitting unit 103, a first terminal of the light emitting unit 103 being connected to the output terminal of the third switching unit 30, and a second terminal of the light emitting unit 103 being connected to the common electrode VSS.
In one embodiment, the first control terminal and the second control terminal of the third switching unit 30 are configured to simultaneously control the on and off of the third switching unit 30. Specifically, when the first control signal received by the first control terminal and the second control signal received by the second control terminal satisfy the on condition at the same time, the third switching unit 30 is turned on, otherwise, the third switching unit is in the off state.
In one embodiment, the first scan signal and the second scan signal are provided by a timing controller (Tcon) in the display device.
In one embodiment, the first switching unit 10 and the second switching unit 20 are electronic switching tubes.
In one embodiment, the electronic switching tube is an N-type thin film transistor field effect transistor;
the drain electrode of the N-type thin film transistor field effect transistor is the input end of the electronic switch tube, the source electrode of the N-type thin film transistor field effect transistor is the output end of the electronic switch tube, and the grid electrode of the N-type thin film transistor field effect transistor is the control end of the electronic switch tube.
In one embodiment, the electronic switch tube is any one of a polysilicon thin film transistor, an amorphous silicon thin film transistor, a zinc oxide-based thin film transistor or an organic thin film transistor.
Fig. 2 is a schematic structural diagram of a driving circuit of a display panel according to another embodiment of the present disclosure. In one embodiment, referring to fig. 2, the first capacitor unit 101 includes a first capacitor C1, a first terminal of the first capacitor C1 is used as a first terminal of the first capacitor unit 101, and a second terminal of the first capacitor C1 is used as a second terminal of the first capacitor unit 101.
In one embodiment, the first capacitance unit 101 may also be a series connection or a parallel connection of a plurality of capacitances, for example, a first end of the plurality of series-connected capacitances serves as a first end of the first capacitance unit 101, and a second end of the plurality of series-connected capacitances serves as a second end of the first capacitance unit 101.
In one embodiment, referring to fig. 2, the second capacitor unit 102 includes a second capacitor C2, a first terminal of the second capacitor C2 is used as a first terminal of the second capacitor unit 102, and a second terminal of the second capacitor C2 is used as a second terminal of the second capacitor unit 102.
In one embodiment, the second capacitance unit 102 may also be a series connection or a parallel connection of a plurality of capacitances, for example, a first end of the plurality of series-connected capacitances serves as a first end of the second capacitance unit 102, and a second end of the plurality of series-connected capacitances serves as a second end of the second capacitance unit 102.
In one embodiment, referring to fig. 2, the light emitting unit 103 comprises a micro light emitting diode uued, an anode of the micro light emitting diode uued being a first end of the light emitting unit 103, and a cathode of the micro light emitting diode uued being a second end of the light emitting unit 103.
Referring to fig. 2, in one embodiment, the first switching unit 10 includes a first thin film transistor M1, a drain of the first thin film transistor M1 is an input terminal of the first switching unit 10, a source of the first thin film transistor M1 is an output terminal of the first switching unit 10, and a gate of the first thin film transistor M1 is a control terminal of the first switching unit 10.
Referring to fig. 2, in one embodiment, the second switching unit 20 includes a second thin film transistor M2, a drain of the second thin film transistor M2 is an input terminal of the second switching unit 20, a source of the second thin film transistor M2 is an output terminal of the second switching unit 20, and a gate of the second thin film transistor M2 is a control terminal of the second switching unit 20.
Referring to fig. 2, in one embodiment, the third switching unit 30 includes a third thin film transistor M3, a drain of the third thin film transistor M3 is an input terminal of the third switching unit 30, a source of the third thin film transistor M3 is an output terminal of the third switching unit 30, and a gate of the third thin film transistor M3 is a control terminal of the third switching unit 30.
In one embodiment, the output terminal of the first switching unit 10 is set to a node n, the input terminal of the second switching unit 20 is set to a node m, and the input terminal of the light emitting unit 103 is set to a node o.
Referring to fig. 2, in one embodiment, a driving circuit of a display panel includes:
a first thin film transistor M1, a drain of the first thin film transistor M1 is connected to the data line, a gate of the first thin film transistor M1 is connected to the first scan line, and configured to control on and off of a data voltage signal provided by the data line according to a first scan signal input by the first scan line;
a first capacitor C1, wherein a first end of the first capacitor C1 is connected to the source of the first thin film transistor M1, and a second end of the first capacitor C1 is grounded;
a second thin film transistor M2, a source of the second thin film transistor M2 is grounded, a gate of the second thin film transistor M2 is connected to a second scan line, and the second scan line is configured to provide a second scan signal;
a third thin film transistor M3, a first gate of the third thin film transistor M3 is connected to the source of the first thin film transistor M1, a second gate of the third thin film transistor M3 is connected to the drain of the second thin film transistor M2, a drain of the third thin film transistor M3 is connected to a power line, and the power line is configured to provide a power signal;
a second capacitor C2, wherein a first terminal of the second capacitor C2 is connected to the second gate of the third tft M3, and a second terminal of the second capacitor C2 is connected to the source of the third tft M3; and
and the anode of the micro light-emitting diode uLED is connected with the source electrode of the third thin film transistor M3, and the cathode of the micro light-emitting diode uLED is connected with the common electrode VSS.
In one embodiment, the source of the first thin film transistor M1 is set to node n, the drain of the second thin film transistor M2 is set to node M, and the anode of the micro light emitting diode uLED is set to node o.
Fig. 3 is a flowchart illustrating a driving method of a driving circuit of a display panel according to any one of the above embodiments according to an embodiment of the present application.
As shown in fig. 3, the driving method in the present embodiment includes:
in an initialization stage, the first scanning signal and the second scanning signal are set to be at a high level, the data voltage signal is set to be a first data voltage, and the first data voltage is a low level signal.
In the threshold voltage compensation stage, setting the first scanning signal and the second scanning signal as high levels, and setting the data voltage signal as a second data voltage;
in a charging stage, setting a first scanning signal to be at a high level, setting a second scanning signal to be at a low level, and setting a data voltage signal to be at a second data voltage;
in the light emitting period, the first and second scan signals are set to a low level, and the data voltage signal is set to the first data voltage.
In one embodiment, the driving method in the present embodiment further includes:
in the charging phase, the voltage signal of the common electrode VSS is set to a low level.
Fig. 4 is a schematic driving timing diagram of a driving method according to an embodiment of the present application.
As shown in fig. 4, in the driving process of the driving circuit, the whole driving process is divided into four phases including an initialization phase T1, a threshold voltage compensation phase T2, a charging phase T3, and a light emitting phase T4.
Specifically, the frame time T is (T1+ T2+ T3+ T4) · T, where T is the number of scan lines, that is, the number of times of scanning of one frame, and if the scan frequency is 60HZ, the frame time T is 1/60 ═ 16.7ms, and if the scan frequency is 120HZ, the frame time T is 1/120 ═ 8.33ms, for example, for a High resolution (High Definition, HD)1366 ═ 768 gate lines, T ═ 768, and for a Full High resolution (Full Definition, FHD) (in the case of 60HZ, 120HZ may correspond to 10.85 μ s), and for a Full High resolution (Full Definition, FHD), T is 1080, T is T1+ T9634 ═ 12, T967 × T6 ═ 2166 ═ 7, T2167 ═ 12 μ s, T is 367 ═ 27 μ s, T × 367 ═ 7 μ s, T9 ═ 12 μ s, T11 ═ 6 ═ 7 μ s, T ═ 7 μ s, T11 ═ 7.
In one embodiment, the common electrode VSS is provided with a predetermined voltage signal configured to improve the stability of the driving circuit.
In the initialization stage T1, the first scan signal Gate1 and the second scan signal Gate2 are both at a high level VGH, at this time, the first thin film transistor M1 and the second thin film transistor M2 are turned on, at this time, the node M and the node n are inputted with initialization signals, the initialization signals are signals respectively flowing through the first thin film transistor M1 and the second thin film transistor M2 after the first thin film transistor M1 and the second thin film transistor M2 are turned on, meanwhile, the power signal VDD is at a low level VDD _ L, the voltage signal Vss of the common electrode is at a high level, and the first data voltage is at a low level, so that no current flows through the micro light emitting diode uLED.
In the threshold voltage compensation period T2, the power signal VDD is at a high level VDD _ H, the Data voltage signal Data is set to the second Data voltage VData, the voltage at the node o becomes-VTH 3, and VTH3 is the threshold voltage of the third tft M3, at which time, the voltage at the node M is 0V, and the on state of the third tft M3 is determined by the voltage at the node n.
In the charging period T3, the second scan signal Gata2 is set to the low level VGL, and the node m is in a floating state, i.e., a state without signal input, the common electrode VSS is set to the low level, the voltage Vm at the node m is VTH3 due to the coupling effect of the second capacitor C2, and the second data voltage VData is written into the node n due to the first scan signal Gata set to the high level VGH, i.e., the voltage Vn at the node n is VData.
In the light emitting period T4, the first scan signal Gata and the second scan signal Gata2 are both set to the low level VGL, and at this time, the first thin film transistor M1 and the second thin film transistor M2 are both in the off state, and the current flowing through the micro light emitting diode uuled is IuLED, specifically,
where β is the effect coefficient of the third thin film transistor M3, the third thin film transistor M3 is a double-gate thin film transistor, specifically,
therefore, the simplified current IuLED flowing through the micro light emitting diode uuled is:
where k is a constant related to the mobility of the semiconductor layer. k is u · Cox · W/L, u is the electron mobility of the semiconductor layer, Cox is the capacitance per unit area of a metal-insulator-semiconductor (MIS) structure of a thin film transistor device, and W/L is the width-to-length ratio of the TFT channel.
As can be seen from the above formula, the current flowing through the third thin film transistor M3 is a formula unrelated to VTH3, and in this case, the third thin film transistor M3 serves as a driving switching tube, so that the threshold voltage shift of the driving switching tube has no great influence on the driving current IuLED of the micro light emitting diode uLED, and thus a high-quality display image can be obtained.
Fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present application.
As shown in fig. 5, the display device 60 in the present embodiment includes:
a display panel 60; and
a control unit 61, wherein the control unit 61 comprises a drive circuit 610 as defined in any of the above.
In one embodiment, the Display device 60 can be any type of Display device provided with the driving circuit 610, such as a Liquid Crystal Display (LCD), an Organic electroluminescent Display (OLED) Display device, a Quantum Dot Light Emitting diode (QLED) Display device, a curved Display device, or the like.
In one embodiment, the display panel 62 includes a pixel array composed of rows of pixels and columns of pixels.
In one embodiment, the control Unit 61 may be implemented by a general-purpose Integrated Circuit, such as a Central Processing Unit (CPU), or an Application Specific Integrated Circuit (ASIC).
The embodiment of the application provides a driving circuit, a driving method and a display device of a display panel, wherein a first switch unit receives a first scanning signal, a second switch unit receives a second scanning signal, a third switch unit receives a power supply signal provided by a power line, and the on or off of a data voltage signal provided by a data line is controlled to charge a first capacitor unit and a second capacitor unit, so that the current flowing through a light-emitting unit is not influenced by a threshold voltage in the switch unit, and the problem of uneven display of the light-emitting unit is avoided.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.
The above description is only exemplary of the present application and should not be taken as limiting the present application, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present application should be included in the scope of the present application.
Claims (7)
1. A driving method of a driving circuit applied to a display panel, the driving circuit comprising:
the input end of the first switch unit is connected with the data line, and the control end of the first switch unit is connected with the first scanning line and is arranged to control the on and off of a data voltage signal provided by the data line according to a first scanning signal input by the first scanning line;
a first end of the first capacitor unit is connected with the output end of the first switch unit, and a second end of the first capacitor unit is grounded;
the output end of the second switch unit is grounded, the control end of the second switch unit is connected with a second scanning line, and the second scanning line is used for providing a second scanning signal;
a third switching unit, a first control terminal of which is connected to an output terminal of the first switching unit, a second control terminal of which is connected to an input terminal of the second switching unit, an input terminal of which is connected to a power line, the power line being configured to provide a power signal;
a first end of the second capacitor unit is connected with a second control end of the third switch unit, and a second end of the second capacitor unit is connected with an output end of the third switch unit; and
a first end of the light emitting unit is connected with the output end of the third switching unit, and a second end of the light emitting unit is connected with the common electrode;
setting a node n at the output end of the first switch unit, setting a node m at the input end of the second switch unit, and setting a node o at the input end of the light-emitting unit;
the driving method includes:
in an initialization stage, setting a first scanning signal and a second scanning signal as high level, setting a data voltage signal as a first data voltage, and setting the first data voltage as a low level signal;
in the threshold voltage compensation stage, setting the first scanning signal and the second scanning signal as high levels, and setting the data voltage signal as a second data voltage; the voltage at the node o becomes-VTH 3, VTH3 being the threshold voltage of the third thin film transistor M3;
in a charging stage, setting a first scanning signal to be at a high level, setting a second scanning signal to be at a low level, and setting a data voltage signal to be at a second data voltage; the node m is in a suspended state, and a second data voltage is written into the node n;
setting a first scanning signal and a second scanning signal to a low level and a data voltage signal to the first data voltage in a light emitting period;
the current IuLED flowing through the light emitting unit is:
where k is u · Cox · W/L, u is the electron mobility of the semiconductor layer, Cox is the capacitance per unit area of the metal-insulator-semiconductor structure of the thin film transistor device, W/L is the width-to-length ratio of the channel of the third switching cell, VGSIs the gate-source voltage of the third switching unit;
the first switch unit, the second switch unit and the third switch unit are all electronic switch tubes, and the electronic switch tubes are N-type thin film transistor field effect tubes; the drain electrode of the N-type thin film transistor is the input end of the electronic switch tube, the source electrode of the N-type thin film transistor is the output end of the electronic switch tube, and the grid electrode of the N-type thin film transistor is the control end of the electronic switch tube.
2. The driving method according to claim 1, wherein the first capacitance unit includes a first capacitance, a first terminal of the first capacitance serves as a first terminal of the first capacitance unit, and a second terminal of the first capacitance serves as a second terminal of the first capacitance unit.
3. The driving method according to claim 1, wherein the second capacitance unit includes a second capacitance, a first terminal of the second capacitance is used as the first terminal of the second capacitance unit, and a second terminal of the second capacitance is used as the second terminal of the second capacitance unit.
4. The driving method according to claim 1, wherein the light emitting unit includes a micro light emitting diode, an anode of the micro light emitting diode is a first end of the light emitting unit, and a cathode of the micro light emitting diode is a second end of the light emitting unit.
5. The driving method according to claim 1, wherein the electronic switching tube is any one of a polycrystalline silicon thin film transistor, an amorphous silicon thin film transistor, a zinc oxide-based thin film transistor, or an organic thin film transistor.
6. The driving method according to claim 1, further comprising:
and in the charging phase, setting the voltage signal of the common electrode to be low level.
7. A display device, comprising:
a display panel; and
control unit, wherein the control unit is adapted to perform the driving method according to any of claims 1-6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910054282.6A CN109637435B (en) | 2019-01-21 | 2019-01-21 | Driving circuit and driving method of display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910054282.6A CN109637435B (en) | 2019-01-21 | 2019-01-21 | Driving circuit and driving method of display panel and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109637435A CN109637435A (en) | 2019-04-16 |
| CN109637435B true CN109637435B (en) | 2021-03-26 |
Family
ID=66061510
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910054282.6A Active CN109637435B (en) | 2019-01-21 | 2019-01-21 | Driving circuit and driving method of display panel and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109637435B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110288947A (en) * | 2019-06-28 | 2019-09-27 | 京东方科技集团股份有限公司 | A kind of pixel circuit and its driving method, display device |
| CN112947655B (en) * | 2021-01-26 | 2022-10-28 | 厦门天马微电子有限公司 | Voltage stabilizing circuit, voltage stabilizing method and display device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104732927A (en) * | 2015-04-09 | 2015-06-24 | 京东方科技集团股份有限公司 | Pixel circuit, drive method thereof and display device |
| CN107424563A (en) * | 2016-05-23 | 2017-12-01 | 乐金显示有限公司 | Organic LED display device |
| CN107358915B (en) * | 2017-08-11 | 2020-01-07 | 上海天马有机发光显示技术有限公司 | Pixel circuit, driving method thereof, display panel and display device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5832399B2 (en) * | 2011-09-16 | 2015-12-16 | 株式会社半導体エネルギー研究所 | Light emitting device |
| KR102241704B1 (en) * | 2014-08-07 | 2021-04-20 | 삼성디스플레이 주식회사 | Pixel circuit and organic light emitting display device having the same |
-
2019
- 2019-01-21 CN CN201910054282.6A patent/CN109637435B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104732927A (en) * | 2015-04-09 | 2015-06-24 | 京东方科技集团股份有限公司 | Pixel circuit, drive method thereof and display device |
| CN107424563A (en) * | 2016-05-23 | 2017-12-01 | 乐金显示有限公司 | Organic LED display device |
| CN107358915B (en) * | 2017-08-11 | 2020-01-07 | 上海天马有机发光显示技术有限公司 | Pixel circuit, driving method thereof, display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109637435A (en) | 2019-04-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110176213B (en) | Pixel circuit, driving method thereof and display panel | |
| US10242620B2 (en) | Pixel circuit, method for driving the same, display panel, and display device | |
| CN105957473B (en) | A kind of organic light emitting display panel and its driving method | |
| CN104134426B (en) | Pixel structure and driving method thereof, and display device | |
| US9430968B2 (en) | Display device and drive method for same | |
| CN109584786B (en) | Driving circuit and driving method of display panel and display device | |
| US9645662B2 (en) | Pixel circuit, display panel and display apparatus | |
| US20220223111A1 (en) | Source driver, display panel and control method therefor, and display apparatus | |
| US9412302B2 (en) | Pixel driving circuit, driving method, array substrate and display apparatus | |
| US9905166B2 (en) | Pixel driving circuit, pixel driving method and display apparatus | |
| WO2017177702A1 (en) | Drive method for preventing afterimage on display panel during power-off, and display device | |
| CN113689825A (en) | Driving circuit, driving method and display device | |
| US9275597B2 (en) | Display device | |
| CN108154834A (en) | The cross-pressure detection method of electroluminescence display panel and luminescent device | |
| US20150378470A1 (en) | Pixel circuit, display panel and display apparatus | |
| CN109493790A (en) | Driving circuit and driving method of display panel and display device | |
| US11900873B2 (en) | Display panels, methods of driving the same, and display devices | |
| CN114220401A (en) | Display device with gate driver | |
| KR20180074949A (en) | Display Device And Method Of Driving The Same | |
| CN109637435B (en) | Driving circuit and driving method of display panel and display device | |
| CN103489393B (en) | Display | |
| CN108877648B (en) | Driving circuit of light emitting device, driving method thereof and display device | |
| US9349338B2 (en) | Display device and method for driving same | |
| CN109584785B (en) | Driving circuit and driving method of display panel and display device | |
| KR20150086771A (en) | Gate driver and display apparatus |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |