CN109584785B - Driving circuit and driving method of display panel and display device - Google Patents

Driving circuit and driving method of display panel and display device Download PDF

Info

Publication number
CN109584785B
CN109584785B CN201910054301.5A CN201910054301A CN109584785B CN 109584785 B CN109584785 B CN 109584785B CN 201910054301 A CN201910054301 A CN 201910054301A CN 109584785 B CN109584785 B CN 109584785B
Authority
CN
China
Prior art keywords
unit
light emitting
data voltage
capacitance
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910054301.5A
Other languages
Chinese (zh)
Other versions
CN109584785A (en
Inventor
吴川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HKC Co Ltd
Original Assignee
HKC Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HKC Co Ltd filed Critical HKC Co Ltd
Priority to CN201910054301.5A priority Critical patent/CN109584785B/en
Publication of CN109584785A publication Critical patent/CN109584785A/en
Application granted granted Critical
Publication of CN109584785B publication Critical patent/CN109584785B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

The embodiment of the application belongs to the technical field of display, and provides a driving circuit, a driving method and a display device of a display panel.

Description

Driving circuit and driving method of display panel and display device
Technical Field
The embodiment of the application belongs to the technical field of display, and particularly relates to a driving circuit, a driving method and a display device of a display panel.
Background
With the continuous development of display technology, display devices such as liquid crystal panels and displays are continuously developing towards high resolution, large screen, low power consumption and low cost. The liquid crystal panel comprises pixel units which are arranged in rows and columns, when the liquid crystal panel works, a grid driving signal controls the on and off of a Thin Film Transistor (TFT) in the pixel unit, so that the line scanning of the liquid crystal panel is completed, the function of displaying images by the liquid crystal panel is realized, and in order to improve the display effect, an active array LED driving circuit is usually adopted for driving the display panel.
However, the current of the thin film transistor drifts due to the drift of the threshold voltage under the gate stress (gate stress) of the thin film transistor for a long time, so that the micro light emitting diode has the problem of uneven display.
Content of application
The embodiment of the application provides a driving circuit, a driving method and a display device of a display panel, and aims to solve the problem that the current of a thin film transistor drifts due to the drift of threshold voltage under long-time gate stress (gate stress) of the thin film transistor, so that a micro light-emitting diode displays unevenly.
The embodiment of the application provides a drive circuit of a display panel, including:
the input end of the first switch unit is connected with a data line, and the control end of the first switch unit is connected with a first scanning line and used for receiving a data voltage signal provided by the data line according to a first scanning signal input by the first scanning line;
the control end of the second switch unit is connected with the second scanning line and used for receiving a second scanning signal input by the second scanning line;
the input end of the third switching unit is connected with the output end of the second switching unit, and the control end of the third switching unit is connected with a third scanning line and used for receiving a third scanning signal input by the third scanning line;
a first end of the light emitting unit is connected with the output end of the third switch unit, and a second end of the light emitting unit is connected with a common electrode;
the first end of the first capacitor unit is connected with the output end of the first switch unit;
a second capacitor unit, a first end of the second capacitor unit being connected to a first end of the light emitting unit; and
and the control end of the fourth switch unit, the second end of the first capacitor unit, the second end of the second capacitor unit and the input end of the second switch unit are connected in common, the output end of the fourth switch unit is connected with the input end of the third switch unit, and the input end of the fourth switch unit is connected with the power line.
Optionally, the first switch unit, the second switch unit and the third switch unit are electronic switch tubes.
Optionally, the electronic switching tube is an N-type thin film transistor field effect transistor;
the drain electrode of the N-type thin film transistor is the input end of the electronic switch tube, the source electrode of the N-type thin film transistor is the output end of the electronic switch tube, and the grid electrode of the N-type thin film transistor is the control end of the electronic switch tube.
Optionally, the first capacitor unit includes a first capacitor, a first end of the first capacitor is used as a first end of the first capacitor unit, and a second end of the first capacitor is used as a second end of the first capacitor unit.
Optionally, the second capacitor unit includes a second capacitor, a first end of the second capacitor is used as a first end of the second capacitor unit, and a second end of the second capacitor is used as a second end of the second capacitor unit.
Optionally, the light emitting unit includes a micro light emitting diode, an anode of the micro light emitting diode is a first end of the light emitting unit, and a cathode of the micro light emitting diode is a second end of the light emitting unit.
An embodiment of the present application further provides a driving method of any one of the driving circuits, where the driving method includes:
in an initialization stage, setting a first scanning signal and a second scanning signal as high level, setting a third scanning signal as low level, and setting a data voltage signal as a first data voltage;
in a threshold voltage compensation stage, setting the first scan signal to a high level, setting the second scan signal and the third scan signal to a low level, and setting the data voltage signal to a first data voltage;
in a charging phase, setting the first scanning signal to be at a high level, setting the second scanning signal and the third scanning signal to be at a low level, and setting the data voltage signal to be at a second data voltage;
in a light emitting stage, the first scan signal and the second scan signal are set to a low level, the third scan signal is set to a high level, and the data voltage signal is set to a first data voltage.
Optionally, the driving method further includes:
in the initialization phase, the first capacitor unit is charged to the threshold voltage of the fourth switch unit.
Optionally, the driving method further includes:
in the charging phase, the first capacitor unit is charged to the second data voltage.
Another embodiment of the present application also provides a display device including:
a display panel; and
a control unit electrically connected to the display panel, wherein the control unit includes the driving circuit according to any one of the embodiments.
The embodiment of the application provides a driving circuit, a driving method and a display device of a display panel, wherein a first scanning signal provided by a first scanning line controls a first switch unit, a second scanning signal provided by a second scanning line controls a second switch unit, and a third scanning signal provided by a third scanning line controls a third switch unit, so that the on or off of a power supply signal provided by a power supply line and a data voltage signal provided by a data line is controlled, the first capacitor unit and the second capacitor unit are charged, the current flowing through a light-emitting unit is not influenced by the threshold voltage of the driving unit, and the problem of uneven display of the light-emitting unit is avoided.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a driving circuit of a display panel according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a driving circuit of a display panel according to another embodiment of the present application;
fig. 3 is a schematic flow chart of a driving method according to an embodiment of the present application;
fig. 4 is a schematic driving timing diagram of a driving method according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "comprises" and "comprising," and any variations thereof, in the description and claims of this application and the drawings described above, are intended to cover non-exclusive inclusions. For example, a process, method, or system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus. Furthermore, the terms "first," "second," and "third," etc. are used to distinguish between different objects and are not used to describe a particular order.
Fig. 1 is a schematic structural diagram of a driving circuit of a display panel according to an embodiment of the present disclosure. As shown in fig. 1, the driving circuit of the display panel in the present embodiment includes:
the input end of the first switch unit 10 is connected with a data line, and the control end of the first switch unit 10 is connected with a first scan line, and is configured to receive a data voltage signal provided by the data line according to a first scan signal input by the first scan line;
a second switch unit 20, a control end of the second switch unit 20 is connected to a second scan line, and is configured to receive a second scan signal input by the second scan line;
a third switching unit 30, an input terminal of the third switching unit 30 is connected to the output terminal of the second switching unit 20, and a control terminal of the third switching unit 30 is connected to a third scan line, and is configured to receive a third scan signal input by the third scan line;
a light emitting unit 103, a first end of the light emitting unit 103 being connected to the output end of the third switching unit 30, and a second end of the light emitting unit being connected to a common electrode;
a first capacitor unit 101, wherein a first end of the first capacitor unit 101 is connected to an output end of the first switch unit 10;
a second capacitor unit 102, wherein a first end of the second capacitor unit 102 is connected with a first end of the light emitting unit 103;
a fourth switching unit 40, a control terminal of the fourth switching unit 40, a second terminal of the first capacitor unit 101, a second terminal of the second capacitor unit 102, and an input terminal of the second switching unit 20 are connected in common, an output terminal of the fourth switching unit 40 is connected to an input terminal of the third switching unit 30, and an input terminal of the fourth switching unit 40 is connected to a power line.
In one embodiment, the first switch unit 10, the second switch unit 20, and the third switch unit 30 are electronic switch tubes.
In one embodiment, the electronic switching tube is an N-type thin film transistor field effect transistor;
the drain electrode of the N-type thin film transistor is the input end of the electronic switch tube, the source electrode of the N-type thin film transistor is the output end of the electronic switch tube, and the grid electrode of the N-type thin film transistor is the control end of the electronic switch tube.
Fig. 2 is a schematic structural diagram of a driving circuit of a display panel according to another embodiment of the present disclosure. Referring to fig. 2, in one embodiment, the first capacitor unit 101 includes a first capacitor C1, a first terminal of the first capacitor C1 is used as a first terminal of the first capacitor unit 101, and a second terminal of the first capacitor C1 is used as a second terminal of the first capacitor unit 101.
In one embodiment, the first capacitance unit 101 may also be a series connection or a parallel connection of a plurality of capacitances, for example, a first end of the plurality of series-connected capacitances serves as a first end of the first capacitance unit 101, and a second end of the plurality of series-connected capacitances serves as a second end of the first capacitance unit 101.
Referring to fig. 2, in one embodiment, the second capacitor unit 102 includes a second capacitor, a first terminal of the second capacitor C2 is used as a first terminal of the second capacitor unit 102, and a second terminal of the second capacitor C2 is used as a second terminal of the second capacitor unit 102.
In one embodiment, the second capacitance unit 102 may also be a series connection or a parallel connection of a plurality of capacitances, for example, a first end of the plurality of series-connected capacitances serves as a first end of the second capacitance unit 102, and a second end of the plurality of series-connected capacitances serves as a second end of the second capacitance unit 102.
Referring to fig. 2, in one embodiment, the light emitting unit 103 includes a micro light emitting diode uued, an anode of the micro light emitting diode uued is a first end of the light emitting unit 103, and a cathode of the micro light emitting diode uued is a second end of the light emitting unit 103.
Referring to fig. 2, in one embodiment, the first switching unit 10 includes a first thin film transistor M1, a drain of the first thin film transistor M1 is an input terminal of the first switching unit 10, a source of the first thin film transistor M1 is an output terminal of the first switching unit 10, and a gate of the first thin film transistor M1 is a control terminal of the first switching unit 10.
Referring to fig. 2, in one embodiment, the second switching unit 20 includes a second thin film transistor M2, a drain of the second thin film transistor M2 is an input terminal of the second switching unit 20, a source of the second thin film transistor M2 is an output terminal of the second switching unit 20, and a gate of the second thin film transistor M2 is a control terminal of the second switching unit 20.
Referring to fig. 2, in one embodiment, the third switching unit 30 includes a third thin film transistor M3, a drain of the third thin film transistor M3 is an input terminal of the third switching unit 30, a source of the third thin film transistor M3 is an output terminal of the third switching unit 30, and a gate of the third thin film transistor M3 is a control terminal of the third switching unit 30.
Referring to fig. 2, in one embodiment, the fourth switching unit 40 includes a fourth thin film transistor M4, a drain of the fourth thin film transistor M4 is an input terminal of the fourth switching unit 40, a source of the fourth thin film transistor M4 is an output terminal of the fourth switching unit 40, and a gate of the fourth thin film transistor M4 is a control terminal of the fourth switching unit 40.
In one embodiment, the output terminal of the first switching unit 10 is set to a node o, the control terminal of the fourth switching unit is set to a node m, and the first terminal of the light emitting unit 103 is set to a node n.
In one embodiment, the common electrode VSS is configured to provide a predetermined voltage signal for improving the stability of the driving circuit.
In one embodiment, the common electrode VSS may be directly grounded.
Fig. 3 is a schematic flowchart of a driving method of a driving circuit according to any one of the above embodiments according to an embodiment of the present application. As shown in fig. 3, the driving method in the present embodiment includes:
in an initialization stage, setting a first scanning signal and a second scanning signal as high level, setting a third scanning signal as low level, and setting a data voltage signal as a first data voltage;
in a threshold voltage compensation stage, setting the first scan signal to a high level, the second scan signal and the third scan signal to a low level, and the data voltage signal to a first data voltage;
in a charging phase, setting the first scanning signal to be at a high level, setting the second scanning signal and the third scanning signal to be at a low level, and setting the data voltage signal to be at a second data voltage;
in a light emitting period, the first scan signal and the second scan signal are set to a low level, the third scan signal is set to a high level, and the data voltage signal is set to a first data voltage.
In one embodiment, the driving method further includes:
in the initialization phase, the first capacitor unit 101 is charged to the threshold voltage of the fourth switch unit 40.
In one embodiment, the driving method further includes:
in the charging phase, the first capacitor unit 101 is charged to the first data voltage.
Fig. 4 is a schematic driving timing diagram of a driving method according to an embodiment of the present application. As shown in fig. 4, in the driving process of the driving circuit, the whole driving process is divided into four phases including an initialization phase T1, a threshold voltage compensation phase T2, a charging phase T3, and a light emitting phase T4.
Specifically, the frame time T is (T1+ T2+ T3+ T4) · T, where T is the number of scan lines, that is, the number of times of scanning of one frame, and if the scan frequency is 60HZ, the frame time T is 1/60 ═ 16.7ms, and if the scan frequency is 120HZ, the frame time T is 1/120 ═ 8.33ms, for example, for a High resolution (High Definition, HD)1366 ═ 768 gate lines, T ═ 768, and for a Full High resolution (Full Definition, FHD) (in the case of 60HZ, 120HZ may correspond to 10.85 μ s), and for a Full High resolution (Full Definition, FHD), T is 1080, T is T1+ T9634 ═ 12, T967 × T6 ═ 2166 ═ 7, T2167 ═ 12 μ s, T is 367 ═ 27 μ s, T × 367 ═ 7 μ s, T9 ═ 12 μ s, T11 ═ 6 ═ 7 μ s, T ═ 7 μ s, T11 ═ 7.
In the initialization stage T1, the first and second scan signals Gate1 and Gate2 are set to the high level VGH, the first and second thin film transistors M1 and M2 are simultaneously turned on, the third scan signal Gate3 is set to the low level VGL, and the third thin film transistor M3 is turned off, at which time, the data voltage signal is set to the first data voltage Vref, the threshold voltage Vth _4 of the fourth thin film transistor M4 is stored in the first capacitor C1, and the voltages of the node M and the node n are initialized.
In the threshold voltage compensation period T2, the second scan signal Gate2 changes to the low level VGL, and at this time, the second thin film transistor M2 is turned off, and the first data voltage Vref is written.
In the charging period T3, the second scan signal Gate2 changes to the low level VGL, at this time, the second thin film transistor M2 is turned off, the Data voltage signal changes to the High level Data High, that is, the Data voltage signal is set to the second Data voltage VData, the second Data voltage VData is greater than the first Data voltage Vref, and the second Data voltage VData is written into the first capacitor C1, at this time, the input of the Data voltage signal is completed.
In the light emitting period T4, the first scan signal Gate1 changes to the low level VGL, the third scan signal Gate3 changes to VGH, the third thin film transistor M3 is turned on, the second scan signal Gate2 maintains the low level VGL, at this time, the second thin film transistor M2 is turned off, at this time, the fourth thin film transistor M4 operates in the saturation region, the driving current flows through the micro light emitting diode uLED, the lighting operation is completed, at this time, the voltage of the node n can also be fed back to the first capacitor C1 through the second capacitor C2, and the current IuLED flowing through the micro light emitting diode uLED is:
Figure GDA0002740298590000091
wherein VData is a second data voltage, Vref is a first data voltage, k is a constant related to the mobility of the semiconductor layer, k is u · Cox · W/L, u is the electron mobility of the semiconductor layer, Cox is the capacitance per unit area of a metal-insulator-semiconductor (MIS) structure of a thin film transistor device, and W/L is the width-to-length ratio of the TFT channel.
As can be seen from the above formula, the current flowing through the third thin film transistor M3 is a formula unrelated to the threshold voltage Vth of the third thin film transistor M3, and at this time, the third thin film transistor M3 serves as a driving switch, so that the threshold voltage shift of the driving switch has no great influence on the driving current IuLED of the micro light emitting diode uLED, and a high-quality display image can be obtained.
Fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present application. As shown in fig. 5, the display device 60 in the present embodiment includes:
a display panel 60; and
the control unit 61 is electrically connected to the display panel 60, wherein the control unit 61 includes the driving circuit 610 according to any one of the above descriptions.
In one embodiment, the Display device 60 can be any type of Display device provided with the driving circuit 610, such as a Liquid Crystal Display (LCD), an Organic electroluminescent Display (OLED) Display device, a Quantum Dot Light Emitting diode (QLED) Display device, a curved Display device, or the like.
In one embodiment, the display panel 62 includes a pixel array composed of rows of pixels and columns of pixels.
In one embodiment, the control Unit 61 may be implemented by a general-purpose Integrated Circuit, such as a Central Processing Unit (CPU), or an Application Specific Integrated Circuit (ASIC).
The embodiment of the application provides a driving circuit, a driving method and a display device of a display panel, wherein a first scanning signal provided by a first scanning line controls a first switch unit, a second scanning signal provided by a second scanning line controls a second switch unit, and a third scanning signal provided by a third scanning line controls a third switch unit, so that the on or off of a power supply signal provided by a power supply line and a data voltage signal provided by a data line is controlled, the first capacitor unit and the second capacitor unit are charged, the current flowing through a light-emitting unit is not influenced by the threshold voltage of the driving unit, and the problem of uneven display of the light-emitting unit is avoided.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.
The above description is only exemplary of the present application and should not be taken as limiting the present application, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present application should be included in the scope of the present application.

Claims (9)

1. A driving method of a driving circuit of a display panel, the driving circuit comprising:
the input end of the first switch unit is connected with a data line, and the control end of the first switch unit is connected with a first scanning line and used for receiving a data voltage signal provided by the data line according to a first scanning signal input by the first scanning line;
the control end of the second switch unit is connected with the second scanning line and used for receiving a second scanning signal input by the second scanning line;
the input end of the third switching unit is connected with the output end of the second switching unit, and the control end of the third switching unit is connected with a third scanning line and used for receiving a third scanning signal input by the third scanning line;
a first end of the light emitting unit is connected with the output end of the third switch unit, and a second end of the light emitting unit is connected with a common electrode;
the first end of the first capacitor unit is connected with the output end of the first switch unit;
a second capacitor unit, a first end of the second capacitor unit being connected to a first end of the light emitting unit; and
a control end of the fourth switch unit, a second end of the first capacitor unit, a second end of the second capacitor unit and an input end of the second switch unit are connected in common, an output end of the fourth switch unit is connected with an input end of the third switch unit, and an input end of the fourth switch unit is connected with a power line;
the public electrode is connected with a preset voltage signal;
the driving method includes:
in an initialization stage, setting a first scanning signal and a second scanning signal as high level, setting a third scanning signal as low level, and setting a data voltage signal as a first data voltage;
in a threshold voltage compensation stage, setting the first scan signal to a high level, setting the second scan signal and the third scan signal to a low level, and setting the data voltage signal to a first data voltage;
in a charging phase, setting the first scanning signal to be at a high level, setting the second scanning signal and the third scanning signal to be at a low level, and setting the data voltage signal to be at a second data voltage;
in a light emitting stage, the first scan signal and the second scan signal are set to a low level, the third scan signal is set to a high level, and the data voltage signal is set to a first data voltage.
2. The driving method according to claim 1, wherein the first switching unit, the second switching unit, and the third switching unit are electronic switching tubes.
3. The driving method according to claim 2, wherein the electronic switching tube is an N-type thin film transistor field effect transistor;
the drain electrode of the N-type thin film transistor is the input end of the electronic switch tube, the source electrode of the N-type thin film transistor is the output end of the electronic switch tube, and the grid electrode of the N-type thin film transistor is the control end of the electronic switch tube.
4. The driving method according to claim 1, wherein the first capacitance unit includes a first capacitance, a first terminal of the first capacitance serves as a first terminal of the first capacitance unit, and a second terminal of the first capacitance serves as a second terminal of the first capacitance unit.
5. The driving method according to claim 1, wherein the second capacitance unit includes a second capacitance, a first terminal of the second capacitance is used as the first terminal of the second capacitance unit, and a second terminal of the second capacitance is used as the second terminal of the second capacitance unit.
6. The driving method according to claim 1, wherein the light emitting unit includes a micro light emitting diode, an anode of the micro light emitting diode is a first end of the light emitting unit, and a cathode of the micro light emitting diode is a second end of the light emitting unit.
7. The driving method according to claim 1, further comprising:
in the initialization phase, the first capacitor unit is charged to the threshold voltage of the fourth switch unit.
8. The driving method according to claim 1, further comprising:
in the charging phase, the first capacitor unit is charged to the second data voltage.
9. A display device, comprising:
a display panel; and
a control unit electrically connected to the display panel, wherein the control unit is configured to perform the driving method according to any one of claims 1 to 6.
CN201910054301.5A 2019-01-21 2019-01-21 Driving circuit and driving method of display panel and display device Active CN109584785B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910054301.5A CN109584785B (en) 2019-01-21 2019-01-21 Driving circuit and driving method of display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910054301.5A CN109584785B (en) 2019-01-21 2019-01-21 Driving circuit and driving method of display panel and display device

Publications (2)

Publication Number Publication Date
CN109584785A CN109584785A (en) 2019-04-05
CN109584785B true CN109584785B (en) 2021-03-26

Family

ID=65917258

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910054301.5A Active CN109584785B (en) 2019-01-21 2019-01-21 Driving circuit and driving method of display panel and display device

Country Status (1)

Country Link
CN (1) CN109584785B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111477178A (en) * 2020-05-26 2020-07-31 京东方科技集团股份有限公司 Pixel driving circuit, driving method thereof and display device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1601594A (en) * 2003-09-22 2005-03-30 统宝光电股份有限公司 Active array organic LED pixel drive circuit and its drive method
CN101409041A (en) * 2003-08-29 2009-04-15 精工爱普生株式会社 Electronic device
CN103077680A (en) * 2013-01-10 2013-05-01 上海和辉光电有限公司 Organic light-emitting diode (OLE) pixel driving circuit
CN108389551A (en) * 2018-03-28 2018-08-10 京东方科技集团股份有限公司 A kind of pixel circuit and its driving method, display device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101074811B1 (en) * 2010-01-05 2011-10-19 삼성모바일디스플레이주식회사 Pixel circuit, organic light emitting display, and driving method thereof
TWI459352B (en) * 2012-06-13 2014-11-01 Innocom Tech Shenzhen Co Ltd Displays
KR101341797B1 (en) * 2012-08-01 2013-12-16 엘지디스플레이 주식회사 Organic light emitting diode display device and method for driving the same
CN103915057A (en) * 2013-01-04 2014-07-09 友达光电股份有限公司 Pixel driving circuit and organic light emitting displayer using same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101409041A (en) * 2003-08-29 2009-04-15 精工爱普生株式会社 Electronic device
CN1601594A (en) * 2003-09-22 2005-03-30 统宝光电股份有限公司 Active array organic LED pixel drive circuit and its drive method
CN103077680A (en) * 2013-01-10 2013-05-01 上海和辉光电有限公司 Organic light-emitting diode (OLE) pixel driving circuit
CN108389551A (en) * 2018-03-28 2018-08-10 京东方科技集团股份有限公司 A kind of pixel circuit and its driving method, display device

Also Published As

Publication number Publication date
CN109584785A (en) 2019-04-05

Similar Documents

Publication Publication Date Title
CN110176213B (en) Pixel circuit, driving method thereof and display panel
CN113838421B (en) Pixel circuit, driving method thereof and display panel
CN106910468B (en) The driving method of display panel, display device and pixel circuit
CN107863061B (en) Display panel, control method thereof and display device
CN107908310B (en) pixel circuit, driving method thereof and display device
CN105957473B (en) A kind of organic light emitting display panel and its driving method
US20180190194A1 (en) Pixel circuit, method for driving the same, display panel, and display device
CN109493794B (en) Pixel circuit, pixel driving method and display device
CN109584786B (en) Driving circuit and driving method of display panel and display device
US9262966B2 (en) Pixel circuit, display panel and display apparatus
CN103218970B (en) Active matrix organic light emitting diode (AMOLED) pixel unit, driving method and display device
US9645662B2 (en) Pixel circuit, display panel and display apparatus
CN108376534B (en) Pixel circuit, driving method thereof and display panel
US20180357962A1 (en) Pixel circuit, driving method thereof, display panel and display apparatus
CN110728946A (en) Pixel circuit, driving method thereof and display panel
CN110364119A (en) Pixel circuit and its driving method, display panel
CN113689825A (en) Driving circuit, driving method and display device
CN109493790A (en) Driving circuit and driving method of display panel and display device
KR20180033001A (en) Organic light emitting display panel, organic light emitting display device, data driver, and low power driving method
CN111179853A (en) Pixel circuit, driving method thereof and display device
US11238789B2 (en) Pixel circuit having a data line for sensing threshold and mobility characteristics of the circuit
JP4952886B2 (en) Display device and drive control method thereof
CN111383598A (en) Pixel compensation circuit, control method thereof, display driving device and display equipment
CN109637435B (en) Driving circuit and driving method of display panel and display device
CN109584785B (en) Driving circuit and driving method of display panel and display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant