CN109616507B - Mura compensation device, display panel, display device and mura compensation method - Google Patents
Mura compensation device, display panel, display device and mura compensation method Download PDFInfo
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- CN109616507B CN109616507B CN201910001824.3A CN201910001824A CN109616507B CN 109616507 B CN109616507 B CN 109616507B CN 201910001824 A CN201910001824 A CN 201910001824A CN 109616507 B CN109616507 B CN 109616507B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G3/2096—Details of the interface to the display terminal specific for a flat panel
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
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- G09G2320/00—Control of display operating conditions
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- G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
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- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/14—Detecting light within display terminals, e.g. using a single or a plurality of photosensors
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Abstract
The disclosure provides a mura compensation device, a display panel, a display device and a mura compensation method, and belongs to the technical field of panels. The mura compensation device includes: a first flexible circuit board; a mura canceling circuit including a storage unit for storing mura compensation data; wherein the mura canceling circuit is disposed in the first flexible circuit board.
Description
Technical Field
The disclosure relates to the technical field of display, in particular to a mura compensation device, a display panel, a display device and a mura compensation method.
Background
With the rapid development of display panel technology, the demand of people for large-size high-resolution display panels is increasing day by day, and with the rapid increase of the demand of large-size high-quality display panels in the market, high-generation lines are established by many liquid crystal panel manufacturers, and the shipment of large-size panels of 65 inches or more is greatly increased. However, due to the influence of the panel manufacturing process, the large-sized panel is more likely to generate Mura defects than the medium-sized and small-sized panels, and the product yield is affected, so that the De-Mura technology is required to improve the picture display quality.
Therefore, a new mura compensation device, a display panel, a display device, and a mura compensation method are required.
It is to be noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure, and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
An object of the present disclosure is to provide a mura compensation apparatus, a display panel, a display apparatus and a mura compensation method for overcoming at least one or all of the technical problems of the related art as described above.
According to a first aspect of the present disclosure, there is provided a mura compensation apparatus including: a first flexible circuit board; a mura canceling circuit including a storage unit for storing mura compensation data; wherein the mura canceling circuit is disposed in the first flexible circuit board.
According to a second aspect of the present disclosure, there is provided a display panel including the mura compensating apparatus as described in the above embodiments.
In one exemplary embodiment of the present disclosure, the display panel further includes a plurality of printed circuit boards bonded on the same side of the display panel; wherein, adopt between at least two printed circuit board the first flexible circuit board to connect.
In an exemplary embodiment of the present disclosure, the number of the plurality of printed circuit boards is 3 or more; wherein, a part of the printed circuit boards in the printed circuit boards are connected by adopting the first flexible circuit board, and the other part of the printed circuit boards are connected by adopting the second flexible circuit board; the second flexible circuit board is not provided with the mura elimination circuit.
In an exemplary embodiment of the present disclosure, the display panel further includes a control printed circuit board in which a timing controller is disposed; the time sequence controller is connected with the storage unit and used for reading the mura compensation data stored in the storage unit so as to compensate the data to be displayed of the display panel according to the mura compensation data.
According to a third aspect of the present disclosure, there is provided a display device including the display panel according to the above embodiment.
According to a fourth aspect of the present disclosure, there is provided a mura compensation method applied to a display panel including a plurality of printed circuit boards bonded to a same side of the display panel, the method comprising: acquiring a lighting image of the display panel; judging whether the display panel has mura according to the lighting image; if the display panel has mura, at least two printed circuit boards in the plurality of printed circuit boards are connected by adopting a first flexible circuit board; wherein, be provided with mura elimination circuit in the first flexible circuit board.
In an exemplary embodiment of the present disclosure, the method further includes: if the display panel does not have mura, connecting the printed circuit boards in the plurality of printed circuit boards by adopting a second flexible circuit board; wherein the second flexible circuit board is not provided with the mura elimination circuit.
In an exemplary embodiment of the present disclosure, the method further includes: if the display panel has mura, obtaining mura compensation data according to the lighting image; and storing the mura compensation data into a storage unit of the mura elimination circuit.
In an exemplary embodiment of the present disclosure, the method further includes: reading the mura compensation data in the memory cell; compensating the received data to be displayed according to the mura compensation data; and displaying the compensated data to be displayed.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure. It is to be understood that the drawings in the following description are merely exemplary of the disclosure, and that other drawings may be derived from those drawings by one of ordinary skill in the art without the exercise of inventive faculty.
FIG. 1 is a schematic diagram showing a mura compensation scheme in the related art;
FIG. 2 schematically illustrates a schematic structural view of a mura compensation apparatus in an exemplary embodiment of the present disclosure;
FIG. 3 schematically illustrates a circuit configuration diagram of a mura elimination circuit in an exemplary embodiment of the present disclosure;
FIG. 4 schematically illustrates a schematic view of a second flexible circuit board in an exemplary embodiment of the disclosure;
fig. 5 schematically illustrates a structure of a display panel in an exemplary embodiment of the present disclosure;
FIG. 6 schematically illustrates a flow chart of a mura compensation method in an exemplary embodiment of the present disclosure;
FIG. 7 schematically illustrates a flow chart of another mura compensation method in exemplary embodiments of the present disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repetitive description will be omitted. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in the form of software, or in one or more hardware circuits or integrated circuits, or in different networks and/or processor means and/or microcontroller means.
Fig. 1 shows a schematic structure diagram of a mura compensation scheme in the related art.
As shown in fig. 1, a Mura compensation scheme in the related art includes a display screen 101, an XPCB (X Printed Circuit Board of the display screen) 102, a CPCB (Control Printed Circuit Board) 103, an FPC (Flexible Printed Circuit Board) 104, and a Mura elimination Circuit (may also be referred to as a De-Mura Circuit) 105.
In the related art, the De-Mura circuit 105 is integrated on the XPCB 102 of the display panel, since the Mura defect of the display panel needs to be confirmed by lighting, and the XPCB 102 is already connected with the display screen 101 before lighting, that is, the XPCB 102 cannot be replaced after the display panel is manufactured, which brings a disadvantage that once the De-Mura function needs to be enabled, the De-Mura circuit 105 can only be pasted on the XPCB 102 in batch. Thus, it is a waste of cost to mount the De-Mura circuit 105 on the XPCB of the display panel found to have no Mura failure after the lighting test.
On the other hand, if mass mounting is not performed on the XPCB 102, when a lighting test finds that a certain display panel has Mura defect, and then the De-Mura circuit 105 is soldered to the display panel having Mura defect by a manual soldering method, time and labor are wasted, and a large functional risk exists, so that the method has no mass productivity.
It should be noted that the PCB in the embodiments of the present disclosure may refer to a PCBA (printed Circuit board assembly), that is, a PCB blank board is subjected to SMT (Surface Mount Technology) loading and then to a DIP (dual inline-pin package) package, which is called as PCBA for short.
Fig. 2 schematically illustrates a structural view of a mura compensation apparatus in an exemplary embodiment of the present disclosure.
As shown in fig. 2, the Mura compensation apparatus 200 provided by the embodiment of the present disclosure may include a first flexible circuit board (first FPC)202 and a Mura elimination circuit (De-Mura circuit) 203. Wherein, the mura canceling circuit 203 is disposed in the first flexible circuit board 202.
With continued reference to fig. 2, the mura elimination circuit 203 may include a memory unit 2031 and a peripheral circuit 2032 thereof, and the memory unit 2031 may be used to store the mura compensation data.
Specifically, the storage unit 2031 may be a Flash IC (Integrated Circuit), which may also be called an encoding type Flash memory; the memory device may be any type of memory device such as an EEPROM (Electrically Erasable and Programmable read/write memory), and the disclosure is not limited thereto.
The Mura compensation device provided by the embodiment of the disclosure makes a special FPC by arranging the De-Mura circuit in the first FPC, so that the De-Mura circuit can be applied to connection between XPCBA of a display panel with Mura failure, the defects that cost waste caused by batch patch mounting of the De-Mura circuit and manual welding of the De-Mura circuit do not have mass production performance in the related art are overcome, namely, the Mura compensation device provided by the embodiment of the disclosure is adopted, the production cost can be reduced, and the mass production performance is realized.
Fig. 3 schematically shows a circuit configuration diagram of a mura elimination circuit in an exemplary embodiment of the present disclosure.
As shown in fig. 3, the mura elimination circuit provided by the embodiment of the present disclosure may include a memory cell and its peripheral circuits.
Wherein the peripheral circuit comprises a power supply terminal for connecting a power supply voltage DVDD; resistors R1, R2, R3 and R4 and a capacitor C, wherein a first end of the resistor R1 is connected to the power supply terminal, and a second end of the resistor R1 is connected to a first port of the memory cell; the first end of the resistor R2 is connected to the second end of the resistor R1, and the second end of the resistor R2 is grounded; a first terminal of the resistor R3 is connected to the power supply terminal, and a second terminal of the resistor R3 is connected to the second port of the memory cell; a first terminal of the resistor R4 is connected to the power supply terminal, and a second terminal of the resistor R4 is connected to the third port of the memory cell; the first end of the capacitor C is connected to the power supply end, and the second end of the capacitor C is grounded; the memory unit may further include a fourth port and a fifth port.
Fig. 4 schematically illustrates a schematic diagram of a second flexible circuit board in an exemplary embodiment of the present disclosure.
As shown in fig. 4, a second flexible circuit board (second FPC, which may also be referred to as a normal FPC)401 is provided for the embodiment of the present disclosure, and a De-Mura circuit is not provided in the second FPC 401.
The second FPC401 provided in the embodiment of the present disclosure may be applied to, on one hand, connections between two adjacent XPCBs of a display panel that does not require De-Mura processing and has good picture quality, and on the other hand, may also be applied to connections between two adjacent XPCBs of a display panel that has Mura defects, except for connection by using the first FPC.
Further, the embodiment of the present disclosure also provides a display panel, where the display panel includes the mura compensation device provided by the above embodiment.
In an exemplary embodiment, the display panel has mura. The display panel may further include a plurality of printed circuit boards bonded on the same side of the display panel, and in other embodiments, the plurality of printed circuit boards may be disposed on different sides of the display panel, which is not limited in this disclosure.
In an exemplary embodiment, the size of the display panel is larger than a preset size, for example, larger than 65 inches, that is, the display panel is a large-sized panel.
In the embodiment of the present disclosure, a large-sized display panel may include a plurality of XPCBs (X-direction printed circuit boards of a display screen). Here, the X direction refers to a lateral direction or a horizontal direction of the display panel, and the plurality of XPCBs are sequentially arranged along the horizontal direction of the display panel, and are therefore referred to as XPCBs, but the present disclosure is not limited thereto.
In the embodiment of the present disclosure, at least two of the plurality of printed circuit boards are connected by the first flexible circuit board.
In the embodiment of the present disclosure, the number of the plurality of printed circuit boards may be greater than or equal to 3; wherein, a part of the printed circuit boards in the printed circuit boards are connected by adopting the first flexible circuit board, and the other part of the printed circuit boards are connected by adopting the second flexible circuit board; the second flexible circuit board is not provided with the mura elimination circuit.
The display panel provided by the embodiment of the present disclosure is illustrated with reference to the embodiment of fig. 5, but the present disclosure is not limited thereto.
Fig. 5 schematically illustrates a structural diagram of a display panel in an exemplary embodiment of the present disclosure.
As shown in fig. 5, the display panel 500 provided by the embodiment of the present disclosure may include a display screen 501, an XPCB 502, a CPCB 503, a second FPC 504, and a first FPC 505. Wherein, a mura canceling circuit 5051 is provided in the first FPC 505.
In this embodiment of the disclosure, the display screen 501 may be an O L ED display screen, an AMO L ED display screen, or a L CD display screen, which is not limited in this disclosure.
With continued reference to fig. 5, a timing controller (TCON IC)5031 may be provided in the CPCB 503. Wherein, the timing controller 5031 is connected to the mura canceling circuit 5051.
In the embodiment shown in fig. 5, it is assumed that the display panel 500 includes four XPCBs 502, and the four XPCBs 502 are sequentially arranged along the horizontal direction of the display panel, wherein two XPCBs 502 are located on one side (for example, the left side) and the other two XPCBs 502 are located on the other side (for example, the right side).
With continued reference to fig. 5, it is assumed here that two adjacent XPCBs 502 located on the left side are connected using a second FPC 504, that is, a normal FPC connection without a mura elimination circuit; two adjacent XPCBs 502 on the right side are connected by a first FPC 505, namely, a special FPC provided with a mura elimination circuit is used for connection.
In the embodiment of fig. 5, the arrows indicate the signal transmission relationship between the TCON IC 5031 on the CPCB 503 and the storage unit, such as the Flash IC, on the first FPC 505. The Flash IC is a storage unit for storing mura compensation data, and after the display panel is turned on each time, the TCON IC 5031 first reads the mura compensation data by using an SPI (Serial Peripheral Interface) transmission signal, processes and compensates a data signal transmitted from the front end, such as data to be displayed, and finally outputs the data signal to the display screen 501 for display.
It should be noted that, in the foregoing example, four XPCBs arranged on the same side of the display panel at the same time are taken as an example for description, in other embodiments, the technical solution provided by the embodiment of the present disclosure may be applied to any type of PCB on the display panel, and the number, the arrangement position, and the like of the PCBs are not limited.
The display panel provided by the embodiment of the disclosure, after a certain display panel is confirmed to have mura defects through a lighting test, at least one of the common FPCs for connecting XPCBs in the display panel can be replaced by a special FPC, so that mura compensation data can be stored in a storage unit of the special FPC, compensation of the display panel with mura defects is realized, and a function of eliminating the mura defects is realized.
Further, the embodiment of the present disclosure also provides a display device, which includes the display panel according to any one of the above embodiments.
The display device can be any electronic equipment with a display panel, such as a television, an electronic book, a smart phone, a tablet personal computer, a navigator and the like.
FIG. 6 schematically illustrates a flow chart of a mura compensation method in an exemplary embodiment of the present disclosure. The mura compensation method provided by the embodiment of the present disclosure may be applied to a display panel, and the display panel may include a plurality of printed circuit boards bonded to the same side of the display panel.
As shown in fig. 6, the mura compensation method provided by the embodiment of the present disclosure may include a step of acquiring a lighting image of the display panel in step S610.
In step S620, it is determined whether the display panel has mura according to the lighting image.
In step S630, if the display panel has mura, at least two printed circuit boards of the plurality of printed circuit boards are connected to each other by a first flexible circuit board.
Wherein, be provided with mura elimination circuit in the first flexible circuit board.
In an exemplary embodiment, the method may further include: if the display panel does not have mura, connecting the printed circuit boards in the plurality of printed circuit boards by adopting a second flexible circuit board; wherein the second flexible circuit board is not provided with the mura elimination circuit.
In an exemplary embodiment, the method may further include: if the display panel has mura, obtaining mura compensation data according to the lighting image; and storing the mura compensation data into a storage unit of the mura elimination circuit.
In an exemplary embodiment, the method may further include: reading the mura compensation data in the memory cell; compensating the received data to be displayed according to the mura compensation data; and displaying the compensated data to be displayed.
Other contents in the embodiments of the present disclosure may refer to the other embodiments described above.
FIG. 7 schematically illustrates a flow chart of another mura compensation method in exemplary embodiments of the present disclosure.
As shown in fig. 7, the mura compensation method provided by the embodiment of the present disclosure may include the steps of,
in step S701, the display panel is lit and photographed to acquire a lit image.
In the embodiment of the disclosure, the display panel is externally compensated by adopting an optical extraction type. The optical extraction type is to extract a luminance signal of a display panel by taking a picture of the display panel through an optical CCD (Charge-coupled Device). The optical extraction method has the advantages of simple structure and flexible method, namely the method is called De-Mura. The term Mura originates from japan, originally meaning uneven brightness, and then extends to any color difference on the panel that is recognizable to the human eye.
In the embodiment of the present disclosure, an AOI (automatic optical inspection) device is used to perform Mura detection, and compensation is performed after Mura is detected to eliminate Mura, that is, De-Mura.
First, a driving chip in the display panel lights up the panel and displays a plurality of frames (generally, gray scales or RGB). Then, the lighting image is obtained by taking the above-mentioned picture using a high-resolution and high-precision CCD camera.
The CCD camera with high precision and high resolution is generally adopted when the detection picture is shot, and the selection of the camera resolution depends on the resolution, the size and the shooting distance of the detected panel and the precision of De-Mura compensation. The data obtained by the camera is XYZ, so that subsequent calculations are based on XYZ data obtained by photographing with the camera.
In step S702, the lighting image is processed and compared with a determination criterion.
In the embodiment of the disclosure, different mura can be detected according to different algorithms after the distribution data of the panel XYZ are obtained, and corresponding standards are detected with respect to the mura. And analyzing pixel color distribution characteristics according to camera acquisition data, and identifying mura according to a correlation algorithm.
In step S703, it is determined whether the display panel has mura defect; if the mura is not good, the step S705 is executed; if the mura defect is not present, the process proceeds to step S704.
In step S704, a second FPC is used for connection between XPCBs of the display panel.
In step S705, the connection between at least two XPCBs of the display panel employs a first FPC.
In step S706, the brightness data is calculated and processed for the lighting image to generate mura compensation data.
And generating Mura compensation data according to the Mura data and a corresponding De-Mura compensation algorithm.
In step S707, the mura compensation data is compressed and written into the memory unit.
After the mura compensation data is determined, it needs to be burned into the memory cell to realize the compensation effect, wherein the size of the memory cell space occupied by the mura compensation data depends on the screen resolution and the compensation precision (pixel level, 3 × 3, 5 × 5 …).
In step S708, the timing controller reads the mura compensation data in the memory cell to compensate for mura, thereby implementing a mura canceling function.
Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein may be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solution according to the embodiments of the present disclosure may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (which may be a CD-ROM, a usb disk, a removable hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which may be a personal computer, a server, a terminal device, or a network device, etc.) to execute the method according to the embodiments of the present disclosure.
In an exemplary embodiment of the present disclosure, there is also provided a computer-readable storage medium having stored thereon a program product capable of implementing the above-described method of the present specification. In some possible embodiments, aspects of the invention may also be implemented in the form of a program product comprising program code means for causing a terminal device to carry out the steps according to various exemplary embodiments of the invention described in the above section "exemplary methods" of the present description, when said program product is run on the terminal device.
Furthermore, the above-described figures are merely schematic illustrations of processes involved in methods according to exemplary embodiments of the invention, and are not intended to be limiting. It will be readily understood that the processes shown in the above figures are not intended to indicate or limit the chronological order of the processes. In addition, it will also be readily appreciated that these processes may be performed synchronously or asynchronously, e.g., in multiple circuits.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
Claims (8)
1. A display panel, comprising a mura compensation apparatus including a first flexible circuit board and a mura elimination circuit including a storage unit for storing mura compensation data; wherein the mura cancellation circuit is disposed in the first flexible circuit board; the display panel further comprises a plurality of printed circuit boards bonded on the same side of the display panel;
wherein, adopt between at least two printed circuit board the first flexible circuit board to connect.
2. The display panel according to claim 1, wherein the number of the plurality of printed circuit boards is 3 or more; wherein the content of the first and second substances,
part of the printed circuit boards in the plurality of printed circuit boards are connected by adopting the first flexible circuit board, and the other part of the printed circuit boards are connected by adopting the second flexible circuit board;
the second flexible circuit board is not provided with the mura elimination circuit.
3. The display panel according to claim 1 or 2, further comprising a control printed circuit board in which a timing controller is provided; wherein the content of the first and second substances,
the time sequence controller is connected with the storage unit and used for reading the mura compensation data stored in the storage unit so as to compensate the data to be displayed of the display panel according to the mura compensation data.
4. A display device characterized by comprising the display panel according to any one of claims 1 to 3.
5. A mura compensation method applied to a display panel including a plurality of printed circuit boards bonded on a same side of the display panel, the method comprising:
acquiring a lighting image of the display panel;
judging whether the display panel has mura according to the lighting image;
if the display panel has mura, at least two printed circuit boards in the plurality of printed circuit boards are connected by adopting a first flexible circuit board;
wherein, be provided with mura elimination circuit in the first flexible circuit board.
6. The mura compensation method according to claim 5, further comprising:
if the display panel does not have mura, connecting the printed circuit boards in the plurality of printed circuit boards by adopting a second flexible circuit board;
wherein the second flexible circuit board is not provided with the mura elimination circuit.
7. The mura compensation method according to claim 5, further comprising:
if the display panel has mura, obtaining mura compensation data according to the lighting image;
and storing the mura compensation data into a storage unit of the mura elimination circuit.
8. The mura compensation method according to claim 7, further comprising:
reading the mura compensation data in the memory cell;
compensating the received data to be displayed according to the mura compensation data;
and displaying the compensated data to be displayed.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910001824.3A CN109616507B (en) | 2019-01-02 | 2019-01-02 | Mura compensation device, display panel, display device and mura compensation method |
| US16/957,748 US11250764B2 (en) | 2019-01-02 | 2019-12-11 | Mura compensation device, display device and mura compensation method |
| PCT/CN2019/124638 WO2020140708A1 (en) | 2019-01-02 | 2019-12-11 | Mura compensation device, display device, and mura compensation method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910001824.3A CN109616507B (en) | 2019-01-02 | 2019-01-02 | Mura compensation device, display panel, display device and mura compensation method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109616507A CN109616507A (en) | 2019-04-12 |
| CN109616507B true CN109616507B (en) | 2020-07-28 |
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| CN201910001824.3A Expired - Fee Related CN109616507B (en) | 2019-01-02 | 2019-01-02 | Mura compensation device, display panel, display device and mura compensation method |
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| US (1) | US11250764B2 (en) |
| CN (1) | CN109616507B (en) |
| WO (1) | WO2020140708A1 (en) |
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| CN109616507B (en) | 2019-01-02 | 2020-07-28 | 合肥京东方显示技术有限公司 | Mura compensation device, display panel, display device and mura compensation method |
| CN111161676B (en) * | 2020-02-25 | 2022-04-15 | 云谷（固安）科技有限公司 | Processing equipment and processing method of display module and display module |
| CN112331074A (en) * | 2020-11-02 | 2021-02-05 | 京东方科技集团股份有限公司 | Display module, binding method, display device and display terminal |
| CN114942536B (en) * | 2022-07-26 | 2022-10-28 | 惠科股份有限公司 | Liquid crystal display module and electronic device |
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| US20040027526A1 (en) * | 2002-08-08 | 2004-02-12 | Hannstar Display Corporation | Liquid crystal display device |
| US7012667B2 (en) * | 2002-08-08 | 2006-03-14 | Hannstar Display Corp. | Liquid crystal display device |
| US20060017669A1 (en) * | 2004-07-20 | 2006-01-26 | Eastman Kodak Company | Method and apparatus for uniformity and brightness correction in an OLED display |
| US8149230B2 (en) | 2004-07-28 | 2012-04-03 | Samsung Mobile Display Co., Ltd. | Light emitting display |
| KR101201314B1 (en) * | 2005-11-16 | 2012-11-14 | 엘지디스플레이 주식회사 | Method of Fabricating Flat Display Panel |
| CN103558703B (en) * | 2013-10-12 | 2016-08-10 | 深圳市华星光电技术有限公司 | Ultra-narrow frame liquid crystal display and the COF encapsulating structure of drive circuit thereof |
| KR101623776B1 (en) * | 2013-12-09 | 2016-06-07 | 엘지디스플레이 주식회사 | Touch display driver integrated circuit and touch display device |
| CN106125367B (en) * | 2016-08-26 | 2019-03-15 | 深圳市华星光电技术有限公司 | A kind of method and device detecting Mura offset data exception |
| CN106952626B (en) * | 2017-05-02 | 2019-05-31 | 深圳市华星光电技术有限公司 | The mura compensation deals method, apparatus and liquid crystal display of RGBW pixel arrangement panel |
| CN107170415B (en) | 2017-05-10 | 2019-09-10 | 深圳市华星光电技术有限公司 | Horizontal substrate and control panel merge the LCD panel of framework and its mura repairs control method |
| TWI649741B (en) * | 2018-01-30 | 2019-02-01 | 友達光電股份有限公司 | Threshold voltage compensation circuit and display panel |
| CN108399862A (en) * | 2018-03-12 | 2018-08-14 | 武汉华星光电半导体显示技术有限公司 | Flexible display panels |
| CN108510965B (en) * | 2018-05-03 | 2019-10-11 | 武汉天马微电子有限公司 | A kind of display brightness compensation method, apparatus and system |
| JP7306811B2 (en) * | 2018-10-05 | 2023-07-11 | シナプティクス インコーポレイテッド | DISPLAY DRIVER, DISPLAY MODULE, AND IMAGE DATA GENERATION METHOD |
| CN109616507B (en) | 2019-01-02 | 2020-07-28 | 合肥京东方显示技术有限公司 | Mura compensation device, display panel, display device and mura compensation method |
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- 2019-12-11 US US16/957,748 patent/US11250764B2/en active Active
- 2019-12-11 WO PCT/CN2019/124638 patent/WO2020140708A1/en active Application Filing
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| US20210225239A1 (en) | 2021-07-22 |
| WO2020140708A1 (en) | 2020-07-09 |
| CN109616507A (en) | 2019-04-12 |
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