CN109585613A - Improve the chip manufacture method of LED luminance - Google Patents
Improve the chip manufacture method of LED luminance Download PDFInfo
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- CN109585613A CN109585613A CN201811453367.3A CN201811453367A CN109585613A CN 109585613 A CN109585613 A CN 109585613A CN 201811453367 A CN201811453367 A CN 201811453367A CN 109585613 A CN109585613 A CN 109585613A
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- 238000000034 method Methods 0.000 title claims abstract description 55
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 24
- 239000010408 film Substances 0.000 claims abstract description 63
- 238000006243 chemical reaction Methods 0.000 claims abstract description 59
- 239000012528 membrane Substances 0.000 claims abstract description 36
- 239000000126 substance Substances 0.000 claims abstract description 36
- 239000010409 thin film Substances 0.000 claims abstract description 28
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 13
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 11
- 229910052594 sapphire Inorganic materials 0.000 claims description 49
- 239000010980 sapphire Substances 0.000 claims description 49
- 239000000758 substrate Substances 0.000 claims description 49
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 21
- 239000001301 oxygen Substances 0.000 claims description 21
- 229910052760 oxygen Inorganic materials 0.000 claims description 21
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 18
- 229910052782 aluminium Inorganic materials 0.000 claims description 18
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 16
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 16
- 238000005530 etching Methods 0.000 claims description 15
- 239000004411 aluminium Substances 0.000 claims description 13
- 238000005566 electron beam evaporation Methods 0.000 claims description 12
- QAOWNCQODCNURD-UHFFFAOYSA-N sulfuric acid Substances OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 12
- 238000000137 annealing Methods 0.000 claims description 11
- 230000008859 change Effects 0.000 claims description 9
- 238000007740 vapor deposition Methods 0.000 claims description 9
- 238000001312 dry etching Methods 0.000 claims description 8
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 7
- 238000005520 cutting process Methods 0.000 claims description 7
- 230000005611 electricity Effects 0.000 claims description 7
- 239000001257 hydrogen Substances 0.000 claims description 7
- 229910052739 hydrogen Inorganic materials 0.000 claims description 7
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 7
- 238000004544 sputter deposition Methods 0.000 claims description 7
- 239000011248 coating agent Substances 0.000 claims description 6
- 238000000576 coating method Methods 0.000 claims description 6
- 238000010894 electron beam technology Methods 0.000 claims description 6
- 238000002347 injection Methods 0.000 claims description 6
- 239000007924 injection Substances 0.000 claims description 6
- 239000011259 mixed solution Substances 0.000 claims description 6
- 238000007738 vacuum evaporation Methods 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 claims 1
- 230000008569 process Effects 0.000 abstract description 6
- 238000001704 evaporation Methods 0.000 abstract description 3
- 238000004140 cleaning Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 141
- 230000000694 effects Effects 0.000 description 6
- 239000011148 porous material Substances 0.000 description 5
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 4
- 229910001882 dioxygen Inorganic materials 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 230000008570 general process Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000035939 shock Effects 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Led Devices (AREA)
Abstract
This application discloses the chip manufacture methods for improving LED luminance, comprising steps of cleaning epitaxial wafer;Etch the first epitaxial wafer;First P electrode and the first N electrode are set;The evaporating Al simple substance membrane layer above the first P electrode and the first N electrode;The poly- reaction of ball occurs for Al simple substance membrane layer, generates aluminum oxide film layer;Ito thin film layer is prepared in the aluminum oxide film layer, and opens up window on ito thin film layer;The second P electrode and the second N electrode are set on the ito thin film layer;Silicon oxide film layer is generated above second P electrode and second N electrode, and opens up window.The present invention can be obviously improved the brightness of LED chip, moreover it is possible to contact resistance be reduced, to reduce the forward voltage of LED chip.The present invention can be obviously improved the luminous intensity of LED, to improve LED luminance, and the Processes and apparatus that the present invention is general using current LED industry, be suitble to industrialized production.
Description
Technical field
The present invention relates to field of optoelectronic devices, specifically, being related to a kind of chip manufacture method for improving LED luminance.
Background technique
LED is a kind of solid light source, it is to utilize luminescent device made of semiconductor P-N junction.In forward conduction, partly lead
Minority carrier and majority carrier in body is compound, and the energy released is launched in the form of photon by photon or part
Come.Semi-conductor LED illuminating has the remarkable advantages such as efficient, energy-saving and environmental protection, long service life, has been widely used for street lamp, shows
The every field such as display screen, room lighting, auto lamp.How to improve brightness is the main problem that LED needs to solve.Because of LED core
Piece brightness is the most important measurement index of LED chip product competitiveness, how to promote chip brightness on the basis of existing, is
Increase chip competitiveness eternal topic.
Therefore, the method that exploitation improves the brightness of light emitting diode has great importance.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of chip manufacture methods for improving LED luminance, which is characterized in that
Comprising steps of
Epitaxial wafer 5min is cleaned with the mixed solution of the concentrated sulfuric acid, hydrogen peroxide and water, wherein the concentrated sulfuric acid: hydrogen peroxide: the body of water
Product obtains the first epitaxial wafer than being 5:1:1, first epitaxial wafer successively include from bottom to up Sapphire Substrate, N-type GaN layer,
Quantum well layer and p-type GaN layer;
First epitaxial wafer is subjected to ICP etching, shape far from the Sapphire Substrate side using dry etching equipment
At step, expose the N-type GaN layer;
The first P electrode is set far from the Sapphire Substrate side in the p-type GaN layer, in the N-type GaN layer
The first N electrode is set far from the Sapphire Substrate side, obtains the second epitaxial wafer;
Second epitaxial wafer is put into Electron beam evaporation reaction chamber, is greater than or equal to 99.99% using content
Metallic aluminium as target, cavity temperature is 240 DEG C, and plated film rate isThe output power of electron gun is 3-4kW,
Plated film power is 0.35 times of electron gun output power, and chamber pressure increases by 3.0 × 10 with each second-8-6.0×10-8Torr from
1.0×10-6Torr gradual change increases to 4.0 × 10-650- is deposited above first P electrode and first N electrode in Torr
The Al simple substance membrane layer of 80nm thickness, and open up on the Al simple substance membrane window portion exposure first P electrode and described
First N electrode;
Second epitaxial wafer of the Al simple substance membrane layer will be deposited from the Electron beam evaporation reaction chamber
It takes out, is put into quick anneal oven reaction chamber, set the initial pressure value of furnace chamber as 2Torr, furnace chamber initial temperature is 580 DEG C, is taken out
Vacuum makes furnace chamber pressure reach 1 × 10-8Torr is passed through the oxygen of 4-5sccm, keeps 2min after oxygen injection, make oxygen in furnace
Uniformly, the temperature of furnace chamber is controlled in annealing process reduces 0.4-0.5 DEG C with each second, is reduced to 520 DEG C from 580 DEG C of gradual changes, moves back
The fiery time is 120-150s, and the Al simple substance membrane layer occurs the poly- reaction of ball, generates aluminum oxide film layer, and the shape on pellumina
At the aperture of nanometer scale, third epitaxial wafer is obtained;
The third epitaxial wafer is taken out from the quick anneal oven reaction chamber, using the method for sputter coating, in institute
The ito thin film layer for preparing 70-110nm thickness in aluminum oxide film layer is stated, and opens up window on ito thin film layer, the window and institute
It is corresponding to state the window's position on Al simple substance membrane layer;
Second P electrode and the second N electrode, second P electrode and the first P electricity are set on the ito thin film layer
Pole electrical connection, second N electrode are electrically connected with first N electrode;
Using PECVD method, the oxygen of 1000-1800nm thickness is generated above second P electrode and second N electrode
SiClx film layer, and window portion exposure second P electrode and the 2nd N electricity are opened up on the silicon oxide film layer
Pole.
Preferably, described to be carried out first epitaxial wafer far from the Sapphire Substrate side using dry etching equipment
ICP etching, further for the etching depth on first epitaxial wafer is 1-1.4 μm, and the width of Cutting Road is 8-9 μm.
Preferably, the thickness of electrode of second P electrode and second N electrode is 1200-1500nm.
Preferably, the second P electrode and the second N electrode are set on the ito thin film layer, further to utilize electron beam
Vacuum evaporation coating film method is deposited second P electrode and second N electrode on the ito thin film layer, during vapor deposition,
Chamber pressure is 1.0 × 10-6Torr, cavity temperature are 0 DEG C, and plated film power is 700W, and plated film rate is
Preferably, the Sapphire Substrate, further at 1000-1100 DEG C, reaction cavity pressure maintains 100-
Under the hydrogen atmosphere of 300mbar, it is passed through the H that flow is 100-130L/min2, handle Sapphire Substrate 8-10min.
Preferably, the N-type GaN layer, further for holding reaction cavity pressure keeps temperature in 150-300mbar
1000-1100 DEG C, it is passed through the NH that flow is 40-60L/min3, 200-300sccm TMGa, 50-90L/min H2, described
2-4 μm of continued propagation of N-type GaN layer in Sapphire Substrate.
Preferably, the quantum well layer, further for,
Reaction cavity pressure maintains 300-400mbar, 700-750 DEG C of low temperature, is passed through the NH of 50000-60000sccm3、
The flow of the TEGa and TMIn of 100-150sccm, TMIn are gradually increased with increasing 25-52sccm each second from 150-170sccm
It is added to 1500-1700sccm, grows the In of 30-50sy1Ga(1-y1)N, growth thickness D1, In doping concentration are increased with each second
4E+17-7E+17atoms/cm3From 1E+19atoms/cm3Fade to 3E+19atoms/cm3;
Maintain growth conditions constant, the flow for stablizing TMIn is 1500-1700sccm, grows 100-150s's
Iny2Ga(1-y2)N, growth thickness D2, In doping concentration are 1E+20-3E+20atoms/cm3, the range of D1+D2 is 3-
The range of 3.5nm, D1=D2, y1 and y2 are 0.015-0.25, wherein y1 < y2;
Temperature is increased to 800-850 DEG C, pressure maintains 300-400mbar, is passed through the NH of 50000-60000sccm3、
The TEGa of 400-500sccm grows the GaN layer of 10nm, Iny1Ga(1-y1)N/Iny2Ga(1-y2)N/GaN periodicity is 10-15.
Preferably, the p-type GaN layer, further for temperature is increased to 950-1000 DEG C, and reaction cavity pressure maintains
400-900mbar is passed through the NH that flow is 50000-70000sccm3, 20-100sccm TEGa, 100-130L/min H2,
The p-type GaN layer of continued propagation 50-200nm on the quantum well layer.
Compared with prior art, the chip manufacture method provided by the invention for improving LED luminance reaches following beneficial to effect
Fruit:
The first, the present invention can be obviously improved the brightness of LED chip, moreover it is possible to contact resistance be reduced, to reduce LED chip
Forward voltage.
The second, the present invention can be obviously improved the luminous intensity of LED, to improve LED luminance, and the present invention using
The general Processes and apparatus of LED industry at present is suitble to industrialized production.
Third, the present invention can promote the light transmittance of pellumina by control temperature regularity variation, and after keeping ball poly-
Small pore size distribution it is more uniform, be conducive to improve emergent light luminous intensity.
4th, when evaporating Al simple substance membrane layer of the present invention, by the gradual change that pressure is regular, aluminium atom can be enhanced
Activity, and the mutual shock between aluminium atom is reduced, keep aluminium film finer and close, uniformity is more preferable, to make aluminium film and extension
It is lower that layer surface contacts more preferable contact resistance.
Detailed description of the invention
The drawings described herein are used to provide a further understanding of the present application, constitutes part of this application, this Shen
Illustrative embodiments and their description please are not constituted an undue limitation on the present application for explaining the application.In the accompanying drawings:
Fig. 1 is the flow chart that the chip manufacture method of LED luminance is improved in the embodiment of the present invention 1.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description.It should be noted that described embodiment only actually is a part of the embodiment of the present invention, rather than whole realities
Example is applied, and is actually merely illustrative, never as to the present invention and its application or any restrictions used.The guarantor of the application
Protect range as defined by the appended claims.
Embodiment 1:
Specific embodiment shown in Figure 1 for the herein described chip manufacture method for improving LED luminance, this method packet
It includes:
Step 101, processing Sapphire Substrate: at 1000 DEG C, reaction cavity pressure is maintained under the hydrogen atmosphere of 100mbar,
It is passed through the H that flow is 100L/min2, handle Sapphire Substrate 8min.
Step 102, growth N-type GaN layer: it keeps reaction cavity pressure in 150mbar, is kept for 1000 DEG C of temperature, be passed through flow
For the NH of 40L/min3, 200sccm TMGa, 50L/min H2, 2 μm of continued propagation of the N-type GaN in the Sapphire Substrate
Layer.
Step 103, grown quantum well layer: reaction cavity pressure maintains 300mbar, 700 DEG C of low temperature, is passed through 50000sccm
NH3, 100sccm TEGa and TMIn, the flow of TMIn progressively increases to increasing 25sccm each second from 150sccm
1500sccm grows the In of 30s0.015Ga0.985N, growth thickness 1.5nm, In doping concentration increase 4E+ with each second
17atoms/cm3From 1E+19atoms/cm3Fade to 3E+19atoms/cm3;
Maintain growth conditions constant, the flow for stablizing TMIn is 1500sccm, grows the In of 100s0.25Ga0.75N, growth are thick
Degree is 1.5nm, and In doping concentration is 1E+20atoms/cm3;
Temperature is increased to 800 DEG C, pressure maintains 300mbar, is passed through the NH of 50000sccm3, 400sccm TEGa, it is raw
The GaN layer of long 10nm, In0.015Ga0.985N/In0.25Ga0.75N/GaN periodicity is 10.
Step 104, growth P-type GaN layer: temperature is increased to 950 DEG C, and reaction cavity pressure maintains 400mbar, is passed through flow
For the NH of 50000sccm3, 20sccm TEGa, 100L/min H2, the p-type of continued propagation 50nm on the quantum well layer
GaN layer.Generate epitaxial wafer.
Step 105 cleans epitaxial wafer 5min with the mixed solution of the concentrated sulfuric acid, hydrogen peroxide and water, wherein the concentrated sulfuric acid: dioxygen
Water: the volume ratio of water is 5:1:1, obtains the first epitaxial wafer, first epitaxial wafer successively include from bottom to up Sapphire Substrate,
N-type GaN layer, quantum well layer and p-type GaN layer;
First epitaxial wafer is carried out ICP far from the Sapphire Substrate side using dry etching equipment by step 106
Etching forms step, exposes the N-type GaN layer, and the etching depth on first epitaxial wafer is 1 μm, and the width of Cutting Road is
8μm;
Step 107, the first P electrode is arranged in the separate Sapphire Substrate side in the p-type GaN layer, in the N-type
The first N electrode is set far from the Sapphire Substrate side in GaN layer, obtains the second epitaxial wafer;
Second epitaxial wafer is put into Electron beam evaporation reaction chamber by step 108, is greater than or equal to using content
99.99% metallic aluminium is 240 DEG C as target, cavity temperature, and plated film rate is The output power of electron gun is
3kW, plated film power are 1.05kW, and chamber pressure increases by 3.0 × 10 with each second-8From 1.0 × 10-6Torr gradual change increases to 4.0
×10-6The Al simple substance membrane layer of 50nm thickness is deposited in Torr above first P electrode and first N electrode, and described
Window portion exposure first P electrode and first N electrode are opened up on Al simple substance membrane;
Second epitaxial wafer of the Al simple substance membrane layer will be deposited from the Electron beam evaporation in step 109
It is taken out in reaction chamber, is put into quick anneal oven reaction chamber, set the initial pressure value of furnace chamber as 2Torr, furnace chamber initial temperature is
580 DEG C, vacuumizing makes furnace chamber pressure reach 1 × 10-8Torr is passed through the oxygen of 4sccm, keeps 2min after oxygen injection, make furnace
Interior oxygen is uniform, and the temperature of furnace chamber is controlled in annealing process with each second reduces by 0.4 DEG C, is reduced to 520 DEG C from 580 DEG C of gradual changes,
Annealing time is 120s, and the poly- reaction of ball occurs for the Al simple substance membrane layer, generates aluminum oxide film layer, and formed on pellumina
The aperture of nanometer scale obtains third epitaxial wafer;
Step 110 takes out the third epitaxial wafer from the quick anneal oven reaction chamber, utilizes the side of sputter coating
Method, prepares the ito thin film layer of 70nm thickness in the aluminum oxide film layer, and window is opened up on ito thin film layer, the window with
The window's position is corresponding on the Al simple substance membrane layer;
The second P electrode and are deposited using electron beam vacuum evaporation coating film method on the ito thin film layer for step 111
Two N electrodes, during vapor deposition, chamber pressure is 1.0 × 10-6Torr, cavity temperature are 0 DEG C, and plated film power is 700W, plated film speed
Rate isSecond P electrode is electrically connected with first P electrode, second N electrode and first N electrode electricity
The thickness of electrode of connection, second P electrode and second N electrode is 1200nm;
Step 112, using PECVD method, it is thick that 1000nm is generated above second P electrode and second N electrode
Silicon oxide film layer, and open up on the silicon oxide film layer window portion exposure second P electrode and the 2nd N
Electrode.
Sccm in the present embodiment is that standard milliliters are per minute.
By plating Al simple substance membrane layer in epi-layer surface in the present embodiment, and with quick anneal oven oxygen atmosphere
Lower carry out flash annealing makes the Al simple substance membrane layer on surface that ball consor occur into aluminium oxide, and forms the aperture of nanometer scale.
After the aperture for the nanometer scale being processed into, when the wavelength and these apertures of the light issued from epitaxial layer inside match, light intensity meeting
Increase.This is because light is when film inner transverse is propagated, when encountering nm window, light can shake back and forth at window both ends,
The light of the wavelength to match with window is enhanced, and is blazed abroad from nano-pore, and luminous intensity can be thus improved.Separately
On the one hand the plasma on some surfaces is had at the both ends of nano-pore, the electromagnetic field of generating region shakes in nano-pore
Light can also be amplified by magnetic field, spread out of aluminium film surface, and here it is the plasma effect of oxidation aluminium surface, plasma effect has
Enhance the effect of light transmission.The present embodiment method can be obviously improved the luminous intensity of LED, to improve brightness, and use
Be the general Processes and apparatus of current LED industry, be suitble to industrialized production.In addition, high quality oxidation manufactured in the present embodiment
Aluminium film contacts more preferably with epi-layer surface, and contact resistance is lower, so as to reduce the forward voltage of LED.
Embodiment 2:
Another specific embodiment of the herein described chip manufacture method for improving LED luminance, this method comprises:
Step 201, processing Sapphire Substrate: at 1100 DEG C, reaction cavity pressure is maintained under the hydrogen atmosphere of 300mbar,
It is passed through the H that flow is 130L/min2, handle Sapphire Substrate 10min.
Step 202, growth N-type GaN layer: it keeps reaction cavity pressure in 300mbar, is kept for 1100 DEG C of temperature, be passed through flow
For the NH of 60L/min3, 300sccm TMGa, 90L/min H2, 4 μm of continued propagation of the N-type GaN in the Sapphire Substrate
Layer.
Step 203, grown quantum well layer: reaction cavity pressure maintains 400mbar, 750 DEG C of low temperature, is passed through 60000sccm
NH3, 150sccm TEGa and TMIn, the flow of TMIn progressively increases to increasing 52sccm each second from 170sccm
1700sccm grows the In of 50s0.020Ga0.980N, growth thickness 1.75nm, In doping concentration increase 7E+ with each second
17atoms/cm3From 1E+19atoms/cm3Fade to 3E+19atoms/cm3;
Maintain growth conditions constant, the flow for stablizing TMIn is 1700sccm, grows the In of 150s0.20Ga0.80N, growth are thick
Degree is 1.75nm, and In doping concentration is 3E+20atoms/cm3;
Temperature is increased to 850 DEG C, pressure maintains 400mbar, is passed through the NH of 60000sccm3, 500sccm TEGa, it is raw
The GaN layer of long 10nm, In0.020Ga0.980N/In0.20Ga0.80N/GaN periodicity is 15.
Step 204, growth P-type GaN layer: temperature is increased to 1000 DEG C, and reaction cavity pressure maintains 900mbar, is passed through stream
Amount is the NH of 70000sccm3, 100sccm TEGa, 130L/min H2, the P of continued propagation 200nm on the quantum well layer
Type GaN layer.Generate epitaxial wafer.
Step 205 cleans epitaxial wafer 5min with the mixed solution of the concentrated sulfuric acid, hydrogen peroxide and water, wherein the concentrated sulfuric acid: dioxygen
Water: the volume ratio of water is 5:1:1, obtains the first epitaxial wafer, first epitaxial wafer successively include from bottom to up Sapphire Substrate,
N-type GaN layer, quantum well layer and p-type GaN layer;
First epitaxial wafer is carried out ICP far from the Sapphire Substrate side using dry etching equipment by step 206
Etching forms step, exposes the N-type GaN layer, and the etching depth on first epitaxial wafer is 1.4 μm, the width of Cutting Road
It is 9 μm;
Step 207, the first P electrode is arranged in the separate Sapphire Substrate side in the p-type GaN layer, in the N-type
The first N electrode is set far from the Sapphire Substrate side in GaN layer, obtains the second epitaxial wafer;
Second epitaxial wafer is put into Electron beam evaporation reaction chamber by step 208, is greater than or equal to using content
99.99% metallic aluminium is 240 DEG C as target, cavity temperature, and plated film rate is The output power of electron gun is
4kW, plated film power are 1.4kW, and chamber pressure increases by 6.0 × 10 with each second-8From 1.0 × 10-6Torr gradual change increases to 4.0
×10-6The Al simple substance membrane layer of 80nm thickness is deposited in Torr above first P electrode and first N electrode, and described
Window portion exposure first P electrode and first N electrode are opened up on Al simple substance membrane;
Second epitaxial wafer of the Al simple substance membrane layer will be deposited from the Electron beam evaporation in step 209
It is taken out in reaction chamber, is put into quick anneal oven reaction chamber, set the initial pressure value of furnace chamber as 2Torr, furnace chamber initial temperature is
580 DEG C, vacuumizing makes furnace chamber pressure reach 1 × 10-8Torr is passed through the oxygen of 5sccm, keeps 2min after oxygen injection, make furnace
Interior oxygen is uniform, and the temperature of furnace chamber is controlled in annealing process with each second reduces by 0.5 DEG C, is reduced to 520 DEG C from 580 DEG C of gradual changes,
Annealing time is 150s, and the poly- reaction of ball occurs for the Al simple substance membrane layer, generates aluminum oxide film layer, and formed on pellumina
The aperture of nanometer scale obtains third epitaxial wafer;
Step 210 takes out the third epitaxial wafer from the quick anneal oven reaction chamber, utilizes the side of sputter coating
Method, prepares the ito thin film layer of 110nm thickness in the aluminum oxide film layer, and window is opened up on ito thin film layer, the window
It is corresponding with the window's position on the Al simple substance membrane layer;
The second P electrode and are deposited using electron beam vacuum evaporation coating film method on the ito thin film layer for step 211
Two N electrodes, during vapor deposition, chamber pressure is 1.0 × 10-6Torr, cavity temperature are 0 DEG C, and plated film power is 700W, plated film speed
Rate isSecond P electrode is electrically connected with first P electrode, second N electrode and first N electrode electricity
The thickness of electrode of connection, second P electrode and second N electrode is 1500nm;
Step 212, using PECVD method, it is thick that 1800nm is generated above second P electrode and second N electrode
Silicon oxide film layer, and open up on the silicon oxide film layer window portion exposure second P electrode and the 2nd N
Electrode.
Sccm in the present embodiment is that standard milliliters are per minute.
Embodiment 3
One practical embodiment of the herein described chip manufacture method for improving LED luminance, this method comprises:
Step 301, processing Sapphire Substrate: at 1050 DEG C, reaction cavity pressure is maintained under the hydrogen atmosphere of 200mbar,
It is passed through the H that flow is 115L/min2, handle Sapphire Substrate 9min.
Step 302, growth N-type GaN layer: it keeps reaction cavity pressure in 225mbar, is kept for 1050 DEG C of temperature, be passed through flow
For the NH of 50L/min3, 250sccm TMGa, 70L/min H2, 3 μm of continued propagation of the N-type GaN in the Sapphire Substrate
Layer.
Step 303, grown quantum well layer: reaction cavity pressure maintains 350mbar, 725 DEG C of low temperature, is passed through 55000sccm
NH3, 130sccm TEGa and TMIn, the flow of TMIn progressively increases to increasing 39sccm each second from 160sccm
1600sccm grows the In of 40s0.1Ga0.9N, growth thickness 1.65nm, In doping concentration increase 5.5E+ with each second
17atoms/cm3From 1E+19atoms/cm3Fade to 3E+19atoms/cm3;
Maintain growth conditions constant, the flow for stablizing TMIn is 1600sccm, grows the In of 130s0.15Ga0.85N, growth are thick
Degree is 1.65nm, and In doping concentration is 2E+20atoms/cm3;
Temperature is increased to 825 DEG C, pressure maintains 350mbar, is passed through the NH of 55000sccm3, 450sccm TEGa, it is raw
The GaN layer of long 10nm, In0.1Ga0.9N/In0.15Ga0.85N/GaN periodicity is 13.
Step 304, growth P-type GaN layer: temperature is increased to 975 DEG C, and reaction cavity pressure maintains 650mbar, is passed through flow
For the NH of 60000sccm3, 60sccm TEGa, 115L/min H2, the p-type of continued propagation 125nm on the quantum well layer
GaN layer.Generate epitaxial wafer.
Step 305 cleans epitaxial wafer 5min with the mixed solution of the concentrated sulfuric acid, hydrogen peroxide and water, wherein the concentrated sulfuric acid: dioxygen
Water: the volume ratio of water is 5:1:1, obtains the first epitaxial wafer, first epitaxial wafer successively include from bottom to up Sapphire Substrate,
N-type GaN layer, quantum well layer and p-type GaN layer;
First epitaxial wafer is carried out ICP far from the Sapphire Substrate side using dry etching equipment by step 306
Etching forms step, exposes the N-type GaN layer, and the etching depth on first epitaxial wafer is 1.2 μm, the width of Cutting Road
It is 8.5 μm;
Step 307, the first P electrode is arranged in the separate Sapphire Substrate side in the p-type GaN layer, in the N-type
The first N electrode is set far from the Sapphire Substrate side in GaN layer, obtains the second epitaxial wafer;
Second epitaxial wafer is put into Electron beam evaporation reaction chamber by step 308, is greater than or equal to using content
99.99% metallic aluminium is 240 DEG C as target, cavity temperature, and plated film rate is The output power of electron gun is
3.5kW, plated film power are 1.225kW, and chamber pressure increases by 4.5 × 10 with each second-8From 1.0 × 10-6Torr gradual change increases to
4.0×10-6Torr, the Al simple substance membrane layer of vapor deposition 65nm thickness above first P electrode and first N electrode, and
Window portion exposure first P electrode and first N electrode are opened up on the Al simple substance membrane;
Second epitaxial wafer of the Al simple substance membrane layer will be deposited from the Electron beam evaporation in step 309
It is taken out in reaction chamber, is put into quick anneal oven reaction chamber, set the initial pressure value of furnace chamber as 2Torr, furnace chamber initial temperature is
580 DEG C, vacuumizing makes furnace chamber pressure reach 1 × 10-8Torr is passed through the oxygen of 4.5sccm, keeps 2min after oxygen injection, make
Oxygen is uniform in furnace, and the temperature of furnace chamber is controlled in annealing process with each second reduces by 0.45 DEG C, is reduced to 520 from 580 DEG C of gradual changes
DEG C, the poly- reaction of ball occurs for annealing time 135s, the Al simple substance membrane layer, generates aluminum oxide film layer, and on pellumina
The aperture for forming nanometer scale, obtains third epitaxial wafer;
Step 310 takes out the third epitaxial wafer from the quick anneal oven reaction chamber, utilizes the side of sputter coating
Method, prepares the ito thin film layer of 90nm thickness in the aluminum oxide film layer, and window is opened up on ito thin film layer, the window with
The window's position is corresponding on the Al simple substance membrane layer;
The second P electrode and are deposited using electron beam vacuum evaporation coating film method on the ito thin film layer for step 311
Two N electrodes, during vapor deposition, chamber pressure is 1.0 × 10-6Torr, cavity temperature are 0 DEG C, and plated film power is 700W, plated film speed
Rate isSecond P electrode is electrically connected with first P electrode, second N electrode and first N electrode electricity
The thickness of electrode of connection, second P electrode and second N electrode is 1350nm;
Step 312, using PECVD method, it is thick that 1400nm is generated above second P electrode and second N electrode
Silicon oxide film layer, and open up on the silicon oxide film layer window portion exposure second P electrode and the 2nd N
Electrode.
Sccm in the present embodiment is that standard milliliters are per minute.
Embodiment 4
Another practical embodiment of the herein described chip manufacture method for improving LED luminance, this method comprises:
Step 401, processing Sapphire Substrate: at 1030 DEG C, reaction cavity pressure is maintained under the hydrogen atmosphere of 180mbar,
It is passed through the H that flow is 110L/min2, handle Sapphire Substrate 8.5min.
Step 402, growth N-type GaN layer: it keeps reaction cavity pressure in 200mbar, is kept for 1030 DEG C of temperature, be passed through flow
For the NH of 45L/min3, 230sccm TMGa, 65L/min H2, 2.8 μm of continued propagation of the N-type in the Sapphire Substrate
GaN layer.
Step 403, grown quantum well layer: reaction cavity pressure maintains 330mbar, 710 DEG C of low temperature, is passed through 53000sccm
NH3, 120sccm TEGa and TMIn, the flow of TMIn progressively increases to increasing 30sccm each second from 155sccm
1550sccm grows the In of 35s0.2Ga0.8N, growth thickness 1.6nm, In doping concentration increase 5E+17atoms/ with each second
cm3From 1E+19atoms/cm3Fade to 3E+19atoms/cm3;
Maintain growth conditions constant, the flow for stablizing TMIn is 1550sccm, grows the In of 120s0.22Ga0.78N, growth are thick
Degree is 1.6nm, and In doping concentration is 1.5E+20atoms/cm3;
Temperature is increased to 810 DEG C, pressure maintains 340mbar, is passed through the NH of 53000sccm3, 430sccm TEGa, it is raw
The GaN layer of long 10nm, In0.2Ga0.8N/In0.22Ga0.78N/GaN periodicity is 12.
Step 404, growth P-type GaN layer: temperature is increased to 960 DEG C, and reaction cavity pressure maintains 600mbar, is passed through flow
For the NH of 55000sccm3, 50sccm TEGa, 110L/min H2, the p-type of continued propagation 100nm on the quantum well layer
GaN layer.Generate epitaxial wafer.
Step 405 cleans epitaxial wafer 5min with the mixed solution of the concentrated sulfuric acid, hydrogen peroxide and water, wherein the concentrated sulfuric acid: dioxygen
Water: the volume ratio of water is 5:1:1, obtains the first epitaxial wafer, first epitaxial wafer successively include from bottom to up Sapphire Substrate,
N-type GaN layer, quantum well layer and p-type GaN layer;
First epitaxial wafer is carried out ICP far from the Sapphire Substrate side using dry etching equipment by step 406
Etching forms step, exposes the N-type GaN layer, and the etching depth on first epitaxial wafer is 1.1 μm, the width of Cutting Road
It is 8.3 μm;
Step 307, the first P electrode is arranged in the separate Sapphire Substrate side in the p-type GaN layer, in the N-type
The first N electrode is set far from the Sapphire Substrate side in GaN layer, obtains the second epitaxial wafer;
Second epitaxial wafer is put into Electron beam evaporation reaction chamber by step 408, is greater than or equal to using content
99.99% metallic aluminium is 240 DEG C as target, cavity temperature, and plated film rate is The output power of electron gun is
3.3kW, plated film power are 1.155kW, and chamber pressure increases by 4.0 × 10 with each second-8From 1.0 × 10-6Torr gradual change increases to
4.0×10-6Torr, the Al simple substance membrane layer of vapor deposition 60nm thickness above first P electrode and first N electrode, and
Window portion exposure first P electrode and first N electrode are opened up on the Al simple substance membrane;
Second epitaxial wafer of the Al simple substance membrane layer will be deposited from the Electron beam evaporation in step 409
It is taken out in reaction chamber, is put into quick anneal oven reaction chamber, set the initial pressure value of furnace chamber as 2Torr, furnace chamber initial temperature is
580 DEG C, vacuumizing makes furnace chamber pressure reach 1 × 10-8Torr is passed through the oxygen of 4.3sccm, keeps 2min after oxygen injection, make
Oxygen is uniform in furnace, and the temperature of furnace chamber is controlled in annealing process with each second reduces by 0.43 DEG C, is reduced to 520 from 580 DEG C of gradual changes
DEG C, the poly- reaction of ball occurs for annealing time 130s, the Al simple substance membrane layer, generates aluminum oxide film layer, and on pellumina
The aperture for forming nanometer scale, obtains third epitaxial wafer;
Step 410 takes out the third epitaxial wafer from the quick anneal oven reaction chamber, utilizes the side of sputter coating
Method, prepares the ito thin film layer of 80nm thickness in the aluminum oxide film layer, and window is opened up on ito thin film layer, the window with
The window's position is corresponding on the Al simple substance membrane layer;
The second P electrode and are deposited using electron beam vacuum evaporation coating film method on the ito thin film layer for step 411
Two N electrodes, during vapor deposition, chamber pressure is 1.0 × 10-6Torr, cavity temperature are 0 DEG C, and plated film power is 700W, plated film speed
Rate isSecond P electrode is electrically connected with first P electrode, second N electrode and first N electrode electricity
The thickness of electrode of connection, second P electrode and second N electrode is 1300nm;
Step 412, using PECVD method, it is thick that 1300nm is generated above second P electrode and second N electrode
Silicon oxide film layer, and open up on the silicon oxide film layer window portion exposure second P electrode and the 2nd N
Electrode.
Sccm in the present embodiment is that standard milliliters are per minute.
Comparative experiments:
It is a kind of conventional LED chips production method, specific steps below are as follows:
1, at 1000-1100 DEG C, reaction cavity pressure is maintained under the hydrogen atmosphere of 100-300mbar, and being passed through flow is
The H of 100-130L/min2, handle Sapphire Substrate 8-10min.
2, it keeps reaction cavity pressure in 150-300mbar, is kept for 1000-1100 DEG C of temperature, being passed through flow is 40-60L/
The NH of min3, 200-300sccm TMGa, 50-90L/min H2, 2-4 μm of continued propagation of the N-type in the Sapphire Substrate
GaN layer.
3, reaction cavity pressure maintains 300-400mbar, 700-750 DEG C of low temperature, is passed through the NH of 50000-60000sccm3、
The flow of the TEGa and TMIn of 100-150sccm, TMIn are gradually increased with increasing 25-52sccm each second from 150-170sccm
It is added to 1500-1700sccm, grows the In of 30-50sy1Ga(1-y1)N, growth thickness D1, In doping concentration are increased with each second
4E+17-7E+17atoms/cm3From 1E+19atoms/cm3Fade to 3E+19atoms/cm3;
Maintain growth conditions constant, the flow for stablizing TMIn is 1500-1700sccm, grows 100-150s's
Iny2Ga(1-y2)N, growth thickness D2, In doping concentration are 1E+20-3E+20atoms/cm3, the range of D1+D2 is 3-
The range of 3.5nm, D1=D2, y1 and y2 are 0.015-0.25, wherein y1 < y2;
Temperature is increased to 800-850 DEG C, pressure maintains 300-400mbar, is passed through the NH of 50000-60000sccm3、
The TEGa of 400-500sccm grows the GaN layer of 10nm, Iny1Ga(1-y1)N/Iny2Ga(1-y2)N/GaN periodicity is 10-15.
4, temperature is increased to 950-1000 DEG C, and reaction cavity pressure maintains 400-900mbar, and being passed through flow is 50000-
The NH of 70000sccm3, 20-100sccm TEGa, 100-130L/min H2, the continued propagation 50- on the quantum well layer
The p-type GaN layer of 200nm.Generate epitaxial wafer.
5, the epitaxial wafer is subjected to ICP etching far from the Sapphire Substrate side using dry etching equipment, is formed
Step exposes the N-type GaN layer.
6, the first P electrode is set far from the Sapphire Substrate side in the p-type GaN layer, in the N-type GaN layer
It is upper that far from the Sapphire Substrate side, the first N electrode is set.
7, using the method for sputter coating, it is thick that 70-110nm is prepared above first P electrode and first N electrode
Ito thin film layer, and window is opened up on the ito thin film layer, exposure first P electrode and first N electrode.
8, the second P electrode and the second N electrode, second P electrode and the first P are made on the ito thin film layer
Electrode electrical connection, second N electrode are electrically connected with first N electrode.
9, using PECVD method, insulating protective layer is set above second P electrode and second N electrode, and
Window portion exposure second P electrode and second N electrode are opened up on the insulating protective layer.
On same board, sample 1, root are prepared according to conventional LED chip production method (method of comparative example)
Sample 2 is prepared according to the method that this patent embodiment 3 describes;At identical conditions by sample grinding and cutting at 635 μm of 635 μ m
The chip particle of (25mil × 25mil), then sample 1 and sample 2 respectively select 200 crystal grain in same position, identical
Under packaging technology, it is packaged into white light LEDs.Then integrating sphere test sample 1 and sample 2 under the conditions of driving current 350mA are used
Photoelectric properties.Table 1 is the electrical parameter contrast table of sample 1 and sample 2.
2 electrical parameter contrast table of 1 sample 1 of table and sample
Can be seen that sample 2 compared with sample 1 by the data comparison of table 1, brightness has been increased to 591mw from 556mw,
Forward voltage is reduced to 3.10V from 3.15V, this illustrates that the LED made by this patent method, light efficiency are promoted, and brightness obviously mentions
Height, and forward voltage is substantially reduced, and the scheme that experimental data demonstrates this patent can be obviously improved LED product brightness,
And reduce forward voltage.
As can be seen from the above embodiments beneficial effect existing for the application is:
The first, the present invention can be obviously improved the brightness of LED chip, moreover it is possible to contact resistance be reduced, to reduce LED chip
Forward voltage.
The second, the present invention can be obviously improved the luminous intensity of LED, to improve LED luminance, and the present invention using
The general Processes and apparatus of LED industry at present is suitble to industrialized production.
Third, the present invention can promote the light transmittance of pellumina by control temperature regularity variation, and after keeping ball poly-
Small pore size distribution it is more uniform, be conducive to improve emergent light luminous intensity.
4th, when evaporating Al simple substance membrane layer of the present invention, by the gradual change that pressure is regular, aluminium atom can be enhanced
Activity, and the mutual shock between aluminium atom is reduced, keep aluminium film finer and close, uniformity is more preferable, to make aluminium film and extension
It is lower that layer surface contacts more preferable contact resistance.
Although some specific embodiments of the invention are described in detail by example, the skill of this field
Art personnel it should be understood that example above merely to being illustrated, the range being not intended to be limiting of the invention.Although referring to before
Stating embodiment, invention is explained in detail, for those skilled in the art, still can be to aforementioned reality
Technical solution documented by example is applied to modify or equivalent replacement of some of the technical features.It is all of the invention
Within spirit and principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
The scope of the present invention is defined by the appended claims.
Claims (8)
1. a kind of chip manufacture method for improving LED luminance, which is characterized in that comprising steps of
Epitaxial wafer 5min is cleaned with the mixed solution of the concentrated sulfuric acid, hydrogen peroxide and water, wherein the concentrated sulfuric acid: hydrogen peroxide: the volume ratio of water
For 5:1:1, the first epitaxial wafer is obtained, first epitaxial wafer successively includes Sapphire Substrate, N-type GaN layer, quantum from bottom to up
Well layer and p-type GaN layer;
First epitaxial wafer is subjected to ICP etching far from the Sapphire Substrate side using dry etching equipment, forms platform
Rank exposes the N-type GaN layer;
The first P electrode is set far from the Sapphire Substrate side in the p-type GaN layer, it is separate in the N-type GaN layer
The first N electrode is arranged in the Sapphire Substrate side, obtains the second epitaxial wafer;
Second epitaxial wafer is put into Electron beam evaporation reaction chamber, 99.99% gold is greater than or equal to using content
Belong to aluminium as target, cavity temperature is 240 DEG C, and plated film rate isThe output power of electron gun is 3-4kW, plated film
Power is 0.35 times of electron gun output power, and chamber pressure increases by 3.0 × 10 with each second-8-6.0×10-8Torr is from 1.0
×10-6Torr gradual change increases to 4.0 × 10-650- is deposited above first P electrode and first N electrode in Torr
The Al simple substance membrane layer of 80nm thickness, and open up on the Al simple substance membrane window portion exposure first P electrode and described
First N electrode;
Second epitaxial wafer that the Al simple substance membrane layer has been deposited is taken out from the Electron beam evaporation reaction chamber,
It is put into quick anneal oven reaction chamber, sets the initial pressure value of furnace chamber as 2Torr, furnace chamber initial temperature is 580 DEG C, and vacuumizing makes
Furnace chamber pressure reaches 1 × 10-8Torr is passed through the oxygen of 4-5sccm, keeps 2min after oxygen injection, keep oxygen in furnace uniform, move back
The temperature of control furnace chamber reduces 0.4-0.5 DEG C with each second during fire, is reduced to 520 DEG C from 580 DEG C of gradual changes, annealing time is
120-150s, the Al simple substance membrane layer occur the poly- reaction of ball, generate aluminum oxide film layer, and form nanometer amount on pellumina
The aperture of grade, obtains third epitaxial wafer;
The third epitaxial wafer is taken out from the quick anneal oven reaction chamber, using the method for sputter coating, in the oxygen
Change and prepare the ito thin film layer of 70-110nm thickness on aluminum membranous layer, and opens up window on ito thin film layer, the window and the Al
The window's position is corresponding on simple substance membrane layer;
Second P electrode and the second N electrode, second P electrode and first P electrode electricity are set on the ito thin film layer
Connection, second N electrode are electrically connected with first N electrode;
Using PECVD method, the silica of 1000-1800nm thickness is generated above second P electrode and second N electrode
Film layer, and window portion exposure second P electrode and second N electrode are opened up on the silicon oxide film layer.
2. the chip manufacture method according to claim 1 for improving LED luminance, which is characterized in that described to be carved using dry method
It loses equipment and first epitaxial wafer is subjected to ICP etching far from the Sapphire Substrate side, be further first extension
The etching depth of on piece is 1-1.4 μm, and the width of Cutting Road is 8-9 μm.
3. the chip structure according to claim 1 for improving LED luminance, which is characterized in that second P electrode and described
The thickness of electrode of second N electrode is 1200-1500nm.
4. the chip manufacture method according to claim 1 for improving LED luminance, which is characterized in that in the ito thin film layer
The second P electrode of upper setting and the second N electrode, further for using electron beam vacuum evaporation coating film method in the ito thin film layer
Upper vapor deposition second P electrode and second N electrode, during vapor deposition, chamber pressure is 1.0 × 10-6Torr, cavity temperature
It is 0 DEG C, plated film power is 700W, and plated film rate is
5. the chip manufacture method according to claim 1 for improving LED luminance, which is characterized in that the Sapphire Substrate,
It is further that at 1000-1100 DEG C, reaction cavity pressure is maintained under the hydrogen atmosphere of 100-300mbar, and being passed through flow is 100-
The H of 130L/min2, handle Sapphire Substrate 8-10min.
6. the chip manufacture method according to claim 1 for improving LED luminance, which is characterized in that the N-type GaN layer, into
One step is to keep reaction cavity pressure in 150-300mbar, is kept for 1000-1100 DEG C of temperature, and being passed through flow is 40-60L/min's
NH3, 200-300sccm TMGa, 50-90L/min H2, 2-4 μm of continued propagation of the N-type GaN in the Sapphire Substrate
Layer.
7. the chip manufacture method according to claim 1 for improving LED luminance, which is characterized in that the quantum well layer, into
One step is,
Reaction cavity pressure maintains 300-400mbar, 700-750 DEG C of low temperature, is passed through the NH of 50000-60000sccm3、100-
The flow of the TEGa and TMIn of 150sccm, TMIn are progressively increased to increasing 25-52sccm each second from 150-170sccm
1500-1700sccm grows the In of 30-50sy1Ga(1-y1)N, growth thickness D1, In doping concentration increase 4E+ with each second
17-7E+17atoms/cm3From 1E+19atoms/cm3Fade to 3E+19atoms/cm3;
Maintain growth conditions constant, the flow for stablizing TMIn is 1500-1700sccm, grows the In of 100-150sy2Ga(1-y2)N,
Growth thickness is D2, and In doping concentration is 1E+20-3E+20atoms/cm3, the range of D1+D2 is 3-3.5nm, D1=D2, y1
Range with y2 is 0.015-0.25, wherein y1 < y2;
Temperature is increased to 800-850 DEG C, pressure maintains 300-400mbar, is passed through the NH of 50000-60000sccm3、400-
The TEGa of 500sccm grows the GaN layer of 10nm, Iny1Ga(1-y1)N/Iny2Ga(1-y2)N/GaN periodicity is 10-15.
8. the chip manufacture method according to claim 1 for improving LED luminance, which is characterized in that the p-type GaN layer, into
One step is that temperature is increased to 950-1000 DEG C, and reaction cavity pressure maintains 400-900mbar, and being passed through flow is 50000-
The NH of 70000sccm3, 20-100sccm TEGa, 100-130L/min H2, the continued propagation 50- on the quantum well layer
The p-type GaN layer of 200nm.
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105206724A (en) * | 2015-11-09 | 2015-12-30 | 湘能华磊光电股份有限公司 | LED chip manufacturing method and LED chip |
CN105405938A (en) * | 2015-12-29 | 2016-03-16 | 中国科学院半导体研究所 | Single-chip white light LED for visible light communication and preparation method therefor |
US20160164019A1 (en) * | 2014-11-14 | 2016-06-09 | Louisiana State University Board of Supervisiors | Carbon Dot Light Emitting Diodes |
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US20160164019A1 (en) * | 2014-11-14 | 2016-06-09 | Louisiana State University Board of Supervisiors | Carbon Dot Light Emitting Diodes |
CN105206724A (en) * | 2015-11-09 | 2015-12-30 | 湘能华磊光电股份有限公司 | LED chip manufacturing method and LED chip |
CN105405938A (en) * | 2015-12-29 | 2016-03-16 | 中国科学院半导体研究所 | Single-chip white light LED for visible light communication and preparation method therefor |
Cited By (1)
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---|---|---|---|---|
CN113707772A (en) * | 2021-08-26 | 2021-11-26 | 湘能华磊光电股份有限公司 | Manufacturing method of LED epitaxial wafer for reducing dislocation density |
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