CN109585403A - Sensor package and preparation method thereof - Google Patents
Sensor package and preparation method thereof Download PDFInfo
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- CN109585403A CN109585403A CN201710906132.4A CN201710906132A CN109585403A CN 109585403 A CN109585403 A CN 109585403A CN 201710906132 A CN201710906132 A CN 201710906132A CN 109585403 A CN109585403 A CN 109585403A
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0231—Manufacturing methods of the redistribution layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0233—Structure of the redistribution layers
- H01L2224/02333—Structure of the redistribution layers being a bump
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0237—Disposition of the redistribution layers
- H01L2224/02379—Fan-out arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0237—Disposition of the redistribution layers
- H01L2224/02381—Side view
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
A kind of sensor package, including sensor, encapsulated layer, route redistribution layer, photoimageable dielectric layer and conductive column.The upper surface of encapsulated layer and the active surface of sensor are coplanar, and expose the active surface of sensor.Route redistribution layer is covered on the active surface of sensor and the upper surface of encapsulated layer.Photoimageable dielectric layer is covered on the active surface of route redistribution layer, encapsulated layer and sensor.Conductive column is set to around sensor and runs through encapsulated layer, and is electrically connected to the active surface of route redistribution layer and sensor.Wherein, each conductive column has first diameter in the section of the upper surface of encapsulated layer, and each conductive column has second diameter in the section of the opposed bottom face of encapsulated layer, and the first diameter of each conductive column is less than second diameter.
Description
Technical field
The present invention relates to a kind of semiconductor package parts and preparation method thereof, and in particular to a kind of sensor package and its
Production method.
Background technique
As science and technology is constantly progressive, the application of various detection technologies increases day by day, such as fingerprint sensor and complementary metal oxygen
Compound semiconductor image sensor application increases in the importance of portable type consumption electronic product.Envelope of the encapsulation technology to sensor
Reload request encapsulates more complicated compared to traditional integrated circuit.Such as image sensor converts incident light into the photaesthesia of electric signal
Pick-up image is carried out in light region, and fingerprint sensor includes that capacitance type sensing mode and optical profile type sense mode, is (to lead finger
Body) caused by capacitance difference exclusive or light difference be converted into electric signal and carry out picking up fingerprint data.Sensor encapsulation need to include sensing window,
To monitor transmitted light or charge inducing, and reduce simultaneously the parasitic and charge that are not intended to.When sensor chip is placed in encapsulation knot
When in structure, sensing window size and encapsulating structure height are both needed to meet opposite specification.
Fig. 1 is the operation chart of existing fingerprint sensor package part 10.As shown in Figure 1, existing fingerprint sensor
The principle of packaging part 10 is that sensor is miniaturized in highdensity capacitance sensor 12 or pressure sensor etc., is integrated in chip
In 14, when finger 16 presses protection 18 surface of glass, the inside micro capacitance sensor 12 of chip 14 can be according to fingerprint wave crest
The different quantities of electric charge assembled from trough and generated form fingermark image.
Referring to figure 2., the schematic diagram of (wire bound, WB) packaging part is welded for traditional routing.Sensor encapsulation
Part 20 includes sensing component 21, support plate 22, sealing 23 and a plurality of conducting wire 24.Sensing component 21 is configured on support plate 22, and position
In sealing 23.Routing welding is the electrical contact (electric pad) and support plate that sensing component 21 is connected using conducting wire 24
22, so that it is electrically conducted.Later, sensing component 21 is electrically connected by the pin (not shown) of conducting wire 24 and support plate 22, pin
Extend across sealing 23, and (not shown) is connect with electrical property of substrate by solder, to transmit signal.
But since traditional sensors packaging part 20 is connected using routing mode, 24 self-inductance measurement component of conducting wire, 21 upper surfaces are upward
Extension is bent again, and conducting wire 24 increases height required for sealing 23, therefore the total height of sensor package 20 is difficult to decrease, uncomfortable
It closes and is applied to glass inner layer formula shown in FIG. 1 (under glass) product, do not meet the demand of product thinning.
It referring to figure 3., is existing silicon perforation (through silicon via, TSV, also referred to as through silicon via) encapsulation
The schematic diagram of part 30.Silicon perforation encapsulation is a kind of perpendicular interconnection technology for penetrating Silicon Wafer or chip.Silicon perforation packaging part 30 exists
It is manufactured in a manner of etching or laser on chip 32 and wears silicon guide hole 34, then worn with the filling of the substances such as conductive material such as copper, polysilicon, tungsten
Silicon guide hole 34 forms conductive column 36.Existing silicon perforation packaging technology is that interior be embedded with is worn 32 flip of chip of silicon guide hole 34 and connect
It closes on the substrate 31, and inserts the protection of sealing 33.
However, drilling in itself and very high, technique item of filling requirement of the technique of conductive column 36 for accuracy in chip 32
Part is more harsh.Once there is the result of small fault to generally require to scrap whole chips, lead to the cost mistake of silicon perforation packaging technology
It is universal to be unfavorable for product for height.Therefore a kind of technique for being addressed the various defects of the above-mentioned prior art how is developed, to promote thinning
Product, and manufacturing cost is reduced, one of project solved is actually wanted at present.
Summary of the invention
Therefore, the purpose of the present invention is to provide a kind of sensor packages and preparation method thereof, with the encapsulation of big plate face
Perforation (through outside silicon via, TOSV) technology system outside (panel level packaging) technique and silicon
Make sensor package, thinning product can be promoted, and reduce manufacturing cost.
According to above-mentioned purpose, the present invention provides a kind of sensor package, including a sensor, an encapsulated layer, one first
Route redistribution layer (redistribution layer, RDL), a photoimageable dielectric layer (photo-imagible dielectric
Layer, PID layer) and multiple conductive columns.Sensor has at least one side, a back side and an active surface, active surface
On include a sensing area and multiple electrical contacts.Encapsulated layer exposes sensing to coat the side and the back side of sensor
The active surface of device.Encapsulated layer has opposite first surface and second surface, and the first surface of encapsulated layer is adjacent to sensor
Active surface.First line redistribution layer is covered on the active surface of sensor and the first surface of encapsulated layer.First line weight cloth
Layer is for electrically connecting to the electrical contact of sensor.Photoimageable dielectric layer is covered in the first table of first line redistribution layer, encapsulated layer
On the active surface of face and sensor.Conductive column is set to around sensor and runs through encapsulated layer.Conductive column from encapsulated layer first
Surface electrical behavior connects first line redistribution layer, extends to the second surface of encapsulated layer.Wherein, each conductive column in encapsulated layer first
The section on surface has a first diameter, and each conductive column has a second diameter in the section of the second surface of encapsulated layer, and each
The first diameter of conductive column is less than second diameter.First diameter is about the 40% ~ 80% of second diameter.
In one embodiment of the invention, the first diameter of each conductive column is the 40% ~ 80% of second diameter.
In one embodiment of the invention, each conductive column protrudes from the first surface and second surface of encapsulated layer, and conductive column
The first surface for protruding from encapsulated layer is embedded in first line redistribution layer.
In one embodiment of the invention, wherein the material of encapsulated layer is high filler content dielectric material comprising accounts for whole ratio
Example is the filler of the wt.% of 70 wt.%~90.
In one embodiment of the invention, photoimageable dielectric layer covers the electrical contact and sensing area of sensor.Sensor encapsulation
Part further includes an optical cement and a protection glass.Optical cement is covered on photoimageable dielectric layer.Protection glass is covered on optical cement.
Optical cement is to cohere photoimageable dielectric layer and protection glass.
In one embodiment of the invention, photoimageable dielectric layer covers the electrical contact of sensor, and exposes sensor
Sensing area.Sensor package further includes an optical cement and a protection glass.Optical cement is covered in photoimageable dielectric layer and sensor
Sensing area on.Protection glass is covered on optical cement.Optical cement is to cohere photoimageable dielectric layer and protection glass.
In one embodiment of the invention, sensor package further includes one second route redistribution layer, is covered in encapsulated layer
Second surface.Second route redistribution layer is for electrically connecting to these conductive columns.
In one embodiment of the invention, sensor package further includes one second route redistribution layer, is covered in encapsulated layer
Second surface, and each conductive column protrudes from the second surface of encapsulated layer and is embedded in the second route redistribution layer.
According to above-mentioned purpose, the present invention additionally provides a kind of methods for making sensor package.Firstly, providing a big plate
Face support plate (panel type carrier) and a peelable film, peelable film are located on big plate face support plate surface.Then, it provides
Multiple sensors, each sensor have at least one side, a back side and an active surface, include a sensing area on each active surface with
Multiple electrical contacts.Then, sensor is fixed on big plate face support plate using peelable film, sensor is with active surface towards greatly
The mode of plate face support plate is fixed.Thereafter, an encapsulated layer, the side and the back side of cladding peelable film, sensor, encapsulated layer tool are formed
There are opposite a first surface and a second surface, and the first surface of encapsulated layer contacts peelable film.Also, carry out a drilling
Technique, to form multiple perforations (via hole) around each sensor through encapsulated layer, wherein each perforation is in encapsulated layer
The section of first surface has a first diameter, and each perforation has a second diameter in the section of the second surface of encapsulated layer, and
The first diameter of each perforation is less than second diameter.First diameter is about the 40% ~ 80% of second diameter.Then, filling perforation, and in
Multiple conductive columns (via plug) is formed in perforation, conductive column extends to the first table of encapsulated layer from the second surface of encapsulated layer
Face.Later, from sensor and encapsulated layer removal peelable film and big plate face support plate.Then, a first line redistribution layer, position are formed
In on the electrical contact and conductive column of sensor, first line redistribution layer is for electrically connecting to the electrical contact and conduction of sensor
Column.Thereafter, a photoimageable dielectric layer is formed, the active of first line redistribution layer, the first surface of encapsulated layer and sensor is covered in
On face.Also, carrying out a cutting technique is separated from each other sensor to cut photoimageable dielectric layer and encapsulated layer.
In one embodiment of the invention, wherein bore process includes running through peelable film and encapsulated layer, and fill these and pass through
The step of hole includes that these conductive columns is made to extend to peelable film from the second surface of encapsulated layer.
Wherein, the first diameter of each conductive column is the 40% ~ 80% of the second diameter.
In summary, the present invention makes sensor package by the outer puncturing technique of silicon, forms cone cell in encapsulated layer and leads
Electric column, conductive column are 40% ~ 80% in the diameter of sensor side and the ratio of connecting side diameter.Using this conductive column as sensor
Conductive structure between external printed circuit board makes the present invention have the advantages that ultrathin packaging structure and reduces manufacturing cost.
Further, since the present invention uses big plate face technique, numerous sensors can be fixed on big plate face support plate and carry out technique in batches,
Therefore batch output of the invention can be the several times of the prior art, and process efficiency is substantially improved.
Detailed description of the invention
Fig. 1 is the operation chart of existing fingerprint sensor package part.
Fig. 2 is the schematic diagram that traditional routing welds packaging part.
Fig. 3 is the schematic diagram of existing silicon perforation packaging part.
Fig. 4 is the flow diagram of the method for production sensor package of the invention.
The section view of Fig. 5 A, Fig. 5 B and Fig. 6 to the method that Figure 12 is first embodiment of the invention production sensor package is shown
It is intended to, wherein Fig. 5 B is the schematic top plan view of the production method of Fig. 5 A, and Fig. 9 B is the schematic top plan view of the production method of Fig. 9 A.
Figure 13 is the schematic cross-sectional view of sensor package made by second embodiment of the invention.
Figure 14 is the schematic cross-sectional view of sensor package made by third embodiment of the invention.
Description of symbols
10- fingerprint sensor package part
12- capacitance sensor
14,32- chip
16- finger
18- protects glass
20- routing welds packaging part
21- sensing component
22- support plate
23- sealing
24- conducting wire
30- silicon perforation packaging part
31- substrate
34- wears silicon guide hole
36- conductive column
33- sealing
40,42,44- step
46,48,50- step
52,54,56- step
58,60- step
100- sensor package
The big plate face support plate of 102-
103- peelable film
104- sensor
104a- active surface
The back side 104b-
The side 104c-
105- encapsulated layer
105a- first surface
105b- second surface
106- sensing area
108- electrical contact
110- perforation
120- conductive column
130- first line redistribution layer
134- the second route redistribution layer
140- photoimageable dielectric layer
142- optical cement
144- dielectric layer
150- protects glass
160- printed circuit board
162- electrical connection component
200,300- sensor package.
Specific embodiment
It can be further understood by following detailed description and accompanying drawings about the advantages and spirit of the present invention.This hair
Detailed description are as follows for the manufacture and use of bright preferred embodiment.It must be appreciated that the present invention provides many applicable innovations
Concept can do extensive implementation under specific background technique.This specific embodiment only indicates in a particular manner, with
It manufactures and uses the present invention, but be not intended to limit the scope of the invention.
Fig. 4 is the flow diagram of the method for present invention production sensor package；Fig. 5 A, Fig. 5 B and Fig. 6 are to Figure 12
The schematic cross-sectional view of the method for sensor package is made for first embodiment of the invention；Fig. 5 B is the sensor package of Fig. 5 A
The schematic top plan view of semi-finished product.As shown in the step 40 of Fig. 4, step 42, Fig. 5 A and Fig. 5 B, make sensor package the step of
40 first provide big plate face support plate (panel type carrier) 102 and a peelable film 103, and peelable film 103 is located at big plate
On 102 surface of face support plate.Wherein, peelable film 103 can be so-called release film (release film).In addition, big plate face carries
Plate 102 may include metal material, for example including iron, stainless steel or copper.
As shown at 42, sensor Joining Technology is then carried out.Multiple sensors 104 are first provided, can be fingerprint biography
Sensor (fingerprint sensor) or complementary metal oxide semiconductor (CMOS) image sensor.Each sensor 104
Surface definition has an active surface 104a, a back side 104b and at least one side 104c.It include a sensing on each active surface 104a
Area 106 and multiple electrical contacts (electrical pad) 108.Then, sensor 104 is fixed on using peelable film 103
On big plate face support plate 102.Sensor 104 is fixed in such a way that active surface 104a is downward and towards big plate face support plate 102.Wherein scheme
Be shown as by one big plate face support plate 102 multiply carry 4 sensors 104 for be illustrated, and 104 quantity of actual sensor not by
Diagram is limited to.
As shown in the step 44 and Fig. 6 of Fig. 4, it is then packaged (molding) technique.The shape on big plate face support plate 102
At an encapsulated layer 105, to coat the side 104c and back side 104b of peelable film 103, sensor 104.Encapsulated layer 105 has phase
Pair a first surface 105a and a second surface 105b, and encapsulated layer 105 first surface 105a contact peelable film 103.
Formed encapsulated layer 105 the step of may include by packaging plastic be placed in mold in (not shown), after heating by running channel with
The die cavity of chip and support plate has been put in cast gate, injection well, is completed press-molding procedure, is carried out baking process, then with cure package layer
105.Encapsulated layer 105 includes epoxy resin encapsulating material (epoxy molding compound, EMC, also referred to as solid encapsulation material
Material), epoxy resin encapsulating material may include silica, epoxy resin, curing agent and flame retardant.
In this present embodiment, the material of encapsulated layer 105 can be high filler content dielectric material (high filler
Content dielectric material), for example, casting die compound (molding compound), with epoxy resin
It (epoxy) is main matrix, the overall ratio for accounting for casting die compound is about the wt.% of 8 wt.%~12, and adulterates and account for entirety
The filler of about 70 wt.% of wt.%~90 of ratio and formed.Wherein, filler may include silica and aluminium oxide, with
Reach and increases mechanical strength, reduce thermal linear expansion coefficient, increase heat transfer, increase the effect of blocking water and reducing excessive glue.
And as shown in the step 46 of Fig. 4 and Fig. 7, a Laser drill technique is carried out, to be formed in each 104 surrounding of sensor
Multiple perforations 110, through encapsulated layer 105 and peelable film 103.Wherein first surface 105a of each perforation 110 in encapsulated layer 105
Section have a first diameter, each perforation 110 the section of the second surface 105b of encapsulated layer 105 have a second diameter,
And the first diameter of each perforation 110 is less than second diameter.In this present embodiment, first diameter is about the 40% ~ 80% of second diameter.
Since big 102 material of plate face support plate is different from encapsulated layer 105 and peelable film 103, such as the metal material of big plate face support plate 102
Hardness is higher, therefore Laser drill technique is made to be easy to stop at big 102 surface of plate face support plate.
Then as shown in the step 48 of Fig. 4 and Fig. 8, perforation 110 is filled using conductive material, and is formed in perforation 110
Multiple conductive columns 120.For example, first carry out a bronze medal electroplating technology or one without electrolytic copper electroplating technology in forming layers of copper in perforation 110,
The extra layers of copper of the second surface 105b of grinding technics removal encapsulated layer 105 is carried out again.Since perforation 110 runs through peelable film
103 with encapsulated layer 105, therefore fill perforation 110 the step of include making second surface 105b of the conductive column 120 from encapsulated layer 105
Extend to peelable film 103.Conductive column 120 extends to the first surface of encapsulated layer 105 from the second surface 105b of encapsulated layer 105
105a, and the first surface 105a and second surface 105b of encapsulated layer 105 can be protruded from.
Later as shown in the step 50 of Fig. 4 and Fig. 9 A and Fig. 9 B, peelable film is removed from sensor 104 and encapsulated layer 105
103 with big plate face support plate 102, tilt sensor 104 and encapsulated layer 105.
Then as shown in the step 52 of Fig. 4 and Figure 10, in the electrical contact 108, conductive column 120 and part of sensor 104
Encapsulated layer 105 first surface 105a on form a first line redistribution layer (redistribution layer, RDL) 130.
First line redistribution layer 130 is for electrically connecting to the electrical contact 108 and conductive column 120 of sensor 104, wherein conductive column 120
The first surface 105a for protruding from encapsulated layer 105 is embedded in first line redistribution layer 130.Enable sensor 104 whereby to
Outer work electrically extends.First line redistribution layer 130 can be single layer structure substrate, be also possible to multilayer structure substrate, the number of plies is not
Limit.That is, the first line redistribution layer 130 that sensor 104 is fanned out to (fan out) is directly in encapsulated layer 105 and sensor 104
Surface is formed, and encapsulated layer 105 and sensor 104 are coplanar.
It should be particularly noted that, when first line redistribution layer 130 is formed on the encapsulated layer 105 of high filler content dielectric material
When, then must at least part of first surface 105a to encapsulated layer 105 carry out the further work such as roughness control
Skill.
Thereafter as shown in the step 54 of Fig. 4 and Figure 11, a photoimageable dielectric layer 140 is formed, first line redistribution layer is covered in
130, on the active surface 104a that the first surface 105a that encapsulated layer 105 exposes and sensor 104 expose, and photoimageable dielectric layer
The electrical contact 108 and sensing area 106 of 140 covering sensors 104.
As shown in step 56, followed by cutting technique to cut photoimageable dielectric layer 140 and encapsulated layer 105 makes each biography
Sensor 104 separates independently of one another, completes multiple sensor packages 100 with batch, and make the edge and envelope of photoimageable dielectric layer 140
The edge of dress layer 105 flushes.Big plate face support plate 102 after cutting becomes separate carrier, carries each individual sensor 104.Pass through biography
Sensor packaging part 100 is fanned out to function, to determine that chip logic lock (logic gate) output can reach logic gate on circuit board
The maximum number of input.
Then as shown in the step 58 of Fig. 4, step 60 and Figure 12, step 58 is optionally the second of encapsulated layer 105
Multiple electrical connection components 162 are formed on the 105b of surface.Electrical connection component 162 can be electrically connected a printed circuit board
(printed circuit board, PCB) 160 and conductive column 120.Sensor 104 and printed circuit board 160 pass through sensor
The conductive column 120 in 104 outsides connects, and to be proximate to 104 end of sensor smaller for the shape of conductive column 120, and close to printing electricity
Plate 160 end in road is larger.
Step 60 further includes forming an optical cement 142 in the entire upper surface of photoimageable dielectric layer 140, then at optical cement 142
It is upper that a protection glass 150 is provided.Wherein optical cement 142 is to cohere photoimageable dielectric layer 140 and protection glass 150.In addition, optics
Glue 142 can be optical adhesive tape (optical clear adhesive, OCA) or liquid optical cement (optical clear
Resin, OCR), in this and it is not limited.
Here, electrical connection component 162 can be tin ball (solder ball), that is, the sensor package being subsequently formed
(ball grid array, BGA) is encapsulated for ball bar array.The encapsulation of ball bar array is commonly used to fix and be electrically connected sensor 104
With circuit board.The encapsulation of ball bar array can be provided than other as dual-in-line package (dual in-line package) or four sides are drawn
Foot flat package (quad flat package) accommodates more pins, has shorter average conductor length, therefore has more preferably
High speed efficiency.In addition, in other embodiments, electrical connection component 162 is also possible to the conductive bumps such as gold, copper.
In other embodiments, conductive column 120 of the present invention is in the part that the second surface 105b of encapsulated layer 105 is exposed
Multiple contact points (land), and the sensor package being subsequently formed be plane grid array encapsulation (land grid array,
LGA).Plane grid array encapsulation feature be its stitch be located at socket on rather than ic core on piece.Plane grid number
The contact point of the sensor 104 of group encapsulation can be directly coupled on printed circuit board.On the integrated with traditional stitch
The problem of packaged type is compared, and stitch damage can be reduced simultaneously can increase foot position.
Figure 13 is the schematic cross-sectional view of sensor package 200 made by second embodiment of the invention.Second embodiment
The difference is that, second embodiment further includes the part sense replaced on sensing area 106 with optical cement 142 with first embodiment
The step of light dielectric layer 140.
In detail, as shown in figure 13, a Patternized technique is carried out to remove the part photoimageable dielectric layer on sensing area 106
140.At this point, photoimageable dielectric layer 140 can cover the electrical contact 108 of sensor 104, and expose the sensing area of sensor 104
106.Accordingly, later when step 60 coated optical glue 142, optical cement 142 inserts the groove of photoimageable dielectric layer 140 together
In, it is covered in the optical cement 142 of sensor package 200 on the sensing area 106 of photoimageable dielectric layer 140 and sensor 104.In
This, optical cement 142 is preferable with liquid optical cement.
Second embodiment is in response to different product characteristic, such as sensor 104 is complementary metal oxide semiconductor image
When sensor, the structure of sensor package 200 can promote the photoperceptivity of sensor 104.Photoimageable dielectric on sensing area 106
140 groove of layer can be used as the sensing window of sensor package 200, and optical cement 142 allows the extraneous light of a large amount to pass through, makes to sense
Device packaging part 200 has high sensing function.
Figure 14 is the schematic cross-sectional view of sensor package 300 made by third embodiment of the invention.3rd embodiment
The difference is that, 3rd embodiment further includes one second route redistribution layer 134 and a dielectric layer 144 with first embodiment.
As shown in figure 14, such as after forming conductive column 120 (after step 50), be electrically connected component 162 it
Before (before step 52, step 54, step 56 or step 58), in forming the second route redistribution layer 134 and dielectric on encapsulated layer 105
Layer 144.At this point, the second route redistribution layer 134 is covered in the second surface 105b of encapsulated layer 105, the second route with dielectric layer 144
Redistribution layer 134 is for electrically connecting to conductive column 120 and electrical connection component 162, and wherein conductive column 120 protrudes from encapsulated layer 105
Second surface 105b be embedded in the second route redistribution layer.Second route redistribution layer 134 can redistribute external connector (electrically
Connection component 162 or the second route redistribution layer 134 itself) position, with printed circuit board 160 needed for cooperating.
In conclusion the present invention makes sensor package by the outer puncturing technique of silicon, cone cell is formed in encapsulated layer and is led
Electric column, conductive column are 40% ~ 80% in the diameter of sensor side and the ratio of connecting side diameter.Using this conductive column as sensor
Conductive structure between external printed circuit board makes the present invention have the advantages that ultrathin packaging structure and reduces manufacturing cost.
Further, since the present invention uses big plate face technique, numerous sensors can be fixed on big plate face support plate and carry out technique in batches,
Therefore batch output of the invention can be the several times of the prior art, and process efficiency is substantially improved.
The foregoing is merely illustratives, rather than are restricted.It is any without departing from spirit and scope of the invention, and to its into
Capable equivalent modifications or change, should be included in protection scope of the present invention.
Claims (13)
1. a kind of sensor package characterized by comprising
One sensor has at least one side, a back side and an active surface, includes a sensing area and multiple electricity on the active surface
Property contact；
One encapsulated layer to coat at least one side and the back side of the sensor, and exposes the active of the sensor
Face, which has opposite a first surface and a second surface, and the first surface of the encapsulated layer is adjacent to the biography
The active surface of sensor；
One first line redistribution layer is covered on the active surface of the sensor and the first surface of the encapsulated layer, this first
Route redistribution layer is for electrically connecting to these electrical contacts of the sensor；
One photoimageable dielectric layer is covered in the master of the first line redistribution layer, the first surface of the encapsulated layer and the sensor
On dynamic face；And
Multiple conductive columns, be set to around the sensor and through the encapsulated layer, these conductive columns from the encapsulated layer this first
Surface electrical behavior connects the first line redistribution layer, extends to the second surface of the encapsulated layer, wherein each conductive column is in the encapsulation
The section of the first surface of layer has a first diameter, and each conductive column has one in the section of the second surface of the encapsulated layer
Second diameter, and the first diameter is less than the second diameter.
2. sensor package as described in claim 1, which is characterized in that the first diameter of each conductive column is that this is second straight
The 40% ~ 80% of diameter.
3. sensor package as described in claim 1, which is characterized in that each conductive column protrude from the encapsulated layer this first
Surface and the second surface, and the conductive column protrudes from the first surface of the encapsulated layer and is embedded in the first line redistribution layer.
4. sensor package as described in claim 1, which is characterized in that the material of the encapsulated layer is high filler content dielectric
Material comprising account for the filler that overall ratio is the wt.% of 70 wt.%~90.
5. sensor package as described in claim 1, which is characterized in that the photoimageable dielectric layer covers these of the sensor
Electrical contact and the sensing area.
6. sensor package as claimed in claim 5, which is characterized in that further include:
One optical cement is covered on the photoimageable dielectric layer；And
One protection glass, is covered on the optical cement, wherein the optical cement is to cohere the photoimageable dielectric layer and the protection glass.
7. sensor package as described in claim 1, which is characterized in that the photoimageable dielectric layer covers these of the sensor
Electrical contact, and expose the sensing area of the sensor.
8. sensor package as claimed in claim 7, which is characterized in that further include:
One optical cement is covered on the sensing area of the photoimageable dielectric layer and the sensor；And
One protection glass, is covered on the optical cement, wherein the optical cement is to cohere the photoimageable dielectric layer and the protection glass.
9. sensor package as described in claim 1, which is characterized in that further include one second route redistribution layer, be covered in
The second surface of the encapsulated layer, the second route redistribution layer are for electrically connecting to these conductive columns.
10. sensor package as claimed in claim 3, which is characterized in that further include one second route redistribution layer, be covered in
The second surface of the encapsulated layer, and each conductive column protrude from the encapsulated layer the second surface be embedded in second route weight cloth
Layer.
11. a kind of method for making sensor package characterized by comprising
A big plate face support plate and a peelable film are provided, which is located on the big plate face support plate surface；
Multiple sensors are provided, it includes one on each active surface that each sensor, which has at least one side, a back side and an active surface,
Sensing area and multiple electrical contacts；
These sensors are fixed on the big plate face support plate using the peelable film, these sensors are with these active surface directions
The mode of the big plate face support plate is fixed；
An encapsulated layer is formed, these sides and these back sides of the peelable film, these sensors are coated, which has phase
Pair a first surface and a second surface, and the first surface of the encapsulated layer contacts the peelable film；
A bore process is carried out, to form multiple perforations around each sensor through the encapsulated layer, wherein each perforation is at this
The section of the first surface of encapsulated layer has a first diameter, and each perforation has in the section of the second surface of the encapsulated layer
One second diameter, and the first diameter of each perforation is less than the second diameter；
These perforations are filled, and form multiple conductive columns in these perforations, second table of these conductive columns from the encapsulated layer
Face extends to the first surface of the encapsulated layer；
The peelable film and the big plate face support plate are removed from these sensors and the encapsulated layer；
A first line redistribution layer is formed, on these electrical contacts and these conductive columns of these sensors, the First Line
Road redistribution layer is for electrically connecting to these electrical contacts and these conductive columns of these sensors；
A photoimageable dielectric layer is formed, is covered on the first surface of the first line redistribution layer and the encapsulated layer；And
A cutting technique is carried out, to cut the photoimageable dielectric layer and the encapsulated layer, is separated from each other these sensors.
12. the method for production sensor package as claimed in claim 11, which is characterized in that the bore process includes running through
The peelable film and the encapsulated layer, and the step of filling these perforations includes making second table of these conductive columns from the encapsulated layer
Face extends to the peelable film.
13. the method for production sensor package as claimed in claim 11, which is characterized in that this of each conductive column is first straight
Diameter is the 40% ~ 80% of the second diameter.
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| CN110571209A (en) * | 2018-05-18 | 2019-12-13 | 矽品精密工业股份有限公司 | Electronic package and manufacturing method thereof |
| CN111291525A (en) * | 2020-02-17 | 2020-06-16 | 福州大学 | Layer allocation method considering bus and non-bus net |
| WO2020248466A1 (en) * | 2019-06-14 | 2020-12-17 | 苏州敏芯微电子技术股份有限公司 | Back hole lead type pressure sensor and manufacturing method therefor |
| CN112985471A (en) * | 2021-04-30 | 2021-06-18 | 深圳市汇顶科技股份有限公司 | Capacitive sensor and manufacturing method thereof |
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| CN103000574A (en) * | 2011-09-15 | 2013-03-27 | 新科金朋有限公司 | Method of forming semiconductor die with active region responsive to external stimulus |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110571209A (en) * | 2018-05-18 | 2019-12-13 | 矽品精密工业股份有限公司 | Electronic package and manufacturing method thereof |
| WO2020248466A1 (en) * | 2019-06-14 | 2020-12-17 | 苏州敏芯微电子技术股份有限公司 | Back hole lead type pressure sensor and manufacturing method therefor |
| CN111291525A (en) * | 2020-02-17 | 2020-06-16 | 福州大学 | Layer allocation method considering bus and non-bus net |
| CN111291525B (en) * | 2020-02-17 | 2022-04-08 | 福州大学 | Layer allocation method considering bus and non-bus net |
| CN112985471A (en) * | 2021-04-30 | 2021-06-18 | 深圳市汇顶科技股份有限公司 | Capacitive sensor and manufacturing method thereof |
| CN112985471B (en) * | 2021-04-30 | 2021-11-02 | 深圳市汇顶科技股份有限公司 | Capacitive sensor and manufacturing method thereof |
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| CN109585403B (en) | 2020-09-25 |
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