CN109583581B - Data conversion device and related product - Google Patents
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- CN109583581B CN109583581B CN201811459240.2A CN201811459240A CN109583581B CN 109583581 B CN109583581 B CN 109583581B CN 201811459240 A CN201811459240 A CN 201811459240A CN 109583581 B CN109583581 B CN 109583581B
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
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- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
Abstract
The present disclosure relates to a data conversion device and related products, the device for converting floating points into fixed points, the device comprising: the fixed point number effective number determining module is used for determining an undetermined effective number according to the index and the effective number of the floating point number; and the fixed point number acquisition module is used for determining the fixed point number according to the symbol of the floating point number and the undetermined effective number. The floating point number can be quickly and accurately converted into the fixed point number. Compared with the fixed point number, the floating point number improves the representation range of the data on the premise of ensuring the precision.
Description
Technical Field
The present disclosure relates to the field of information processing technologies, and in particular, to a data conversion apparatus and a related product.
Background
With the continuous development of information technology, the demand for completing various computing tasks by using computing devices is increasing. In various different calculation tasks, different data formats of data to be calculated have different influences on the calculation efficiency and the calculation precision of the calculation device, and the requirements of different calculation tasks cannot be met. The data format of the data to be operated may be fixed point number, and for the number with the same bit width, the representation range and precision of the fixed point number are inversely related, and when the fixed point number is used for operation, the problem that the representation range is insufficient may exist.
Disclosure of Invention
In view of the above, the present disclosure provides a data conversion apparatus and related products, which are used to improve the expression range of data while ensuring the data accuracy,
according to an aspect of the present disclosure, there is provided a data conversion apparatus for converting a floating point number into a fixed point number, the apparatus including:
the fixed point number effective number determining module is used for determining an undetermined effective number according to the index and the effective number of the floating point number;
and the fixed point number acquisition module is used for determining the fixed point number according to the symbol of the floating point number and the undetermined effective number.
In a possible implementation manner, the fixed-point number and effective number determining module includes:
a highest nonzero digit determining submodule for determining the digit of the highest nonzero digit of the floating point number effective number;
the displacement value determining submodule is used for determining a displacement value according to the index of the floating point number and the digit of the highest nonzero digit of the effective number of the floating point number;
and the fixed point number effective number determining submodule is used for moving the effective number of the floating point number according to the displacement value to obtain an undetermined effective number.
In a possible implementation manner, the displacement value determination submodule is configured to determine a sum obtained by adding the exponent of the floating point number, the digit of the highest nonzero digit of the valid number of the floating point number and 1 as the displacement value.
In a possible implementation manner, the fixed point number and effective number determining submodule is configured to shift the effective number of the floating point number to the left by the digit of the displacement value, so as to obtain an undetermined effective number.
In a possible implementation manner, the fixed-point number obtaining module includes:
the effective number obtaining submodule is used for obtaining the effective number of the fixed point number according to the symbol of the floating point number and the complement of the undetermined effective number;
and the fixed point number obtaining submodule is used for obtaining the fixed point number according to the effective number of the fixed point number of the symbol of the floating point number.
In one possible implementation, the fixed point number is in 16-bit binary form and the floating point number is in 8-bit binary form.
In one possible implementation, the sign bit in the floating point number is 1 bit, and the exponent bit is 1 bit.
According to an aspect of the present disclosure, there is provided a neural network operation device including one or more of the above data conversion devices, the neural network operation device being configured to perform a set neural network operation.
According to an aspect of the present disclosure, there is provided a combined operation device comprising one or more of the neural network operation device of any one of the above, a universal interconnect interface and other processing devices;
and the neural network operation device interacts with the other processing devices to jointly complete the calculation operation specified by the user.
According to an aspect of the present disclosure, there is provided a neural network chip including:
the data conversion apparatus of any of the above; or
The neural network operation device described above; or
The combined treatment device.
According to an aspect of the present disclosure, there is provided an electronic apparatus including:
the data conversion apparatus of any of the above; or
The neural network operation device described above; or
The above-described combined treatment apparatus; or
The neural network chip is described above.
In an embodiment of the present disclosure, a data conversion apparatus for converting floating points into fixed points, the apparatus includes: the fixed point number effective number determining module is used for determining an undetermined effective number according to the index and the effective number of the floating point number; and the fixed point number acquisition module is used for determining the fixed point number according to the symbol of the floating point number and the undetermined effective number. The data conversion device can quickly and accurately convert the floating point number into the fixed point number. Compared with the fixed point number, the floating point number improves the representation range of the data on the premise of ensuring the precision.
In some embodiments, the electronic device comprises a data processing apparatus, a robot, a computer, a printer, a scanner, a tablet, a smart terminal, a cell phone, a tachograph, a navigator, a sensor, a camera, a server, a cloud server, a camera, a camcorder, a projector, a watch, a headset, a mobile storage, a wearable device, a vehicle, a household appliance, and/or a medical device.
In some embodiments, the vehicle comprises an aircraft, a ship, and/or a vehicle; the household appliances comprise a television, an air conditioner, a microwave oven, a refrigerator, an electric cooker, a humidifier, a washing machine, an electric lamp, a gas stove and a range hood; the medical equipment comprises a nuclear magnetic resonance apparatus, a B-ultrasonic apparatus and/or an electrocardiograph.
Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.
FIG. 1 shows a block diagram of a data conversion device according to an embodiment of the present disclosure;
FIG. 2 shows a block diagram of a data conversion device according to an embodiment of the present disclosure;
fig. 3 shows a block diagram of a combined processing device according to an embodiment of the present disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers can indicate functionally identical or similar elements. While the various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements and circuits that are well known to those skilled in the art have not been described in detail so as not to obscure the present disclosure.
Fig. 1 is a block diagram illustrating a data conversion apparatus for converting floating point numbers into fixed point numbers according to an embodiment of the present disclosure, as shown in fig. 1, the apparatus including:
and the fixed point number effective number determining module 10 is used for determining the undetermined effective number according to the index and the effective number of the floating point number.
In one possible implementation, the fixed-point number is in 16-bit binary form, and the fixed-point number Y in 16-bit binary form is: y is15Y14Y13Y12Y11Y10Y9Y8Y7Y6Y5Y4Y3Y2Y1Y0Wherein Y is15Is the sign bit, Y14Y13Y12Y11Y10Y9Y8Y7Y6Y5Y4Y3Y2Y1Y0Is a significant digit.
In one possible implementation, the number of floating points is in an 8-bit binary form. The sign bit in the floating point number is 1 bit, the exponent bit is 1 bit, and the significant bit is 6 bits. The sign bit and the exponent bit of the floating point number may be located at any non-overlapping positions among the 8-bit digits of the floating point number. The present disclosure is not limited thereto. For example, the number of floating points counts digits from 0 from right to left, and the number of floating points X in 8-bit binary form is: x7X6X5X4X3X2X1X0Wherein X is7Is the sign bit, X6Is an exponent number. X5X4X3X2X1X0Is a significant digit. In one possible implementation, the value of the floating point number can then be shown as the following equation (1):
±m·basep+e+1＝±1.d·base2p+e+1formula (1)
Where m is the sign of the floating point number and base is the base, usually 2. e is the exponent of the floating point number, p is the digit of the highest nonzero digit in the effective number of floating point numbers, and d is the fractional part of the effective number of floating point numbers.
For example, if the floating point number is "01010101", the floating point number is 010101 x 24+1+1＝1.0101*22 *4+1+1。
In a possible implementation manner, the effective number of the fixed point number is related to the index and the effective number of the floating point number, and the fixed point number effective number determining module may determine the effective number to be determined according to the index and the effective number of the floating point number. The floating point number can be directly input into the fixed point number effective number determining module, and the fixed point number effective number determining module identifies the index and the effective number in the floating point number. Or respectively inputting the index and the effective number in the identified floating point number into a fixed point number effective number determining module, and determining the undetermined effective number by the fixed point number effective number determining module according to the input index and the effective number of the floating point number. The present disclosure is not limited thereto.
The fixed point number obtaining module 20 determines the fixed point number according to the symbol of the floating point number and the undetermined effective number.
In a possible implementation manner, the fixed point number obtaining module may determine the effective number of the fixed point number according to the symbol of the floating point number and the undetermined effective number determined by the fixed point number effective number determining module. The fixed point number obtaining module can obtain the final fixed point number according to the effective number of the fixed point number and the symbol of the floating point number.
In this embodiment, the data conversion apparatus is configured to convert a floating point number into a fixed point number, and the apparatus includes: the fixed point number effective number determining module is used for determining an undetermined effective number according to the index and the effective number of the floating point number; and the fixed point number acquisition module is used for determining the fixed point number according to the symbol of the floating point number and the undetermined effective number. The data conversion device can quickly and accurately convert the floating point number into the fixed point number. Compared with the fixed point number, the floating point number improves the representation range of the data on the premise of ensuring the precision.
Fig. 2 shows a block diagram of a data conversion apparatus according to an embodiment of the present disclosure, and as shown in fig. 2, in one possible implementation manner, the fixed-point effective number determining module 10 includes:
a highest non-zero digit determining submodule 11 for determining the digit of the highest non-zero digit of the floating point number significant number.
In one possible implementation, the highest non-zero digit determining submodule may include a shifter, the significant number of the floating point number may be input into the shifter, and the shift may be started from left to right from the highest bit of the significant number, and during the shift, the highest non-zero digit determining submodule may use the digit where the first "1" appears as the highest non-zero digit. For example, the number of floating points is "10101100", the significand is "101100", and the number of highest non-zero bits is 5.
And the displacement value determining submodule 12 is configured to determine a displacement value according to the index of the floating point number and the digit of the highest nonzero digit of the effective number of the floating point number.
In one possible implementation, the displacement value determination submodule may be configured to determine a sum obtained by adding the exponent of the floating point number, the digit of the highest non-zero bit of the floating point number valid number, and 1 as the displacement value. For example, if the highest non-zero bit of the float count "10101100" has a bit number of 5 and the exponent is 0, then the displacement value is: 5+0+1 ═ 6.
In a possible implementation manner, the displacement value determination submodule may be configured to determine, as the pending displacement value, a sum obtained by adding the exponent of the floating point number and the digit of the highest nonzero digit of the valid number of the floating point number. For example, if the highest nonzero digit of the floating point number "10101100" is 5 and the exponent is 0, then the pending shift value is: 5+0 ═ 5.
And the fixed point number effective number determining submodule 13 is used for moving the effective number of the floating point number according to the displacement value to obtain an undetermined effective number.
In a possible implementation manner, the fixed-point number-of-validity determining submodule may be configured to shift the valid number of the floating point number to the left by the number of bits of the displacement value, so as to obtain a to-be-determined valid number. For example, the fixed point number and effective number determination submodule may shift the effective number with the floating point number "10101100" to "101100" by 6 bits to the left, to obtain the undetermined effective number "101100000000".
In a possible implementation manner, the fixed point number effective number determining submodule may be configured to move the effective number of the floating point number leftward by a number of bits obtained by adding 1 to the value to be shifted, so as to obtain a to-be-determined effective number. For example, the fixed-point number-of-validity determination submodule may set the valid number with the floating point number "10101100" to "101100", shift the to-be-determined shift value 5 bits +1 bits to the left by 6 bits, and similarly obtain the to-be-determined valid number "101100000000".
In a possible implementation manner, the fixed-point number obtaining module 20 includes:
and the effective number obtaining submodule 21 is configured to obtain the effective number of the fixed point number according to the symbol of the floating point number and the complement of the undetermined effective number.
In one possible implementation, when the sign of the floating point number is 0, the floating point number is a positive number, and the complement of the pending significant number is the original code. For example, the fixed-point number and effective number determination submodule may shift the effective number with the floating point number of "00101100" by "101100" to the left by the shift value of 6 bits, so as to obtain the undetermined effective number of "101100000000", and the effective number with the fixed-point number of "000101100000000".
In one possible implementation, when the sign of the floating point number is 1, the floating point number is a negative number, and the complement of the pending significant number is the complement + 1. For example, the fixed-point number valid number determination submodule may shift the valid number with the floating point number "10101100" to "101100" and shift the shift value by 6 bits to the left, to obtain the pending valid number "101100000000", the complement of the pending valid number "111010011111111" +1 ═ 111010100000000 ", and the valid number of the fixed-point number" 111010100000000 ".
And the fixed point number obtaining submodule 22 is used for obtaining the fixed point number according to the symbol of the floating point number and the effective number of the fixed point number.
In one possible implementation, the fixed-point number obtaining sub-module may determine the sign of the floating point number as the sign of the fixed-point number. The fixed point number obtaining submodule can obtain the fixed point number according to the symbol of the fixed point number and the effective number of the fixed point number. For example, the floating point number "00101100" has a fixed point number of "0000101100000000", and the floating point number "10101100" has a fixed point number of "1111010100000000".
In this embodiment, the fixed-point number-of-validity determining module includes a highest non-zero-bit number determining submodule, a displacement value determining submodule, and a fixed-point number-of-validity determining submodule. The fixed point number obtaining module comprises an effective number obtaining submodule and a fixed point number obtaining submodule. By utilizing each submodule, the data conversion device can quickly and accurately convert floating points into fixed points.
In one possible implementation, the data conversion apparatus includes:
the data acquisition module is used for acquiring the index and the effective number of the floating point number;
and the data output module is used for outputting the fixed point number.
In one possible implementation, the floating point number may be input to the data acquisition module, and the index and the significant number in the floating point number are identified by the data acquisition module. The index and the effective number of the floating point number can be respectively input into the data acquisition module. The present disclosure is not limited thereto. The data acquisition module can transmit the acquired index and the acquired effective number of the floating point number to the fixed point number and effective number determination module.
In a possible implementation manner, the data output module may output the fixed point number determined by the fixed point number obtaining module. The data output module can output the fixed point number to the system-on-chip, the system-off-chip and the like. The present disclosure is not limited thereto.
In one possible implementation, the apparatus may be further configured to convert the fixed-point number into a floating-point number, and the apparatus further includes:
a highest non-zero bit determination module 100, configured to determine a digit of a highest non-zero bit of the fixed-point number effective number.
In a possible implementation manner, the highest nonzero digit determining module may include a shifter, the number of significant digits of the floating point number may be input into the shifter, and the shift is started from left to right from the highest digit of the significant digits, and during the shift, the highest nonzero digit determining submodule may use the digit where the first "1" appears as the highest nonzero digit. For example, the number of floating points is "10101100", the significand is "101100", and the number of highest non-zero bits is 5.
An index effective number determining module 200, configured to determine the index of the floating point number and the effective number of the floating point number according to the digit of the highest nonzero digit and the effective number of the fixed point number.
In one possible implementation, the exponent significant number determination module may determine an exponent of the number of floating points based on the number of digits of the highest nonzero digit. The exponent significant number determination module may determine a significant number of the floating point number based on the highest non-zero digit and the significant number of the fixed point number.
The floating point number determining module 300 obtains the floating point number according to the symbol of the floating point number, the index of the floating point number and the effective number of the floating point number.
In one possible implementation, the floating point number determination module may determine the sign of the fixed point number as the sign of the floating point number. The floating point number determining module can obtain the floating point number corresponding to the fixed point number according to the symbol of the floating point number, the effective number of the floating point number determined by the effective number determining submodule and the index of the floating point number determined by the index determining submodule. The sign bit and exponent bits of the floating point number may be located at any non-overlapping positions among the 8 digits.
In this embodiment, a data conversion apparatus for converting fixed-point numbers into floating-point numbers, the apparatus includes: a highest nonzero digit determining module for determining the digit of the highest nonzero digit of the fixed point number effective number; the index effective number determining module is used for determining the index of the floating point number and the effective number of the floating point number according to the digit of the highest nonzero digit and the effective number of the fixed point number; and the floating point number determining module is used for obtaining the floating point number according to the symbol of the floating point number, the index of the floating point number and the effective number of the floating point number. The device comprises a highest nonzero digit determining module, an index effective number determining module and a floating point number determining module, and can quickly and accurately convert the fixed point number into the floating point number. Compared with the fixed point number, the floating point number improves the representation range of the data on the premise of ensuring the precision.
In one possible implementation, the exponent significant number determining module 200 includes:
and an exponent determining submodule 210, configured to add the digit sum of the highest nonzero digit and 1 to obtain a sum, divide the sum by 2, and obtain a remainder, where the remainder is determined as the exponent of the floating point number.
In one possible implementation, the highest nonzero digit is PX, and the index of the floating point number is (PX + 1)% 2. For example, if the highest nonzero digit PX of the fixed point number "0000000000111101" is 5, the index of the floating point number is (5+ 1)% 2 is 0.
In one possible implementation, the exponent significant number determining module 200 includes:
and the effective number determining submodule 220 is configured to determine a displacement value according to the highest nonzero digit, and displace the effective number of the fixed point number according to the displacement value to obtain the effective number of the floating point number.
In one possible implementation, the bit length of the fixed-point number is 15 bits and the bit length of the floating-point number is 6 bits. The effective number determination submodule can move the highest non-zero digit to the right according to the effective number of the fixed point number, and determine a displacement value. The displacement value may be displaced according to the significand for fixed point numbers to obtain a reasonable representation of the significand for floating point numbers.
In one possible implementation, the significant number determining sub-module 220 includes:
a shift value determination unit 2210 for determining a result of dividing a sum of 2 by a sum of the digits of the highest nonzero digit and 1 as a shift value.
In one possible implementation, the highest nonzero digit of the fixed point number is PX, and the displacement value is (PX + 1)/2. For example, if the highest nonzero digit of the fixed point number "0000000000111101" is 5, the displacement value determination unit obtains a displacement value of (5+1)/2 of 3.
A displacement unit 2220, configured to move the effective number of fixed point numbers to the right by the number of bits of the displacement value, so as to obtain the effective number of floating point numbers.
In one possible implementation, for example, if the displacement value of the fixed-point number "0000000000111101" is 3, the displacement unit moves the effective number "000000000111101" of the fixed-point number "0000000000111101" to the right by 3 bits, resulting in the effective number of the floating-point number being "000111".
For example, if the fixed point number "0000000000111101" has a sign of 0, the floating point number has an exponent of 0, and the floating point number has a significance of "000111", the floating point number of the fixed point number "0000000000111101" may be "00000111", in which the leftmost digit is a sign bit and the digits adjacent to the sign bit are exponent bits. The floating point number of the fixed point number "0000000000111101" may be "00011100", in which the rightmost digit is a sign bit and the digits adjacent to the sign bit are exponent digits.
In this embodiment, the index determining submodule and the significant number determining submodule may determine the index and the significant number of the floating point number according to the highest nonzero digit of the floating point number, and convert the floating point number into the floating point number. The transformation process is efficient and accurate.
Fig. 3 is a block diagram of a combined processing device according to an embodiment of the present disclosure, which includes the neural network operation device, the universal interconnection interface, and other processing devices described above, as shown in fig. 3.
The neural network arithmetic device interacts with other processing devices to jointly complete the operation designated by the user. Other processing devices include one or more of general purpose/special purpose processors such as Central Processing Units (CPUs), Graphics Processing Units (GPUs), neural network processors, and the like. The number of processors included in the other processing devices is not limited. The other processing devices are used as interfaces of the neural network arithmetic device and external data and control, and comprise data transportation to finish basic control of starting, stopping and the like of the neural network arithmetic device; other processing devices can cooperate with the neural network arithmetic device to complete the arithmetic task. And the universal interconnection interface is used for transmitting data and control instructions between the neural network arithmetic device and other processing devices. The neural network arithmetic device acquires required input data from other processing devices and writes the input data into a storage device on the neural network arithmetic device chip; control instructions can be obtained from other processing devices and written into a control cache on a neural network arithmetic device chip; the data in the storage module of the neural network arithmetic device can also be read and transmitted to other processing devices.
The combined processing device may further include a storage device, and the storage device is connected to the neural network operation device and the other processing device, respectively. The storage device is used for storing data in the neural network arithmetic device and the other processing devices, and is particularly suitable for data which are required to be calculated and cannot be stored in the internal storage of the neural network arithmetic device or the other processing devices.
The combined processing device can be used as an SOC (system on chip) system of equipment such as a mobile phone, a robot, an unmanned aerial vehicle and video monitoring equipment, the core area of a control part is effectively reduced, the processing speed is increased, and the overall power consumption is reduced. In this case, the generic interconnect interface of the combined processing device is connected to some component of the apparatus. Some parts are such as camera, display, mouse, keyboard, network card, wifi interface.
In a possible implementation manner, the present disclosure further provides a neural network chip, which includes the above neural network operation device or the combined processing device.
In a possible implementation manner, the present disclosure further provides a chip packaging structure, which includes the above chip.
In a possible implementation manner, the present disclosure further provides a board card, which includes the above chip package structure.
In a possible implementation manner, the present disclosure further provides an electronic device, which includes the above board card.
The electronic device comprises a data processing device, a robot, a computer, a printer, a scanner, a tablet computer, an intelligent terminal, a mobile phone, a vehicle data recorder, a navigator, a sensor, a camera, a server, a cloud server, a camera, a video camera, a projector, a watch, an earphone, a mobile storage, a wearable device, a vehicle, a household appliance, and/or a medical device.
The vehicle comprises an airplane, a ship and/or a vehicle; the household appliances comprise a television, an air conditioner, a microwave oven, a refrigerator, an electric cooker, a humidifier, a washing machine, an electric lamp, a gas stove and a range hood; the medical equipment comprises a nuclear magnetic resonance apparatus, a B-ultrasonic apparatus and/or an electrocardiograph.
It is noted that while for simplicity of explanation, the foregoing method embodiments have been described as a series of acts or combination of acts, it will be appreciated by those skilled in the art that the present disclosure is not limited by the order of acts, as some steps may, in accordance with the present disclosure, occur in other orders and concurrently. Further, those skilled in the art should also appreciate that the embodiments described in the specification are exemplary embodiments and that acts and modules referred to are not necessarily required by the disclosure.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the several embodiments provided in the present disclosure, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one type of division of logical functions, and there may be other divisions when actually implementing, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present disclosure may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit may be implemented in the form of hardware, or may be implemented in the form of a software program module.
The integrated units, if implemented in the form of software program modules and sold or used as stand-alone products, may be stored in a computer readable memory. Based on such understanding, the technical solution of the present disclosure may be embodied in the form of a software product, which is stored in a memory and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present disclosure. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable memory, which may include: flash Memory disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.
The embodiments of the present disclosure are described in detail above, and the principles and embodiments of the present disclosure are explained herein by applying specific embodiments, and the descriptions of the embodiments are only used to help understanding the method and the core ideas of the present disclosure; meanwhile, for a person skilled in the art, based on the idea of the present disclosure, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present disclosure should not be construed as a limitation to the present disclosure.
Various aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
Having described embodiments of the present disclosure, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (9)
1. A data conversion apparatus for converting a floating point number into a fixed point number, the floating point number including a sign bit, an exponent bit, and a multi-bit significand bit, the sign bit and the exponent bit of the floating point number being located at arbitrary non-coincident positions in the floating point number, the apparatus comprising:
the fixed point number effective number determining module is used for determining the undetermined effective number according to the index and the effective number of the floating point number output by the operation task in the operation of the neural network performed by the operation device, and the data format of the data participating in the operation task is the type of the floating point number;
the fixed point number acquisition module is used for determining the fixed point number according to the symbol of the floating point number and the undetermined effective number, wherein the fixed point number is an output result of the operation task;
wherein, the fixed point number and effective number determining module comprises:
a highest nonzero digit determining submodule for determining the digit of the highest nonzero digit of the floating point number effective number;
the displacement value determining submodule is used for determining a displacement value according to the index of the floating point number and the digit of the highest nonzero digit of the effective number of the floating point number;
the fixed point number effective number determining submodule is used for moving the effective number of the floating point number according to the displacement value to obtain an undetermined effective number;
the fixed point number obtaining module comprises:
the effective number obtaining submodule is used for obtaining the effective number of the fixed point number according to the symbol of the floating point number and the complement of the undetermined effective number;
and the fixed point number obtaining submodule is used for obtaining the fixed point number according to the effective number of the fixed point number of the symbol of the floating point number.
2. The apparatus of claim 1, wherein the shift value determination submodule is configured to determine a shift value as a sum of an exponent of the floating point number, a digit of a highest non-zero bit of the floating point number of the significands, and 1.
3. The apparatus of claim 1, wherein the fixed-point number-of-validity determination submodule is configured to shift the floating-point number of validity to the left by the number of bits of the displacement value to obtain a pending validity.
4. The apparatus of claim 1, wherein the fixed-point numbers are in 16-bit binary form and the floating-point numbers are in 8-bit binary form.
5. The apparatus of claim 1, wherein the sign bit is 1 bit and the exponent bit is 1 bit.
6. A neural network operation device, comprising one or more data conversion devices according to any one of claims 1 to 5, wherein the neural network operation device is configured to perform a set neural network operation.
7. A combined processing device, characterized in that it comprises one or more of the neural network computing device of claim 6, a universal interconnect interface and other processing devices;
and the neural network operation device interacts with the other processing devices to jointly complete the calculation operation specified by the user.
8. A neural network chip, comprising:
the data conversion apparatus according to any one of claims 1 to 5; or
The neural network operation device of claim 6; or
A combined processing device as defined in claim 7.
9. An electronic device, characterized in that the electronic device comprises:
the data conversion apparatus according to any one of claims 1 to 5; or
The neural network operation device of claim 6; or
A combined processing device as claimed in claim 7; or
The neural network chip of claim 8.
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| CN201811459240.2A CN109583581B (en) | 2018-11-30 | 2018-11-30 | Data conversion device and related product |
| PCT/CN2019/120879 WO2020108470A1 (en) | 2018-11-30 | 2019-11-26 | Operation method and apparatus, and relevent product |
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