CN109582491A - Reading error in data processing based on machine learning - Google Patents
Reading error in data processing based on machine learning Download PDFInfo
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- CN109582491A CN109582491A CN201710957814.8A CN201710957814A CN109582491A CN 109582491 A CN109582491 A CN 109582491A CN 201710957814 A CN201710957814 A CN 201710957814A CN 109582491 A CN109582491 A CN 109582491A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F18/00—Pattern recognition
- G06F18/20—Analysing
- G06F18/21—Design or setup of recognition systems or techniques; Extraction of features in feature space; Blind source separation
- G06F18/214—Generating training patterns; Bootstrap methods, e.g. bagging or boosting
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F18/00—Pattern recognition
- G06F18/20—Analysing
- G06F18/24—Classification techniques
Abstract
The application provides the reading error in data processing based on machine learning.The data reconstruction method of offer includes: the read access command that receiving host issues;Read command is issued to nonvolatile memory according to read access command;Receive the reading data that nonvolatile memory provides;Error correction is carried out to data are read;If the reading data after correction are sent to host by error correction success;And the read command parameter training neural network of the scene applied using read command and read command instruction.
Description
Technical field
This application involves field of storage, and in particular, to the error handle for reading data from NVM chip.
Background technique
Flash memory stores information by keeping the quantity of electric charge in the memory unit.The quantity of electric charge in storage unit determines storage
The read-out voltage of unit.When reading flash data, compare read-out voltage and the threshold voltage of storage unit to identify that storage is single
The information that member is stored.Phase transition storage, resistance-variable storing device, magnetic rotation memory, DRAM are each with depositing based on different principle
Storage unit stores information.
Storage medium is generally not completely reliable.Due to storage unit the quantity of electric charge by the quality of storage unit, the service life,
The influence of many factors such as time, and from multiple storage units to the heterogencity of the signal transmission path of sense amplifier,
Cause the data read from storage unit with the data of write-in there are deviation, can not correctly embody original being written to storage unit
Information.
Prevent or cope with to lead because of the variation of the factors such as the quantity of electric charge of storage unit using some means in the prior art
Data the problem of can not correctly embodying the data of write-in for causing to read, for example, in United States Patent (USP) US9070454B1, according to depositing
The factors such as the erasable number of storage unit, retention time calculate threshold voltage and (read data from storage unit or to storage unit
The threshold voltage or judgement voltage used when middle write-in data), and number is written to storage unit using calculated threshold voltage
According to.Threshold voltage may include writing threshold value for the reading threshold value of read operation and for write operation.
In flash chip, by indicating different parameters for read operation, come threshold value electricity used when selecting read operation
Pressure.By the read operation with different threshold voltages, the data read from storage unit have different results.Some results tool
Have lower bit error rate (percentage of the total bit number of Bit Error Ratio, error bit and transmission), and some are tied
Fruit bit error rate with higher.ECC (Error Correction Code, the error-correcting code) technology of combined use, has
The probability that the reading result of lower bit error rate is corrected by ECC technology is higher, thus by attempting different parameters, to cope with
The mistake encountered in read operation.Parameter may be incorporated in and be supplied to flash chip in read operation, or is arranged in flash chip
For the parameter of read operation, and when flash chip handles read operation, set parameter is used.
The error correcting capability of ECC technology is limited, for example, most multipotency is in 1K byte data (referred to as ECC data frame)
Correct 40 bit-errors.When the error bit quantity of the data of storage has exceeded the error correcting capability of ECC component, need to attempt to have
The read operation of other parameters, to the reading data to be obtained with less number of error bits, to meet the error correction energy of ECC component
Force request.
Data are usually stored and read on storage medium by page, and data are erased in blocks.In general, block includes multiple
Page, the page (referred to as Physical Page) on storage medium has fixed size, such as 17664 bytes, and certainly, Physical Page can also have
There are other sizes.When reading or data being written, identical threshold voltage is arranged in generally each page of all storage units.
Summary of the invention
Read operation has many kinds of parameters, has indicated respectively different reading threshold voltages.In the error handle to read operation,
It needs to improve the efficiency of selection read operation parameter, to accelerate data read process, and reduces time from NVM chip duplicate reading evidence
Number, to promote the effective bandwidth for reading data.
The application's is designed to provide data reconstruction method and solid storage device, to improve the data of read command reading
Accuracy.
According to a first aspect of the present application, the first data reconstruction method according to the application first aspect is provided, wherein
It include: the read access command that receiving host issues;Read command is issued to nonvolatile memory according to read access command;It receives non-
The reading data that volatile memory provides;Error correction is carried out to data are read;If error correction success, after correction
It reads data and is sent to host;And the read command parameter training nerve of the scene applied using read command and read command instruction
Network.
The first data reconstruction method according to a first aspect of the present application, provides second according to the application first aspect
Data reconstruction method, wherein input of the scene that read command is applied as neural network, the read command parameter of read command instruction
Output as neural network.
First or second data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
Third data reconstruction method, wherein the scene classification that neural network applies read command.
Third data reconstruction method according to a first aspect of the present application, provides the 4th according to the application first aspect
Data reconstruction method, wherein the read command of the classification of scene and the data that the error correction that can be succeeded can be read under the scene
Parameter is corresponding.
Third data reconstruction method according to a first aspect of the present application, provides the 5th according to the application first aspect
Data reconstruction method, wherein the classification of scene is greater than first with the probability that can read the error correction that can be succeeded under the scene
The read command parameter of the data of value is corresponding.
Third data reconstruction method according to a first aspect of the present application, provides the 6th according to the application first aspect
Data reconstruction method, wherein the classification of scene with can under the scene readout error bit number lower than second value data reading
Command parameter is corresponding.
Third data reconstruction method according to a first aspect of the present application, provides the 7th according to the application first aspect
Data reconstruction method, wherein the classification of scene is corresponding with read command argument sequence.
The 7th data reconstruction method according to a first aspect of the present application, provides the 8th according to the application first aspect
Data reconstruction method, wherein read using the read command sequence generated according to read command argument sequence from nonvolatile memory
Data combination, can by success error correction or by success error correction probability be greater than third value.
The 7th data reconstruction method according to a first aspect of the present application, provides the 9th according to the application first aspect
Data reconstruction method, wherein read using the read command sequence generated according to read command argument sequence from nonvolatile memory
Data combination, by soft decoding can by success error correction or by success error correction probability be greater than the 4th value.
The first to the 9th data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
The tenth data reconstruction method, wherein the attribute for the scene that read command is applied include read command access logical unit number, object
Reason block, Physical Page type, the data on physical block are wiped free of number, physics from the time interval that is written into so far, physical block
Block is read number and/or whether physical block is completely written.
The tenth data reconstruction method according to a first aspect of the present application, provides the tenth according to the application first aspect
One data reconstruction method, wherein data on physical block from the time interval being written into so far include or do not include solid-state storage
Equipment is in the time of power-down state.
The tenth data reconstruction method according to a first aspect of the present application, provides the tenth according to the application first aspect
Two data reconstruction methods, wherein the attribute of scene includes the error rate of physical block.
The first data reconstruction method according to a first aspect of the present application, provides the tenth according to the application first aspect
Three data reconstruction methods, wherein the attribute of scene includes the Physical Page of read command access and the number that last time reads Physical Page
According to the corresponding read command parameter of error correction success.
The first to the 13rd data reconstruction method according to a first aspect of the present application, provides according to the application first party
14th data reconstruction method in face, wherein fail in response to error correction, generate to read again and reacquisition is ordered to read data.
The 14th data reconstruction method according to a first aspect of the present application provides according to the application first aspect
15 data reconstruction methods, wherein in response to the error correction success of the reading data of counterweight newer command, utilize stressed order pair
The read command parameter answered trains neural network with the scene that order is applied is read again.
The 15th data reconstruction method according to a first aspect of the present application provides according to the application first aspect
16 data reconstruction methods, wherein in response to failing to the error correction for reading data, joined using the corresponding read command of read command
Scenes that several and read command is applied train neural network.
The first to 16 data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
The 17th data reconstruction method, wherein in response to the order of host, the parameter of neural network, the parameter of neural network are set
It is stored in nonvolatile memory or is provided by host.
The first to the 17th data reconstruction method according to a first aspect of the present application, provides according to the application first party
18th data reconstruction method in face, wherein in response to the order of host, obtain the parameter of neural network, and by neural network
Parameter be supplied to host or by the storage of the parameter of neural network in the nonvolatile memory.
The first to 18 data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
The 19th data reconstruction method, wherein the training result of neural network is recorded in memory, dynamic random access memory
Or in nonvolatile memory.
The first to 19 data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
The 20th data reconstruction method, wherein multiple neural networks are trained, each neural network is served solid-state storage and set
Standby one or more logical unit number or one or more physical blocks.
The 20th data reconstruction method according to a first aspect of the present application provides according to the application first aspect
21 data reconstruction methods, wherein the logical unit number or physical block indicated in the scene applied according to read command, it will be with
The scene that the corresponding read command parameter of read command and read command are applied is supplied to corresponding neural network.
The 14th or 15 data reconstruction methods according to a first aspect of the present application, provide according to the application first party
22nd data reconstruction method in face, wherein fail in response to error correction, neural network based on the received answered by read command
Scene infers read command parameter corresponding with scene, and generates and read order again, and stressed order is sent to non-volatile deposit
Reservoir.
The 22nd data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
23rd data reconstruction method, wherein receive the reading data of nonvolatile memory counterweight read command;Counterweight read command
It reads data and carries out error correction;If error correction fails, stressed order is repeatedly generated, until error correction success;If wrong
Mistake corrects successfully, then the reading data by the stressed order after correction are sent to host.
The first to 23 data reconstruction method according to a first aspect of the present application, provides according to the application first party
24th data reconstruction method in face, wherein fail in response to error correction, the scene applied according to corresponding read command
It generates and reads order again, and be sent to Media Interface Connector controller.
The 24th data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
25th data reconstruction method, wherein fail in response to error correction, the scene and reading applied according to corresponding read command
Command parameter, which generates, reads order again, and is sent to Media Interface Connector controller.
The first to 25 data reconstruction method according to a first aspect of the present application, provides according to the application first party
26th data reconstruction method in face, wherein in response to failing for the first time to the error correction for reading data, using neural network
First generated reads order again;And the subsequent failure in response to error correction, it generates second and reads order again, second reads order again
The read command parameter of order is read in middle instruction second again, and is sent second to nonvolatile memory and read order again.
The 26th data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
27th data reconstruction method, wherein read order again to generate second, statistics reads the bit number in data with the first value
Amount and/or the amount of bits with second value determine the second read command parameter for reading order again.
The 27th data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
28th data reconstruction method, wherein second reads the corresponding adjustment for reading threshold voltage of same read command parameter of order again
Direction and adjustment amplitude are true according to the amount of bits with the first value and/or the amount of bits with second value in data is read
It is fixed.
The 28th data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
29th data reconstruction method, wherein if with the bit number of the first value from the data that the Physical Page of the first kind is read
Amount is greater than the first amount threshold, then reads again used in order to the direction adjustment second for reducing the amount of bits with the first value
The read command parameter for reading threshold voltage corresponding to first, wherein the Physical Page of the first kind corresponding first reads threshold voltage.
The first to 25 data reconstruction method according to a first aspect of the present application, provides according to the application first party
30th data reconstruction method in face, wherein raw using stressed component in response to failing for the first time to the error correction for reading data
At third read again order, third read again order instruction third read again order read command parameter;And in response to error correction
Subsequent failure generates quadruple read command using neural network.
The 30th data reconstruction method according to a first aspect of the present application provides according to the application first aspect
31 data reconstruction methods, wherein read order again to generate third, statistics reads the amount of bits in data with the first value
And/or the amount of bits with second value, determine that third reads the read command parameter of order again.
The 31st data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
32nd data reconstruction method, wherein third reads the corresponding adjustment side for reading threshold voltage of read command parameter of order again
It is determined to adjustment amplitude according to the amount of bits with the first value in reading data and/or the amount of bits with second value.
The 32nd data reconstruction method according to a first aspect of the present application, provides according to the application first aspect
33rd data reconstruction method, wherein if with the bit number of the first value from the data that the Physical Page of the first kind is read
Amount is greater than the first amount threshold, then reads again used in order to the direction adjustment third for reducing the amount of bits with the first value
The read command parameter for reading threshold voltage corresponding to first, wherein the Physical Page of the first kind corresponding first reads threshold voltage.
The first to 33 data reconstruction method according to a first aspect of the present application, provides according to the application first party
34th data reconstruction method in face, wherein the neural network scene that read command is applied based on the received is inferred with current
The most matched scene type of scene, and according to most matched scene type selection read command parameter and/or read command sequence.
The first to 33 data reconstruction method according to a first aspect of the present application, provides according to the application first party
35th data reconstruction method in face, wherein the scene that neural network is applied according to read command is obtained with current scene most
Matched scene type, and generated according to scene type and read order or stressed command sequence again, with stressed order or read order again
Sequence is sent to nonvolatile memory.
The first to 33 data reconstruction method according to a first aspect of the present application, provides according to the application first party
36th data reconstruction method in face, wherein the scene that neural network is applied according to read command is obtained with current scene most
Matched scene type, and the reading for the scene and the corresponding current read command that fails with error correction applied according to read command
Command parameter, which generates, reads order or stressed command sequence again.
The first to 36 data reconstruction method according to a first aspect of the present application, provides according to the application first party
37th data reconstruction method in face, wherein multiple neural networks are trained, each neural network is served solid-state and deposited
Store up the one or more logical unit number and/or one or more physical block of equipment;Fail in response to error correction, according to reading life
Enable the logical unit number indicated in the scene applied and/or physical block, the scene that current read command is applied is supplied to pair
The neural network answered, to be inferred to the read command parameter and/or read command sequence of the scene for being suitble to current read command to be applied.
According to a second aspect of the present application, the first solid storage device according to the application second aspect is provided, including
Control unit and nonvolatile memory chip, control unit is for executing above-mentioned data reconstruction method.
According to the third aspect of the application, the first control units part according to the application third aspect, including order are provided
It issues queue, Media Interface Connector controller, error correction component, artificial intelligence component and order and completes queue;Order issues queue
It is coupled with Media Interface Connector controller, order issues the read access command of queue receiving host, and read access command is transmitted to Jie
Matter interface controller;Media Interface Connector controller issues read command to nonvolatile memory, and receives nonvolatile memory
Read data;Error correction component is coupled with Media Interface Connector controller, and error correction component carries out error correction to data are read;
Order is completed queue and is coupled with error correction component, and in response to error correction success, order completes queue and receives error correction portion
Data Concurrent after the error correction that part is sent gives host;Artificial intelligence component couples with error correction component, artificial intelligence
The scene and the corresponding read command parameter training neural network of read command that component utilizes read command to be applied.
According to the first control units part of the third aspect of the application, provide according to the second of the application third aspect the control
Component, wherein artificial intelligence component couples with Media Interface Connector controller;Fail in response to error correction, artificial intelligence component is raw
Media Interface Connector controller is sent at stressed order, and by stressed order.
What the application realized has the beneficial effect that:
(1) scene and read command parameter that the embodiment of the present application is applied by artificial intelligence component using read command are to mind
It is trained through network, to provide more matched read command parameter by training result read command of attaching most importance to, to improve read command reading
The accuracy of data out.
(2) the embodiment of the present application is generated by the cooperation of artificial intelligence component and stressed component and reads order again, improves number
According to processing speed.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The some embodiments recorded in application can also be obtained according to these attached drawings other attached for those skilled in the art
Figure.
Fig. 1 is the schematic diagram according to the solid storage device of the embodiment of the present application one;
Fig. 2 is the schematic diagram according to the solid storage device of the embodiment of the present application two;
Fig. 3 is the structure of the nand flash memory of the prior art;
Fig. 4 is the read-out voltage scatter chart of the storage unit in an example.
Fig. 5 is the read-out voltage scatter chart of the storage unit in another example.
Fig. 6 is the read-out voltage scatter chart of the storage unit in another example.
Fig. 7 is the schematic diagram according to the solid storage device of the embodiment of the present application three.
Fig. 8 is the read-out voltage scatter chart of the storage unit of another example.
Fig. 9 is the corresponding relationship of the bit of the state and storage of storage unit in Fig. 8.
Figure 10 is the corresponding relationship of three bits and Physical Page of the storage unit storage in an example.
Figure 11 is the corresponding relationship of the threshold value of embodiment shown in Fig. 8 and the state of storage unit.
Figure 12 is the adjustment mode for reading threshold voltage corresponding with Physical Page type in embodiment shown in Fig. 8-10.
Figure 13 is again the read-out voltage scatter chart of the storage unit of another example.
Figure 14 is the corresponding relationship of the bit of the state and storage of storage unit in Figure 13.
Figure 15 is the corresponding relationship of three bits and Physical Page of the storage unit storage in another example.
Figure 16 is the corresponding relationship of the threshold value of embodiment shown in Figure 13 and the state of storage unit.
Figure 17 is the adjustment mode for reading threshold voltage corresponding with Physical Page type in embodiment shown in Figure 13-15.
Figure 18 is the schematic diagram according to the solid storage device of the embodiment of the present application four.
Figure 19 is the schematic diagram that read command is handled according to the solid storage device of the embodiment of Figure 18.
Specific embodiment
Below with reference to the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Ground description, it is clear that described embodiment is some embodiments of the present application, instead of all the embodiments.Based on the application
In embodiment, those skilled in the art's every other embodiment obtained without making creative work, all
Belong to the range of the application protection.
Embodiment one
Fig. 1 is the schematic diagram according to the solid storage device of the embodiment of the present application one.Solid storage device includes control unit
Part and one or more pieces NVM (nonvolatile memory) chips for being coupled to controller part.NVM chip is that such as NAND dodges
It deposits, phase transition storage, resistance-variable storing device, magnetic rotation memory.Control unit is additionally coupled to host, to respond the access of host sending
The order of solid storage device.Control unit includes that order issues queue, queue, ECC component and Media Interface Connector are completed in order
Controller.
Media Interface Connector controller is coupled to NVM chip, and to NVM chip in a manner of the interface protocol to follow NVM chip
Order is issued, to operate NVM chip, and receives the command execution results exported from NVM chip.Known NVM chip interface association
View includes " Toggle ", " ONFI " etc..
As shown in Figure 1, host issues the order (1) of access solid storage device to solid storage device.Order issues team
Arrange the order of the access solid storage device for receiving and caching host sending.The order that host issues, which is passed through, to be handled, and by
It is transmitted to Media Interface Connector controller (2).Media Interface Connector controller issues order (3) to NVM chip according to the order that host issues.
Media Interface Connector controller also obtains command processing result (4) from NVM chip.By taking read command as an example, from the data of NVM chip reading
It is provided to ECC component and carries out error correction (5).The order that processing is completed is added to order and completes queue (6).Pass through access
Queue is completed in order, and host obtains command processing result (7).
It is to be appreciated that carry out error correction to data are read using ECC component, when data are written to NVM chip,
Error correction coding (not shown in figure 1) also is carried out to data to be written with ECC component.
The error correction that ECC component carries out the data read from NVM chip may succeed, it is also possible to failure.At one
In embodiment, even if ECC component fails to the error correction for reading data, it is complete that queue addition command process also is completed to order
At instruction.If completing the command process in queue from order completes the error correction failure for identifying data in instruction, respond
Fail in error correction, host, which generates to read again to order, (reads the order instruction reading life different from the read command of error correction failure again
Enable parameter), the order for being sent to solid storage device issues queue.And step 1-7 is also repeated, to again attempt to read number
According to.
Under normal circumstances, host can attempt a variety of or all stressed orders of NVM chip offer.If attempted all
It reads order again, could not still obtain error correction successfully as a result, then needing to obtain data (example by other error handle means
Such as, pass through RAID technique).And obtain the successful correct data of error correction when reading order again by some, then it terminates to it
He reads the trial of order again.
Optionally, some NVM chips provide various forms of stressed orders.For example, passing through setting feature (Set
Feature the combination with read command) is ordered to realize the function of reading order again.Read command is arranged using setting characteristic commands to join
Number, and in read command, use set read command parameter.
Still optionally, the instruction read command parameter identical with the read command of error correction failure in reading order again.
Obviously, the stressed process controlled by host, due to carry out multiple data between host and solid storage device
With the interaction of order, the delay of command process has been significantly greatly increased.
Embodiment two
Fig. 2 is the schematic diagram according to the solid storage device of the embodiment of the present application two.In this embodiment, solid-state storage is set
Standby control unit includes that order issues queue, queue, Media Interface Connector controller, ECC component and stressed component are completed in order.
Stressed component is coupled to ECC component and Media Interface Connector controller.Fail in response to the instruction error correction of ECC component,
It reads component again and reads order again to the generation of Media Interface Connector controller, and indicate the read command with error correction failure in reading order again
Different read command parameters.Under the control for reading component again, a variety of or all stressed orders that NVM chip provides are attempted.
By taking solid storage device read command process flow as an example, as shown in Fig. 2, host is under the order of solid storage device
It sends out queue and issues read access command (1).The read access command that host issues is forwarded to Media Interface Connector controller after treatment
(2).Media Interface Connector controller issues read command (3) to NVM chip according to the read access command that host issues.Media Interface Connector control
Device also obtains command processing result, i.e. the reading data (4) of read command from NVM chip.The data read from NVM chip are provided
Error correction (5) are carried out to ECC component.If ECC component fails to the error correction for reading data, read command or read command are visited
Ask that the information such as the read command parameter that address, the data length of reading, read command use are forwarded to stressed component (6).The portion of reading again
Part, which generates, reads order (optionally, reading command selection read command parameter again) again, and stressed order is sent to Media Interface Connector control
Device (7).Media Interface Connector controller issues to NVM chip according to stressed order and reads order (8) again.Media Interface Connector controller also from
NVM chip obtains the processing result (9) for reading order again.It reads the data that order is read again and is provided to ECC component (10).If ECC
The error correction of the reading data of component counterweight read command fails, then is initiated again by reading component again from step (6) to step
(10) process.If error correction success of the ECC component to data are read, the order for handling completion (and optionally, read number
According to) it is added to order completion queue (11).Queue is completed by visit order, host obtains command processing result (12).
It is one or many by reading component controls sending again in the case where ECC component error correction failure in the present embodiment
The process of reading again, reduces the interaction of solid storage device and host, reduces read command processing delay.
Embodiment three
Fig. 3 illustrates the structure of the nand flash memory of the prior art.Flash block includes a plurality of wordline and bit line.Wordline couples
Multiple transistors for being used to store information, each transistor provide a storage unit (Cn, Cn-1 ..., C1, C0), Mei Gecun
Storage unit can store 1 bit or multi-bit data.Multiple storage units in every wordline provide one or more Physical Page, structure
At the bit storage of a Physical Page in the transistor for being coupled to same wordline.
Fig. 4 is the read-out voltage scatter chart of storage unit.After storage unit is programmed, according to programmed value,
Charge is stored in storage unit.When reading storage unit, different readings can be obtained from the storage unit for storing different charges
Voltage.Referring to Fig. 4, bell line L (0) is the read-out voltage distribution for the storage unit for storing " 1 " value, and bell line L (1) is storage
The read-out voltage distribution of the storage unit of " 0 " value.When using threshold voltage vt 1 is read, 1 left side of threshold voltage vt is being read
The storage unit with " 1 " value be correctly read, while in the storage list with " 0 " value for reading the right side of threshold voltage vt 1
Member is also correctly read.
Fig. 5 is the read-out voltage scatter chart of the storage unit in another example.Due to time, programming number, temperature
Etc. reasons, storage unit read-out voltage distribution is changed.Bell line L (0) is the reading for storing the storage unit of " 1 " value
Voltage's distribiuting out, bell line L (1) are the read-out voltage distributions for the storage unit for storing " 0 " value.Threshold voltage is read when using
When Vt1, " 1 " value is read as by mistake in the storage unit with " 0 " value for reading 1 left side of threshold voltage vt, and is reading threshold
The storage unit with " 0 " value on the right side of threshold voltage Vt1 is correctly read.And if use reads threshold voltage vt 2, is reading threshold
The storage unit with " 1 " value on the left of threshold voltage Vt2 is correctly read, while reading having for 2 right side of threshold voltage vt
The storage unit of " 0 " value is also correctly read.Thus, during stressed, if by the instruction of read command parameter using reading threshold
Threshold voltage Vt2 then has higher probability to read correct data, or read have lower error rate can by the success of ECC component into
The data of row error correction.
Fig. 7 is the schematic diagram according to the solid storage device of the embodiment of the present application three.In this embodiment, solid-state storage is set
Standby control unit issues queue including order, queue is completed in order, Media Interface Connector controller, ECC component, reads component again, adds
Disturb component (not shown) and descrambling part.Stressed component is coupled to ECC component and Media Interface Connector controller.Descrambling part
It couples ECC component and queue is completed in order.The data carried out after error correction to ECC component descramble, and will descramble result
It is supplied to order and completes queue.
In response to the instruction error correction failure of ECC component, component is read again to Media Interface Connector controller and generates stressed order, and
Different read command parameters is indicated in reading order again.Under the control for reading component again, a variety of or institute that NVM chip provides is attempted
There is stressed order.
According in the embodiment of Fig. 7, repeatedly fails to the error correction for reading data in response to ECC component, read component again
The process from step (6) to step (10) is correspondingly repeatedly initiated, and in the stressed order of generation, updates the parameter of read command
(such as corresponding to the read command parameter for reading threshold voltage).If error correction success of the ECC component to data are read, by descrambling
Component is to the data de-scrambling (11) through error correction, and order (and optionally, the data after descrambling) quilt that processing is completed
It is added to order and completes queue (11).Queue is completed by visit order, host obtains command processing result (12).
In the embodiment, before data are written into NVM chip, data are scrambled by scrambling component (not shown).And
From NVM chip reading data and after error correction, descrambling part is descrambled data by the opposite mode of scrambling processes.
Scrambling processes are randomized to data.For example, by specified randomization seed with the data to be written by finger
Fixed algorithm carries out operation (for example, generating m-sequence with randomization seed, and doing exclusive or with data are written), obtains scrambled
Data.Scrambled, the data for being written into NVM chip have specified statistical property, for example, in the same object of NVM chip
It manages in the data read in page, wordline or ECC data frame, the bit with " 0 " value and the amount of bits substantially phase with " 1 " value
Together, for example, being 50%.As an example, Physical Page stores 16K byte data, is written in the data of Physical Page, has after being scrambled
About 8K*8 bit has " 0 " value, and has about 8K*8 bit to have " 1 " value.
Descrambling procedure is the inverse process of aforementioned randomisation process, with the data before being scrambled.
Optionally, the data of NVM chip to be written are first scrambled as an embodiment, then carries out error correction volume
Code.Accordingly for the data read from NVM chip, error correcting/decoding is first carried out, then descrambled.
Optionally, as another embodiment, to the data of NVM chip to be written, after being encoded by error correction, then into
Row scrambling.Accordingly for the data read from NVM chip, first descrambled, then carries out error correcting/decoding.
Still optionally, scrambling and descrambling procedure, are implemented by Media Interface Connector controller.
In the present embodiment, data are read with the standard parameter (for example, the Vt1 in Fig. 5 is to read threshold voltage) of read command,
In response to ECC component instruction to read data error correction fail, read again component to before ECC component error correction data or
Person counts through the data of error correction, identifies the amount of bits wherein with " 0 " value and the amount of bits with " 1 " value.
In the example of fig. 7, after having been written to scrambled data in the memory unit, with the standard parameter of read command
(for example, the Vt1 in Fig. 5 is to read threshold voltage) reads data.It reads in data, if amount of bits and tool with " 0 " value
There is the ratio of the amount of bits of " 1 " value significantly lower than 1, to can determine that the read-out voltage distribution in storage unit has occurred such as figure
Offset shown in 5 (the read-out voltage distribution of storage unit is whole to be moved to the left).Correspondingly, threshold value electricity is read by being moved to the left
Pressure (is revised as Vt2 from Vt1 for example, threshold voltage will be read), there will be an opportunity to so that reading in data, the bit with " 0 " value
Ratio with the amount of bits with " 1 " value is close to 1.
Similarly, data are read with the standard parameter of read command (for example, the Vt1 in Fig. 5 is to read threshold voltage).It reads
In data, if the ratio of the amount of bits with " 0 " value and the amount of bits with " 1 " value is significantly greater than 1, storage can determine
" moving to right " (the read-out voltage distribution of storage unit is whole to move right) has occurred in read-out voltage distribution in unit.Correspondingly,
Threshold voltage (being revised as being greater than the value of Vt1 from Vt1 for example, threshold voltage will be read) is read by moving right, there will be an opportunity to
So that read in data, the ratio of bit with " 0 " value and the amount of bits with " 1 " value is close to 1.
To read component again according to the bit number to " 0 " value and/or " 1 " in reading data according to the embodiment of Fig. 7
Statistical result is measured, identifies the offset direction of the read-out voltage distribution of respective memory unit, and then determines to update and reads threshold voltage
Direction, and generate and read order again, and the read command parameter for reading order again is made to indicate updated reading threshold voltage, to expect
The corresponding ratio for reading amount of bits with " 0 " value and the amount of bits with " 1 " value in data of order is read again close to 1,
So that ECC component has the successful probability of higher error correction.
It is to be appreciated that can be by Fig. 5, the state of the corresponding read-out voltage distribution of bell line L (0) is defined as storing number
It is worth " 0 ", and is defined as the state of the corresponding read-out voltage distribution of bell line L (1) to store numerical value " 1 ", as shown in Figure 6.From
And error correction failure is identified in response to ECC component, reading component identification again reads in data, has the bit of " 0 " value and has
The ratio of the amount of bits of " 1 " value significantly lower than 1 (for example, being lower than 0.96), and in the stressed order of generation, instruction relative to
Reading threshold voltage corresponding to the preceding read command for causing error correction failure, moves right and reads threshold voltage.If weight
Read component identification is read in data, and the ratio of the amount of bits with " 0 " value and the amount of bits with " 1 " value is significantly greater than 1
(for example, being higher than 1.04), and in the stressed order of generation, it indicates relative to the preceding read command for causing error correction failure
Corresponding reading threshold voltage, is moved to the left reading threshold voltage.
Further, if the error correction of the reading data of counterweight read command fails again, stressed component can be again depending on
The ratio for reading amount of bits and the amount of bits with " 1 " value in data with " 0 " value, which generates, reads order again, and is reading again
The reading threshold voltage updated is indicated in order.
In alternative embodiments, component is read again according to the amount of bits read in data with " 0 " value and there is " 1 "
The ratio of the amount of bits of value not only determines that the reading threshold voltage for reading the corresponding update of order again is ordered relative to preceding reading
The change direction (increasing or reducing) of the reading threshold voltage of order also determines the reading threshold voltage updated relative to preceding reading
The change amplitude of the reading threshold voltage of order.For example, reading the amount of bits in data with " 0 " value and there is " 1 " value
The ratio of amount of bits is remoter away from 1, and the reading threshold voltage of update changes relative to the reading threshold voltage of preceding read command
Time-varying amplitude is bigger.Optionally, by searching for table or the function obtained by fitting, the bit read in data with " 0 " value is established
Reading threshold of the ratio of quantity and the amount of bits with " 1 " value with the reading threshold voltage updated relative to preceding read command
The mapping relations of the change amplitude (and direction) of threshold voltage.Mapping relations can pass through the spy to memory device in the lab
Property experiment obtain.
Still optionally, it reads component again and changes reading threshold voltage as unit of one step, and have to read in data
There is the amount of bits of " 0 " value and there is the ratio of the amount of bits of " 1 " value to determine that the adjustment direction for reading threshold voltage (increases
Or reduce).
Optionally, in the case where reading situation known to data volume (for example, physical page size, ECC data frame sign), portion is read again
Part statistics is read in data, the amount of bits with " 0 " value and/or the amount of bits with " 1 " value, true according to respective quantity
Surely the adjustment direction and/or adjustment amplitude of threshold voltage are read.
Optionally, fail in response to the error correction of the reading data of preceding read command, read component again and generate stressed life
It enables, reads command access address identical with preceding read command again.Still optionally, due to the NVM chip of solid storage device
It is generally in similar working environment (temperature, erasing times etc.), component is read again and joins read command used in stressed order
The read command for other addresses that number (such as reading threshold voltage) is applied to access NVM chip is advantageous.Optionally, component is read again
Indicate that Media Interface Connector controller updates the read command parameter of default, so that the general read command that Media Interface Connector controller issues, all
Use the default read command parameter of stressed component.Further, after reading the stressed order of component generation again, the mistake of ECC component is tracked
Accidentally correction as a result, and record and make the successful read command parameter of error correction, instruction Media Interface Connector controller is joined using the read command
Number is used for general read command.
In alternative embodiments, the order in response to host to solid storage device write-in data, NVM core to be written
The data of piece, are first scrambled, then are encoded by error correction.And the data read from NVM chip, it is scrambled data.
It reads component identification (before error correcting/decoding) again and reads the amount of bits in data with " 0 " value and the bit number with " 1 " value
The ratio of amount generates and reads order again, and indicates the reading threshold voltage updated in stressed order.Optionally, for " 0 " value
Amount of bits and the ratio of the amount of bits with " 1 " value threshold value is provided, such as 1% or 2%.If the ratio is greater than threshold value,
It is larger to the probability for reading data error correcting failure to deduce ECC component, then reads component again and generates stressed order, and will
It reads data and is sent to ECC component, to save error recovery procedure;If ratio is not more than threshold value, stressed component does not generate stressed
Order, and data will be read and be sent to the progress error correction of ECC component, and only after error correction failure, then to wrong school
The ratio of amount of bits and the amount of bits with " 1 " value in reading data statistics data after or before just with " 0 " value
Example, and generate and read order again.Optionally, it in the case where reading situation known to data volume, reads component statistics again and reads in data, have
The amount of bits of " 0 " value and/or the amount of bits with " 1 " value, the adjustment for reading threshold voltage is determined according to respective quantity
Direction and/or adjustment amplitude.
Still optionally, component is read again to the amount of bits in (before error correcting/decoding) reading data with " 0 " value
With the statistics of the amount of bits with " 1 " value, the error correction operations for reading data are concurrently carried out with ECC component, to reduce
Processing delay.If ECC component indicates error correction success, by correct data (after descrambling) as the response to read command
It is supplied to host.If ECC component indicates error correction failure, by reading component again according to the ratio read in data with " 0 " value
The statistics of special quantity and the amount of bits with " 1 " value generates and reads order again.Still optionally, in one example, portion is read again
Part is far below ECC component to the statistical delay of the amount of bits read in data with " 0 " value and the amount of bits with " 1 " value
Error correction delay to data are read reads component again according to statistics before ECC component determines error correction success or not
As a result it generates and reads order again.Optionally, temporary read again of component is read again to order, to wait the error correction result of ECC component, response
Fail in error correction, is issued to NVM chip and read order again.Still optionally, stressed component is not to wait for the wrong school of ECC component
Just as a result, and to NVM chip issue read again order, and ECC component then indicate error correction success when, abandon read again life
The data read from NVM chip are enabled, and when ECC component then indicates error correction failure, it is ordered using stressed from NVM chip
The data of reading.
Fig. 8 is the read-out voltage scatter chart of the storage unit of another example.In the example of fig. 8, storage unit
Type is TLC (Triple Level Cell, three value storage units).The read-out voltage of TLC storage unit is according to programming degree quilt
It is grouped into one of 8 kinds of different states, corresponding 3 bit combinations of every kind of state.8 kinds of storage unit are indicated to " L7 " by " L0 "
Different states, " L0 " is the state after storage unit is wiped free of, and " L7 " is the state after storage unit is sufficiently programmed.Ginseng
See Fig. 8, the read-out voltage of from " L0 " to " L7 ", storage unit are monotonically changed.
The state of storage unit is distinguished with multiple reading threshold voltages.With continued reference to Fig. 8, with reading threshold voltage TH1
Differentiation state " L3 " and " L4 ";State " L1 " and " L2 " is distinguished with threshold voltage TH2 is read;It is distinguished with threshold voltage TH3 is read
State " L5 " and " L6 ";State " L0 " and " L1 " is distinguished with threshold voltage TH4 is read;State is distinguished with threshold voltage TH5 is read
" L2 " and " L3 ";State " L4 " and " L5 " is distinguished with threshold voltage TH6 is read;State " L6 " is distinguished with threshold voltage TH7 is read
With " L7 ".As an example, register is provided to store the value for reading threshold voltage for each reading threshold voltage, and pass through ratio
The read-out voltage for comparing the value and storage unit that read threshold voltage compared with device, carrys out recognition memory cell state in which.
Coding, a kind of corresponding three bits of encoded of every kind of state are provided for the state of storage unit.Fig. 9 illustrates storage unit
State and storage bit corresponding relationship.As an example, referring to Fig. 9, state " L0 " represents three bits of encoded " 111 ", shape
State " L1 " represents three bits of encoded " 011 ".In Fig. 9, make two three bit values codings corresponding to two states of arbitrary neighborhood
Between there is only a bit changes, and in addition dibit be identical.
Figure 10 illustrates the corresponding relationship of three bits and Physical Page of storage unit storage.To promote physics access to web page
Concurrency, three bits stored in each storage unit are belonging respectively to different Physical Page.For example, in Figure 10, storage unit
Three bits " 101 " are stored, are referred to as MSB (most significant bit, Most Significant by sequence from left to right
Bit), CSB (intermediate significance bit, Central Significant Bit) and LSB (least significant bit, Least
Significant Bit).The Physical Page being made of the MSB of multiple storage units is known as MSB pages, it will be by multiple storage units
The Physical Page that constitutes of CSB be known as CSB pages, and the Physical Page being made of the LSB of multiple storage units is known as LSB page.Make
Corresponding bit is read with Physical Page from storage unit with corresponding one or more reading threshold voltages corresponding with Physical Page
Value.
Three bits of TLC storage unit storage have different reliabilitys.Referring back to Fig. 8, recognition memory cell
LSB, it is only necessary to by the read-out voltage of storage unit compared with reading threshold voltage TH1, thus in three bits of storage,
LSB has preferable reliability.The CSB for wanting recognition memory cell needs the read-out voltage of storage unit and reads threshold value electricity
Pressure TH2 and/or TH3 compares.And the MSB of recognition memory cell is wanted, need the read-out voltage of storage unit and reads threshold value electricity
Pressure TH4, TH5, TH6 and/or TH7 are compared.
To change influence of the reading threshold voltage of storage unit to the result read from storage unit dependent on storage
The state of unit.For example, the value of threshold voltage TH1 is read by changing if storage unit is in " L7 " state, it will hardly
Influence the reading result of storage unit.As another example, change the value for reading threshold voltage TH6, when reading data, if depositing
Storage unit is not in " L4 " and " L5 " state, then the reading result of storage unit is hardly affected.
If the reading result of storage unit is influenced very little by certain variation for reading threshold voltage, can not be somebody's turn to do by changing
The value of threshold voltage is read to find the optimum value for the reading threshold voltage for being suitble to the storage unit.Generally, to Physical Page
The data of write-in are scrambled, so that the data of write-in Physical Page are random number sequences, so that the state of storage unit storage is in object
Manage spatially random distribution.
Figure 11 illustrates the corresponding relationship of the state for reading threshold voltage and storage unit of embodiment shown in Fig. 8.
The wordline of nand flash memory includes storage unit, these storage units provide the multiple data for constituting Physical Page.
(referring also to Fig. 8) in Figure 11, state " L3 " and " L4 " is distinguished with threshold voltage TH1 is read, with reading threshold voltage
TH2 differentiation state " L1 " and " L2 " distinguishes state " L5 " and " L6 " with threshold voltage TH3 is read, with the reading area threshold voltage TH4
Isloation state " L0 " and " L1 ", distinguish state " L2 " and " L3 " with threshold voltage TH5 is read, and distinguish shape with threshold voltage TH6 is read
State " L4 " and " L5 ", and state " L6 " and " L7 " is distinguished with threshold voltage TH7 is read.
When the Storage Unit Type of the NVM chip of solid storage device is TLC, component (referring also to Fig. 7) basis is read again
Physical Page (for example, MSB page, CSB page or LBS page) of the data from which type is read to adjust read command parameter accordingly
(reading threshold voltage).
Figure 12 illustrates the tune for reading threshold voltage corresponding with Physical Page type in the embodiment according to shown in Fig. 8-10
Perfect square formula.Referring to Figure 12, if reading data comes from LSB page, reads component (referring also to Fig. 7) statistics reading data again and (pass through mistake
Before correction or after error correction) in amount of bits with " 0 " value with " 1 " value amount of bits (value of quantity or
The ratio of both persons).As an example, if read amount of bits with " 1 " value in data with there is " 0 " value amount of bits it
Than being significantly greater than for 1 (for example, being higher than 1.04), then generates and read order again, and in the stressed order of generation, indicate relative to preceding
Read command corresponding to reading threshold voltage TH1, be moved to the left read threshold voltage TH1.If reading has " 1 " value in data
Amount of bits be significantly less than 1 (for example, less than 0.96) with the ratio between the amount of bits of " 0 " value, then generate and read order again, and
Instruction is relative to reading threshold voltage TH1 corresponding to preceding read command in the stressed order of generation, and move right reading
Threshold voltage TH1.It can be according to the working condition (erasing of the code rate, NVM chip of error-correcting code it is to be appreciated that reading component again
Number, temperature, data hold time etc.) and select according to the bit read in data with " 0 " value and with the bit of " 1 " value
Quantity needs to generate the condition for reading order again to determine.For example, for the error-correcting code of high code rate, it can be according in reading data
Amount of bits with " 0 " value is greater than 1.1 with the ratio between the amount of bits with " 1 " value as the judgement mark of " significantly greater than 1 "
It is quasi-.Still it is to be appreciated that reading threshold voltage to " left side " or to " right side " is mobile, refer on trunnion axis shown in Fig. 8, with to the left
Or direction adjustment to the right reads the value of threshold voltage, so that by reading again in the data that order obtains, the ratio with " 0 " value
Special quantity is substantially the same with having the amount of bits of " 1 " value.
With continued reference to Figure 12, if reading data comes from CSB pages, reads component (referring also to Fig. 7) statistics reading data again and (pass through
Before error correction or after error correction) in amount of bits with " 0 " value with there is " 1 " value amount of bits (quantity
Value or ratio).As an example, if reading the amount of bits in data with " 1 " value and the ratio between the amount of bits with " 0 " value
Significantly greater than 1, then it generates and reads order again, and indicate in the stressed order of generation relative to reading corresponding to preceding read command
Threshold voltage TH2 and threshold voltage TH3 is read out, is moved to the left and reads threshold voltage TH2 and/or move right and read threshold value electricity
Press TH3.If reading the amount of bits in data with " 1 " value is significantly less than 1 with the ratio between the amount of bits with " 0 " value, give birth to
It indicates at stressed order, and in the stressed order of generation relative to reading threshold voltage TH2 corresponding to preceding read command
With TH3, moving right to read threshold voltage TH2 and/or be moved to the left reads threshold voltage TH3.According to an embodiment of the present application,
In reading order again, it can only change and one of read threshold voltage TH2 and read threshold voltage TH3, or change and read threshold value
Both voltage TH2 and reading threshold voltage TH3.
With continued reference to Figure 12, if reading data comes from MSB pages, reads component (referring also to Fig. 7) statistics reading data again and (pass through
Before error correction or after error correction) in amount of bits with " 0 " value with there is " 1 " value amount of bits (quantity
Value or ratio).As an example, if reading the amount of bits in data with " 1 " value and the ratio between the amount of bits with " 0 " value
Significantly greater than 1, then it generates and reads order again, and indicate in the stressed order of generation relative to reading corresponding to preceding read command
Threshold voltage TH4, reading threshold voltage TH5, reading threshold voltage TH6 and reading threshold voltage TH7 out, are moved to the left reading threshold
Threshold voltage TH4, move right read threshold voltage TH7, moving right reads threshold voltage TH5 and/or is moved to the left reading threshold
Threshold voltage TH6.If reading the amount of bits in data with " 1 " value is significantly less than 1 with the ratio between the amount of bits with " 0 " value,
It then generates and reads order again, and indicate in the stressed order of generation relative to reading threshold voltage corresponding to preceding read command
TH4, read threshold voltage TH5, read threshold voltage TH6 and read threshold voltage TH7, move right read threshold voltage TH4,
It is moved to the left and reads threshold voltage TH7, be moved to the left and read threshold voltage TH5 and/or move right and read threshold voltage TH6.
According to an embodiment of the present application, in reading order again, it can only change and read threshold voltage TH4, read threshold voltage TH5, read
One of threshold voltage TH6 and reading threshold voltage TH7 out, or change and read threshold voltage TH4, read threshold voltage TH5, read
Two or more in threshold voltage TH6 and reading threshold voltage TH7 out.
Optionally, component also foundation is read again to the amount of bits read in data with " 0 " value and/or there is " 1 " value
Amount of bits determines mobile one or more directions for reading threshold voltage and/or amplitude.
Figure 13 is the read-out voltage scatter chart of the storage unit of another example.In the example of Figure 13, storage unit
Type be TLC (Triple Level Cell, three value storage units).The read-out voltage of TLC storage unit is according to programming degree
It is grouped into one of 8 kinds of different states, corresponding 3 bit combinations of every kind of state.The 8 of storage unit are indicated to " L7 " by " L0 "
The different state of kind, " L0 " is the state after storage unit is wiped free of, and " L7 " is the state after storage unit is sufficiently programmed.
The read-out voltage of from " L0 " to " L7 ", storage unit are monotonically changed.
The state of storage unit is distinguished with multiple reading threshold voltages.With continued reference to Figure 13, with reading threshold voltage TH1
Differentiation state " L3 " and " L4 ";State " L1 " and " L2 " is distinguished with threshold voltage TH2 is read;It is distinguished with threshold voltage TH3 is read
State " L5 " and " L6 ";State " L0 " and " L1 " is distinguished with threshold voltage TH4 is read;State is distinguished with threshold voltage TH5 is read
" L2 " and " L3 ";State " L4 " and " L5 " is distinguished with threshold voltage TH6 is read;State " L6 " is distinguished with threshold voltage TH7 is read
With " L7 ".Read-out voltage by comparing the value and storage unit that read threshold voltage carrys out recognition memory cell state in which.
Coding is provided for each state of storage unit, encodes and represents three bits that TLC storage unit is stored, every kind
A kind of corresponding three bits of encoded of state.Figure 14 illustrates the corresponding relationship of the state of storage unit and the bits of encoded of storage.Make
For citing, referring to Figure 14, state " L0 " is represented three bits of encoded " 111 ", and state " L1 " represents three bits of encoded " 110 ", state
" L2 " represents three bits of encoded " 100 ".In Figure 14, make between two three bits of encoded corresponding to two states of arbitrary neighborhood
There is only a bit changes, and in addition dibit is identical.
Figure 15 illustrates the corresponding relationship of three bits and Physical Page of storage unit storage.It is stored in each storage unit
Three bits be belonging respectively to different Physical Page.For example, storage unit stores three bits " 101 " in Figure 15, by from a left side to
Right sequence is referred to as MSB, CSB and LSB.The Physical Page being made of the MSB of multiple storage units is known as MSB pages, it will be by
The Physical Page that the CSB of multiple storage units is constituted is known as CSB pages, and the Physical Page that will be made of the LSB of multiple storage units
Referred to as LSB page.It is read using one or more reading threshold voltages corresponding with the Physical Page of a certain type from storage unit
The value of corresponding bit with the type Physical Page.
Referring back to Figure 13, the LSB of recognition memory cell, by the read-out voltage of storage unit and threshold voltage need to be read
TH4 and/or TH6 compare.When read-out voltage is less than reading threshold voltage TH4, the LSB of storage unit is " 1 ", and read-out voltage exists
When between TH4 and TH6, the LSB of storage unit is " 0 ", and when read-out voltage is greater than TH6, the LSB of storage unit is " 1 ".
The CSB for wanting recognition memory cell, need by the read-out voltage of storage unit and read threshold voltage TH1, TH2 and/
Or TH3 compares.When read-out voltage is less than TH2, the CSB of storage unit is " 1 ", when read-out voltage is between TH2 and TH1, storage
The CSB of unit is " 0 ", and when read-out voltage is between TH1 and TH3, the CSB of storage unit is " 1 ", when read-out voltage is greater than TH3,
The CSB of storage unit is " 0 ".
The MSB for wanting recognition memory cell needs the read-out voltage of storage unit and reads threshold voltage TH5 and/or TH7
It is compared.When read-out voltage is less than TH5, the MSB of storage unit is " 1 ", and when read-out voltage is between TH5 and TH7, storage is single
The MSB of member is " 0 ", and when read-out voltage is greater than TH7, the MSB of storage unit is " 1 ".
To change the reading threshold voltage of storage unit, the influence to the result read from storage unit is depended on and deposited
The state of storage unit.For example, the value of threshold voltage TH1 is read by changing if storage unit is in " L7 " state, it will hardly
It will affect the reading result of storage unit.As another example, change the value for reading threshold voltage TH6, when reading data, if
Storage unit is not in " L4 " and " L5 " state, then the reading result of storage unit is hardly affected.
If the reading result of storage unit is influenced very little by certain variation for reading threshold voltage, can not be somebody's turn to do by changing
The value of threshold voltage is read to find the optimum value for the reading threshold voltage for being suitble to the storage unit.Generally, to Physical Page
The data of write-in are scrambled, so that the data of write-in Physical Page are random number sequences, so that the state of storage unit storage is in object
Manage spatially random distribution.
Figure 16 illustrates the corresponding relationship of the state for reading threshold voltage and storage unit according to the embodiment of the present application.
(referring also to Figure 13) in Figure 16, state " L3 " and " L4 " is distinguished with threshold voltage TH1 is read, with reading threshold voltage
TH2 differentiation state " L1 " and " L2 " distinguishes state " L5 " and " L6 " with threshold voltage TH3 is read, with the reading area threshold voltage TH4
Isloation state " L0 " and " L1 ", distinguish state " L2 " and " L3 " with threshold voltage TH5 is read, and distinguish shape with threshold voltage TH6 is read
State " L4 " and " L5 ", and state " L6 " and " L7 " is distinguished with threshold voltage TH7 is read.
When the Storage Unit Type of the NVM chip of solid storage device is TLC, component (referring also to Fig. 7) basis is read again
Physical Page (for example, MSB page, CSB page or LBS page) of the data from which type is read to adjust read command parameter accordingly
(reading threshold voltage).
Figure 17 illustrates the adjusting side for reading threshold voltage corresponding with Physical Page type of embodiment shown in Figure 13-16
Formula.Referring to Figure 17, if reading data comes from LSB page, reads component (referring also to Fig. 7) statistics reading data again and (pass through error correction
Before or after error correction) in amount of bits with " 0 " value with the amount of bits (value or ratio of quantity of " 1 " value
Example).As an example, if the amount of bits read in data with " 1 " value is significantly greater than with the ratio between the amount of bits with " 0 " value
It 1 (for example, being higher than 1.04), then generates and reads order again, and indicate in the stressed order of generation relative to preceding read command institute
Corresponding reading threshold voltage TH4 and reading threshold voltage TH6 is moved to the left and reads threshold voltage TH4 (i.e. reduction reading threshold value
The value of voltage TH4), and/or move right and read threshold voltage TH6 (increasing the value for reading threshold voltage TH6).If reading number
Amount of bits with " 1 " value in is significantly less than 1 (for example, less than 0.96) with the ratio between the amount of bits with " 0 " value, then gives birth to
It indicates at stressed order, and in the stressed order of generation relative to reading threshold voltage TH4 corresponding to preceding read command
It with reading threshold voltage TH6, moves right and reads threshold voltage TH4, and/or be moved to the left and read threshold voltage TH6.It can manage
Xie Di, stressed component can be according to working condition (erasing times, temperature, the data holdings of the code rate, NVM chip of error-correcting code
Time etc.) and determined according to the bit read in data with " 0 " value with the amount of bits with " 1 " value and generation is needed to read again
The condition of order.For example, for the error-correcting code of high code rate, can according to the amount of bits read in data with " 0 " value with
The ratio between amount of bits with " 1 " value is greater than 1.1 as the judgment criteria of " significantly greater than 1 ".Still it is to be appreciated that
" left side " or threshold voltage is read to " right side " is mobile, refers on the trunnion axis shown in Figure 13, adjusted and read with leftward or rightward direction
The value of threshold voltage out.Adjustment reads the target of threshold voltage, is so that having by reading again in the data that order obtains
The amount of bits of " 0 " value is substantially the same with having the amount of bits of " 1 " value.According to an embodiment of the present application, order is being read again
In, it can only change and one of read threshold voltage TH4 and read threshold voltage TH6, or change and read threshold voltage TH4 and read
Both threshold voltage TH6 out.
With continued reference to Figure 17, if reading data comes from CSB pages, reads component (referring also to Fig. 7) statistics reading data again and (pass through
Before error correction or after error correction) in amount of bits with " 0 " value with there is " 1 " value amount of bits (quantity
Value or ratio).As an example, if reading the amount of bits in data with " 1 " value and the ratio between the amount of bits with " 0 " value
Significantly greater than 1, then it generates and reads order again, and indicate in the stressed order of generation relative to reading corresponding to preceding read command
Threshold voltage TH1, reading threshold voltage TH2 and reading threshold voltage TH3 out, are moved to the left and read threshold voltage TH2, Xiang Zuoyi
It moves to read threshold voltage TH3 and/or move right and reads threshold voltage TH1.If reading the amount of bits in data with " 1 " value
It is significantly less than 1 with the ratio between the amount of bits with " 0 " value, then generates and read order again, and indicate phase in the stressed order of generation
It for reading threshold voltage TH1 corresponding to preceding read command, reads threshold voltage TH2 and reads threshold voltage TH3, to the right
Mobile reading threshold voltage TH2, moving right to read threshold voltage TH3 and/or be moved to the left reads threshold voltage TH1.According to
Embodiments herein can only change in reading order again and read threshold voltage TH1, read threshold voltage TH2 and read threshold
One of threshold voltage TH3, or change two read in threshold voltage TH1, reading threshold voltage TH2 and reading threshold voltage TH3
It is a or more.
With continued reference to Figure 17, if reading data comes from MSB pages, reads component (referring also to Fig. 7) statistics reading data again and (pass through
Before error correction or after error correction) in amount of bits with " 0 " value with there is " 1 " value amount of bits (quantity
Value or ratio).As an example, if reading the amount of bits in data with " 1 " value and the ratio between the amount of bits with " 0 " value
Significantly greater than 1, then it generates and reads order again, and indicate in the stressed order of generation relative to reading corresponding to preceding read command
Threshold voltage TH5 and threshold voltage TH7 is read out, is moved to the left and reads threshold voltage TH5 and/or move right and read threshold value electricity
Press TH7.If reading the amount of bits in data with " 1 " value is significantly less than 1 with the ratio between the amount of bits with " 0 " value, give birth to
It indicates at stressed order, and in the stressed order of generation relative to reading threshold voltage TH5 corresponding to preceding read command
With reading threshold voltage TH7, moving right to read threshold voltage TH5 and/or be moved to the left reads threshold voltage TH7.According to this
The embodiment of application can only change in reading order again and one of read threshold voltage TH5 and read threshold voltage TH7, or
Change and both reads threshold voltage TH5 and read threshold voltage TH7.
Optionally, component also foundation is read again to the amount of bits read in data with " 0 " value and/or there is " 1 " value
Amount of bits determines mobile one or more directions for reading threshold voltage and/or amplitude.
Example IV
Figure 18 is the schematic diagram according to the solid storage device of the embodiment of the present application four.According to the solid-state of the embodiment of Figure 18
The control unit of equipment is stored, including order issues queue, queue, Media Interface Connector controller, ECC component and AI are completed in order
(artificial intelligence, Artificial Intelligence) component.AI component is coupled to ECC component.It is indicated in response to ECC component
Error correction success, is supplied to AI component for the read command parameter of scene and current read command that current read command is applied, uses
In training AI component.For example, in the AI component for realizing deep learning algorithm, the neural network of training AI component.Optionally,
AI component is additionally coupled to the DRAM outside control unit, to cache the parameter of the neural network of AI component.AI component can be IP
Core, CPU core or the asic chip for being coupled to controller.
In the embodiment, the scene that read command is applied is the input of neural network, and read command parameter is (for example, read
Threshold voltage, read data number of error bits and/or read command parameter sequence) be same neural network input it is corresponding pre-
Phase output, for the supervision to learning process.By training, the several scenes that neural network applies read command are divided
Class, the classification of scene is corresponding with that can read the read command parameter of data of error correction that can be succeeded by ECC component under the scene,
Can be corresponding with the higher probability success read command parameter of data of error correction by ECC component with that can be read under the scene, with
Can readout error bit number is lower under the scene or the read command parameter of data lower than threshold value is corresponding, or join with read command
Number Sequence is corresponding, wherein the data combination for using the read command sequence generated according to read command argument sequence to read from NVM chip,
Can be with higher probability and less stressed number by the success error correction of ECC component, or passing through soft decoding can be by the portion ECC
Part success error correction or with higher probability success error correction.
The attribute for the scene that read command is applied includes the LUN (being identified by No. LUN) of read command access, physical block (by object
The identification of reason block address), Physical Page type (LSB/CSB/MSB), the data on physical block be written into time interval so far, physics
Block be wiped free of number, the error rate of physical block, physical block be read number and/or physical block whether be completely written (and
The position (being identified by physical page address) being currently written into).
The scene of read command application is described with a variety of attribute informations, and is supplied to AI component.As an example, on physical block
Data are written into time interval so far and include or do not include the time that solid storage device is in power-down state.
Optionally, the attribute information for the scene that read command is applied further includes the Physical Page of read command access (by Physical Page
Address instruction), the successful read command parameter of the data error correcting that last time reads the Physical Page (for example, reading threshold voltage,
Read the number of error bits of data, the sequence of read command parameter, the sequence of the successful read command parameter of soft decoding error correction and/
Or the high one or more read command parameters of data error correcting success rate are read before).
One of a variety of attribute informations or its multiple combinations can be used to train the neural network of AI component.
In a kind of embodiment according to the application, ECC component will fail the error correction for reading data, and make
For response, data are re-read by the means such as stressed.And in response to may successfully mistake by reading etc. that means obtain again
The scene that corresponding read command parameter and read command are applied is used to train the neural network of AI component by the data of correction.
In the further embodiment according to the application, fail in response to ECC component to the error correction for reading data,
The scene that corresponding read command parameter and read command are applied is also used for train the neural network of AI component.
In another embodiment according to the application, the CPU core (not shown) of control unit identifies ECC component
To the error correction result of reading data, and the scene that corresponding read command parameter and read command are applied is supplied to the portion AI
Part, to train the neural network of AI component.CPU core controls training, deduction, unlatching and/or the pass of AI component by executing software
It closes.
Still optionally, in response to the order of host or instruction, the parameter of neural network is set for AI component, it is set
The parameter of neural network can store in the NVM chip of solid storage device or be provided by host.Optionally, in response to host
Order or instruction, from AI component retrieval study of Confucian classics acquistion to neural network parameter, and be supplied to host or be stored in solid-state and deposit
In the NVM chip for storing up equipment, for the use of other solid storage devices.
With continued reference to Figure 18, by taking solid storage device read command process flow as an example, life of the host to solid storage device
Order issues queue and issues read access command (1).The read access command that host issues is forwarded to Media Interface Connector control by processing
Device (2) processed.Media Interface Connector controller issues order (3) to NVM chip according to the read access command that host issues.Media Interface Connector control
Device processed also obtains the processing result (4) of read command from NVM chip.For read command, the data read from NVM chip are provided to
ECC component carries out error correction (5).If error correction success of the ECC component to data, the read command for handling completion are added to
Queue (6) are completed in order, and the scene that current read command is applied is also forwarded to AI component (6) with read command parameter, is used
In the neural network of training AI component.The training resulting result of AI component is recorded in the memory of control unit, dynamic random
It accesses in memory (DRAM) or NVM chip.
Optionally, multiple neural networks are provided in AI component, each neural network serve solid storage device LUN or
One or more of physical block to reduce the quantity for being supplied to the parameter of each neural network of AI component, and then reduces
Scale and/or training/deduction time demand to neural network.For example, solid storage device includes 32 LUN, and the portion AI
Part is provided with 32 LUN corresponding 4 or 32 neural networks, and each neural network is responsible for specified 8 or 1 LUN of processing
Read command.The LUN indicated in the scene that AI component is applied according to read command, read command parameter and read command are applied
Scene is supplied to corresponding neural network with the training neural network.
Figure 19 is the schematic diagram that read command is handled according to the solid storage device of the embodiment of Figure 18.
In the embodiment of figure 19, order of the host to solid storage device issues queue and issues read access command (1).It is main
The read access command that machine issues is forwarded to Media Interface Connector controller (2) by processing.Media Interface Connector controller is according to host
The read access command of sending issues read command (3) to NVM chip.Media Interface Connector controller also obtains command process from NVM chip
As a result (4).For read command, the data read from NVM chip are provided to ECC component and carry out error correction (5).If the portion ECC
Part fails to the error correction of data, and the scene that read command is applied (optionally, further includes read command parameter (for example, reading threshold
The sequence of threshold voltage, the number of error bits for reading data and/or read command parameter)) it is forwarded to AI component (6).AI component root
Infer optimal read command parameter (for example, reading threshold voltage or there are different readings according to the scene that received read command is applied
The read command sequence of threshold voltage out), it generates and reads order again, stressed order is sent to Media Interface Connector controller (7).Medium connects
Mouth controller issues to read again according to stressed order to NVM chip orders (8).Media Interface Connector controller also obtains weight from NVM chip
The processing result (9) of read command.It reads the data that order is read again and is provided to ECC component (10).If ECC component is to reading data
Error correction failure, the process from step (6) to step (10) is initiated by AI component again.If ECC component is to reading data
Error correction success, handle completion order be added to order complete queue (11).Queue is completed by visit order, it is main
Machine obtains command processing result (12).
In another embodiment according to the application, the CPU core (not shown) identification ECC component of control unit is to reading
The error correction result of data out, and the scene (optionally, further including read command parameter) that corresponding read command is applied is mentioned
AI component is supplied, and AI component, which generates, reads order again, and stressed order is sent out under the control of the CPU core (not shown) of control unit
Give Media Interface Connector controller.
Optionally, control unit further includes reading component again (referring to Fig. 2 and Fig. 7).It reads component again and AI component in parallel works.
As an example, fail for the first time in response to ECC component to the error correction for reading data, generated using AI component and read order again, with
And the subsequent failure in response to ECC component to the error correction for reading data, the stressed order generated using stressed component.As
Another example is failed for the first time to the error correction for reading data in response to ECC component, is generated using stressed component and read life again
It enables, and reads the error correction failure of data in response to the stressed order of ECC component counterweight read component suggestion, then use the portion AI
The stressed order that part generates.Read the read command parameter that order is read in instruction in order again again, the method for generating read command parameter please join
According to the description as described in Fig. 8-17.
Optionally, the neural network of the AI component scene that read command is applied based on the received is inferred with current scene most
The scene type matched, and according to most matched scene type selection read command parameter and/or read command sequence.
In one example, the scene that the neural network of AI component is applied according to read command is obtained with current scene most
The scene type matched, and generated according to the scene type and read order or stressed command sequence again, and pass through Media Interface Connector controller
Stressed order or stressed command sequence are sent to nonvolatile memory.In another example, the neural network of AI component
It is obtained according to the scene that read command is applied with the most matched scene type of current scene, and the scene applied according to read command
And the read command parameter of the current read command corresponding to error correction failure generates and reads order or stressed command sequence again, and leads to
It crosses Media Interface Connector controller and stressed order or stressed command sequence is sent to nonvolatile memory.
Still optionally, if AI component includes multiple neural networks, each neural network is served solid storage device and is patrolled
Collect one or more of unit number (LUN) or physical block.Fail in response to ECC component to the error correction for reading data, according to
The LUN and/or physical block indicated in the scene applied according to read command, current read command parameter and/or read command are applied
Scene be supplied to corresponding neural network, be inferred to be suitble to and current read command by the read command parameter of application scenarios and/
Or read command sequence.
According in the embodiment of Figure 18 and Figure 19, in the case where ECC component error correction failure, sent out by AI component controls
One or many stressed processes out improve and read the error correction success rate that order reads data again, reduce solid-state storage and set
The standby interaction with host reduces read command processing delay.
The threshold setting method of the embodiment of the present invention can be applied to the solid storage device based on NVM chip, including but not
It is limited to solid state hard disk, USB flash disk, SD card, the portable electronic devices such as mobile phone, tablet computer can also be applied to and other are a variety of
Using NVM chip, (nand flash memory, phase transition storage, FeRAM, MRAM etc. are common NVM.) need to store information
Electronic equipment.
Although the preferred embodiment of the application has been described, it is created once a person skilled in the art knows basic
Property concept, then additional changes and modifications may be made to these embodiments.So it includes excellent that the following claims are intended to be interpreted as
It selects embodiment and falls into all change and modification of the application range.Obviously, those skilled in the art can be to the application
Various modification and variations are carried out without departing from spirit and scope.If in this way, these modifications and variations of the application
Belong within the scope of the claim of this application and its equivalent technologies, then the application is also intended to encompass these modification and variations and exists
It is interior.
Claims (10)
1. a kind of data reconstruction method characterized by comprising
The read access command that receiving host issues;
Read command is issued to nonvolatile memory according to the read access command;
Receive the reading data that the nonvolatile memory provides;
Error correction is carried out to the reading data;
If the reading data after correction are sent to host by the error correction success;And it is answered using the read command
The read command parameter training neural network of scene and read command instruction.
2. data reconstruction method according to claim 1, which is characterized in that the scene that the read command is applied is as mind
Input through network, output of the read command parameter of the read command instruction as the neural network.
3. data reconstruction method according to claim 1 or 2, which is characterized in that in response to the order of the host, setting
The parameter of neural network, the parameter of the neural network are stored in the nonvolatile memory or are mentioned by the host
For.
4. data reconstruction method according to any one of claim 1-3, which is characterized in that carried out to multiple neural networks
Training, each neural network serve the one or more logical unit number or one or more physics of solid storage device
Block.
5. data reconstruction method described in any one of -4 according to claim 1, which is characterized in that lost in response to error correction
It losing, the neural network scene that read command is applied based on the received infers read command parameter corresponding with the scene, and
It generates and reads order again, the stressed order is sent to the nonvolatile memory.
6. data reconstruction method according to claim 5, which is characterized in that receive the nonvolatile memory to described
Read the reading data of order again;
Error correction is carried out to the reading data of the stressed order;
If the error correction failure, repeatedly generates stressed order, until error correction success;
If the reading data of the stressed order after correction are sent to the host by the error correction success.
7. data reconstruction method according to claim 1 to 6, which is characterized in that in response to reading data
Error correction fails for the first time, reads order again using first that the neural network generates;And
In response to the subsequent failure of error correction, generates second and read order again, indicate described second in the described second stressed order
It reads the read command parameter of order again, and sends described second to the nonvolatile memory and read order again.
8. data reconstruction method described in any one of -7 according to claim 1, which is characterized in that the neural network is according to connecing
The scene that the read command of receipts is applied is inferred with the most matched scene type of current scene, and according to the most matched scene class
It Xuan Ze not read command parameter and/or read command sequence.
9. a kind of solid storage device, including control unit and nonvolatile memory chip, the control unit is for executing
Data reconstruction method described in -8 according to claim 1.
10. a kind of control unit, which is characterized in that including order issue queue, Media Interface Connector controller, error correction component,
Queue is completed in artificial intelligence component and order;
The order issues queue and couples with the Media Interface Connector controller, described to order the read access for issuing queue receiving host
Order, and the read access command is transmitted to Media Interface Connector controller;
The Media Interface Connector controller issues read command to nonvolatile memory, and receives the reading of the nonvolatile memory
Data out;
The error correction component is coupled with the Media Interface Connector controller, the error correction component to the reading data into
Row error correction;
The order is completed queue and is coupled with the error correction component, and in response to error correction success, team is completed in the order
The Data Concurrent that column receive after the error correction that the error correction component is sent gives the host;
The artificial intelligence component couples with the error correction component, and the artificial intelligence component is answered using the read command
Scene and the corresponding read command parameter training neural network of the read command.
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