CN109581220A - Inverter output voltage detection method, device, equipment and storage medium - Google Patents
Inverter output voltage detection method, device, equipment and storage medium Download PDFInfo
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Abstract
The present invention provides a kind of inverter output voltage detection method, device, equipment and storage mediums, the inverter output voltage detection method, it include: to clap sampling start pulse signal and current bat sampling start pulse signal according to upper one, time interval between the two neighboring sampling start pulse signal of integral calculation, and sampling start pulse signal, current bat sampling start pulse signal and high-order information of voltage are clapped according to upper one, the voltage time and area between the two neighboring sampling start pulse signal of integral calculation；According to time interval and voltage time and area, the sampled voltage average value between two neighboring sampling start pulse signal is determined, and using the average value of sampled voltage as the output voltage of current sample time.The present invention reduces sampling error caused by mismatching due to sampled point by the voltage time and area integral between seeking sampling trigger pulse, average voltage scheme, avoids the transmitting of sampling pulse time interval, improves module versatility.
Description
Technical field
The present embodiments relate to motor control technology fields, examine more specifically to a kind of inverter output voltage
Survey method, apparatus, equipment and storage medium.
Background technique
Since senseless control scheme has the advantages that at low cost, high reliablity, at present in motor driven systems
In be widely applied.The key of senseless control scheme is rotating coordinate system directional angle under vector control system
Observation.The existing observation based on motor T-type equivalent model is directly or indirectly based on motor three-phase input voltage.
Motor three-phase voltage generallys use inverter pulse width modulation (Pulse Width Modulation, PWM) and accounts for
Sky is obtained than inverse.However due to non-ideal factors such as voltage source inverter dead time, power tube voltage drops, inverse voltage and true
There are errors between real voltage, and under low output frequency, error voltage is even greater than true output voltage, seriously reduce orientation angle
Spend the accuracy of observation.
Existing inverter non-linear compensation method can reduce error voltage to a certain extent, but this method need to be based on
Inverter output current detection and inverter nonlinear model, and because current switch ripple and inverter are non-right under actual conditions
The influence of title property, is difficult Accurate Model, limits the precision of compensation scheme.
Mode to avoid the above problem from taking is directly to detect output voltage by voltage detecting circuit, existing at present
Scheme has:
High level time detection method directly detects output of the inverter under pulse-width-modulated mode by hardware circuit
Output phase voltage is calculated in conjunction with busbar voltage and high level time in voltage high level time.But the program is suitable only for examining
It surveys inverter under two level topologys and exports phase voltage, may not apply to line voltage detection and the detection of more level output voltages, and
The program is cannot effectively to reflect actual output voltage slope variation by way of hardware compares, and it is non-to have ignored inverter
Power tube drop portion in linear voltage error.
Multi-segment voltage comparison measure-ment method, the form compared using multi-segment voltage are obtained under inverter different voltages when exporting
Between, add up to obtain the average value in the pulse width modulation lower switch period.The program can embody output voltage to a certain extent
Slope variation, and it is able to detect voltage with multiple levels.But the multistage of the program is directly proportional to hardware system complexity, improves
Hardware system cost and complexity, and cannot still embody power tube drop portion.
Low-pass filtering detection method, this kind of scheme build low-pass filter by active or passive form, filter out inversion
High frequency content in device output pulse width modulated signal.With the raising of actual frequency, filtering under low-pass filtering sampling plan
Voltage amplitude value reduces afterwards, it is difficult to ensure the sampling precision of analog signal.And the occasion low in normal operating frequency, to ensure
Voltage detecting precision needs to adjust hardware timeout constant, narrow application range.In addition to this, there is also phases and width for low-pass filtering
It is worth error, for accurate compensation, needs using highly-precise filtering capacitor, higher cost.
Summary of the invention
The embodiment of the present invention provides a kind of inverter output voltage detection method, device, equipment and storage medium, it is intended to solve
Certainly the problem of existing inverter output voltage method of sampling disadvantage, such as high level time detection method: may not apply to line voltage inspection
It surveys and more level output voltages detects, and have ignored power tube drop portion in inverter non-linear voltage error, it cannot be effective
React output voltage slope variation；Multi-segment voltage comparison measure-ment method: hardware system cost and complexity are improved, and cannot be embodied
Power tube drop portion；Low-pass filtering detection method: there are narrow application ranges, and asking there are voltage detecting phase and amplitude error
Topic.
The technical solution that the embodiment of the present invention solves above-mentioned technical problem is to provide a kind of inverter output voltage detection side
Method, comprising:
Sampling start pulse signal is clapped according to upper one and current clap samples start pulse signal, and integral calculation is two neighboring to adopt
Time interval between sample start pulse signal, and sampling start pulse signal, current bat sampling trigger pulse are clapped according to upper one
Signal and high-order information of voltage, the two neighboring voltage time and area sampled between start pulse signal of integral calculation；
According to the time interval and voltage time and area between the two neighboring sampling start pulse signal, adjacent two are determined
Sampled voltage average value between a sampling start pulse signal, and by it is described it is two neighboring sampling start pulse signal between sampling
The average value of voltage is as the output voltage currently clapped.
It is described to clap sampling triggering arteries and veins according to upper one in inverter output voltage detection method described in the embodiment of the present invention
It rushes signal and current clap samples start pulse signal, the time interval between the two neighboring sampling start pulse signal of integral calculation,
Include:
When receiving upper bat sampling start pulse signal, first time integral subelement is resetted and starts integral and is tired out
Add；
When receiving current bat sampling start pulse signal, the integral for storing the first time integral subelement is cumulative
Numerical value, and using the integral accumulating values of first time integral subelement as the two neighboring sampling start pulse signal
Between time interval.
It is described to clap sampling triggering arteries and veins according to upper one in inverter output voltage detection method described in the embodiment of the present invention
It rushes signal and current clap samples start pulse signal, the voltage time face between the two neighboring sampling start pulse signal of integral calculation
Product, comprising:
When receiving upper bat sampling start pulse signal, by the second time integral subelement and voltage time and area product
Molecular cell starting integral is cumulative；
Sinc is being received each time3When filter sample completes signal or current bat sampling start pulse signal, deposit
Store up the integral accumulating values of the second time integral subelement, and by the integral cumulative number of the second time integral subelement
For value as the subdivision period, the subdivision period is upper bat sampling start pulse signal and Sinc3Filter output sampling
Complete the time interval between signal, two Sinc3The time interval or described between signal is completed in filter output sampling
Sinc3Signal and the current time interval clapped between sampling start pulse signal are completed in filter output sampling；
By the integral accumulating values of the second time integral subelement and receive the Sinc3Filter sample is completed
When signal or the current product for clapping instantaneous voltage when sampling start pulse signal are as the voltage for segmenting the period
Between area；
The voltage time and area of the subdivision period is added in voltage time and area integral subelement, until receiving
Sampling start pulse signal is clapped to current, obtains the voltage time and area between the two neighboring sampling start pulse signal.
The embodiment of the present invention also provides a kind of inverter output voltage detection device, including sampling unit, modulation unit and
Demodulating unit, the modulation unit include numerical model analysis Δ Σ chip, the demodulating unit include voltage time integral unit and
Output voltage acquiring unit, in which:
The sampling unit, for detecting inverter output voltage instantaneous value；
The numerical model analysis Δ Σ chip, for the analog signal of the inverter output voltage instantaneous value to be converted to number
According to bit stream；
The demodulating unit, for extracting high-order information of voltage from the data bit stream；
The voltage time integral unit, for clapping sampling start pulse signal and current bat sampling triggering arteries and veins according to upper one
Signal, the time interval between the two neighboring sampling start pulse signal of integral calculation are rushed, and claps sampling triggering arteries and veins according to upper one
Rush signal, current clap samples start pulse signal and the high-order information of voltage, the two neighboring sampling triggering arteries and veins of integral calculation
Rush the voltage time and area between signal；
The output voltage acquiring unit, for according to the time interval between the two neighboring sampling start pulse signal
And voltage time and area, determine the sampled voltage average value between the two neighboring sampling start pulse signal, and by the phase
Sampled voltage average value between adjacent two samplings start pulse signal is as the output voltage currently clapped.
In inverter output voltage detection device described in the embodiment of the present invention, the voltage time integral unit includes
Integral subelement at the first time, the first time integral subelement are multiple when receiving upper bat sampling start pulse signal
Position, and storage integral accumulation and the two neighboring sampling touching of integral calculation when receiving current bat sampling start pulse signal
Send out the time interval between pulse signal.
In inverter output voltage detection device described in the embodiment of the present invention, the voltage time integral unit is also wrapped
The second time integral subelement and voltage time and area integral subelement are included, the demodulating unit includes Sinc3Filter,
In:
The second time integral subelement, for when receiving upper bat sampling start pulse signal, starting to be integrated
It is cumulative, and Sinc is being received each time3When filter sample completes signal or current bat sampling start pulse signal, storage
The integral accumulating values of the second time integral subelement, and by the integral accumulating values of the second time integral subelement
As the subdivision period；The subdivision period is the sampling start pulse signal and Sinc3Filter output sampling is completed
Time interval or two Sinc between signal3The time interval or described between signal is completed in filter output sampling
Sinc3Signal and the current time interval clapped between sampling start pulse signal are completed in filter output sampling；
The voltage time and area integrates subelement, for the starting product when receiving upper bat sampling start pulse signal
Divide and add up, and is receiving Sinc each time3It, will when filter sample completes signal or current bat sampling start pulse signal
The integral accumulating values of the second time integral subelement and receive the Sinc3Filter sample is completed signal or is worked as
Voltage time and area of the preceding product for clapping instantaneous voltage when sampling start pulse signal as the subdivision period；And
The voltage time and area of the subdivision period is added up, start pulse signal is sampled until receiving current clap, obtains
Voltage time and area between the two neighboring sampling start pulse signal.
In inverter output voltage detection device described in the embodiment of the present invention, the demodulating unit may be programmed at the scene
It is executed in gate array FPGA.
In inverter output voltage detection device described in the embodiment of the present invention, the sampling unit includes output voltage
Detection circuit, the output voltage detecting circuit are used to detect the voltage deviation of first input end and the second input terminal, comprising:
It is connected to the output end of the first phase of inverter in the first input end, the second input terminal is connected to inverter bus
When voltage cathode, then the output phase voltage of the first phase is detected；The output of the first phase of inverter is connected in the first input end
End, second input terminal are connected to the output end of the second phase of inverter, then detect the first phase output line electricity alternate with second
Pressure；First phase is any phase in U, V or W three-phase, and second phase is any in the other two-phase of non-first phase
One phase.
The embodiment of the present invention also provides a kind of inverter output voltage detection device, including storage unit and processing unit,
The computer program that can be executed in the processing unit is stored in the storage unit, and the processing unit executes the meter
The step of realizing inverter output voltage detection method as described above when calculation machine program.
The embodiment of the present invention also provides a kind of storage medium, and computer program, the meter are stored on the storage medium
When calculation machine program is executed by processor, the step of realizing inverter output voltage detection method as described above.
Inverter output voltage detection method, device, equipment and storage medium provided in an embodiment of the present invention have following
The utility model has the advantages that by accurately seek sampling trigger pulse between voltage time and area angular quadrature scheme and seek sampling trigger pulse between put down
Equal voltage schemes reduce sampling error caused by mismatching due to sampled point, avoid the transmitting of sampling pulse time interval, mention
High module versatility.
Detailed description of the invention
The flow diagram of Fig. 1 inverter output voltage detection method provided in an embodiment of the present invention；
The two neighboring sampling triggering of integral calculation in Fig. 2 inverter output voltage detection method provided in an embodiment of the present invention
The flow diagram of time interval between pulse signal；
The two neighboring sampling triggering of integral calculation in Fig. 3 inverter output voltage detection method provided in an embodiment of the present invention
The flow diagram of voltage time and area between pulse signal；
Fig. 4 is the schematic diagram of inverter output voltage detection device provided in an embodiment of the present invention；
Fig. 5 is the schematic diagram of inverter output voltage detection device provided in an embodiment of the present invention.
Specific embodiment
In order to which the objects, technical solutions and advantages of the embodiment of the present invention are more clearly understood, below in conjunction with attached drawing and reality
Example is applied, the embodiment of the present invention is further elaborated.It should be appreciated that specific embodiment described herein is only used to
It explains the embodiment of the present invention, is not intended to limit the present invention embodiment.
The embodiment of the present invention proposes that a kind of inverter output voltage detection method seeks average voltage between sampling trigger pulse
Scheme.As shown in Figure 1, the flow diagram of inverter output voltage detection method provided in an embodiment of the present invention, this method
Specifically includes the following steps:
Step S1: sampling start pulse signal is clapped according to upper one and current clap samples start pulse signal, integral calculation phase
Time interval between adjacent two samplings start pulse signal, and clapped according to upper one and sample start pulse signal, currently clap sampling
Start pulse signal and high-order information of voltage, the two neighboring voltage time face sampled between start pulse signal of integral calculation
Product.
In this step, sampling start pulse signal is clapped according to upper one and current clap samples start pulse signal, integrating meter
The time interval between two neighboring sampling start pulse signal is calculated, as shown in Fig. 2, can be obtained by following steps:
Step S111: when receiving upper bat sampling start pulse signal, first time integral subelement is resetted simultaneously
Starting integral is cumulative；
Step S112: when receiving current bat sampling start pulse signal, the first time integral subelement is stored
Integral accumulating values, and using first time integral subelement integral accumulating values believe as two neighboring sampling trigger pulse
Time interval between number.
Pulse duty factor adjusts one times or twice of frequency for switching frequency, routine in electric machine control system under normal conditions
Inverter switching frequency is in 200Hz to 20kHz range.During pulse duty factor adjusts, inverter given voltage is remained unchanged.
In view of the Sinc in sampling trigger pulse and demodulating unit3Filter output sampled point not necessarily matches, and between the sampling time
Every aliquant, the embodiment of the present invention optimizes voltage time integral, as shown in figure 3, above-mentioned clap sampling touching according to upper one
Send out pulse signal and it is current clap sampling start pulse signal, when voltage between the two neighboring sampling start pulse signal of integral calculation
Between area, can specifically be obtained by following steps:
Step S121: when receiving upper bat sampling start pulse signal, by the second time integral subelement and voltage
Time and area integral subelement starting integral is cumulative (to be needed before the second time integral subelement and voltage time integral unit starting
It resets respectively).
Step S122: Sinc is being received each time3Filter sample completes signal or current clap samples trigger pulse
When signal, the integral accumulating values of the second time integral subelement are stored, and the integral of the second time integral subelement is added up
Numerical value is as the subdivision period；Segmenting the period is sampling start pulse signal and Sinc3Signal is completed in filter output sampling
Between time interval, two Sinc3Time interval or Sinc between signal are completed in filter output sampling3Filter output
Signal and the current time interval clapped between sampling start pulse signal are completed in sampling.
Step S123: by the integral accumulating values of the second time integral subelement and Sinc is received3Filter sample is complete
Voltage time and area of the product of instantaneous voltage when at signal or sampling start pulse signal as the subdivision period.
Step S124: the voltage time and area for segmenting the period is added in voltage time and area integral subelement, directly
Start pulse signal is sampled to current clap is received, obtains the voltage time and area between two neighboring sampling start pulse signal.
Step S2: according to the time interval and voltage time and area between two neighboring sampling start pulse signal, phase is determined
Sampled voltage average values between adjacent two samplings start pulse signals, and by the sampling between two neighboring sampling start pulse signal
The average value of voltage is as the output voltage currently clapped.
Inverter output voltage detection method provided in an embodiment of the present invention is executed respectively on the basis of sampling trigger pulse
Inter-pulse time interval integral and voltage time and area integral, the two, which is divided by, to be sought sampling the average voltage between trigger pulse.
Sampling error caused by this embodiment reduces being mismatched due to sampled point is avoided the transmitting of sampling pulse time interval, improved
Module versatility.
The embodiment of the present invention also provides a kind of inverter output voltage detection device, as shown in figure 4, inverter output electricity
Pressure detection device includes sampling unit 11, modulation unit 12 and demodulating unit 13, and modulation unit 12 includes numerical model analysis Δ Σ core
Piece, demodulating unit 13 include voltage time integral unit and output voltage acquiring unit, in which:
Sampling unit proportionally converts simulation high voltage signal to for detecting inverter output voltage instantaneous value
Meet the simulation low voltage signal of 12 level demand of modulation unit.Specifically, sampling unit 11 includes output voltage detecting circuit,
It can be realized using divider resistance R1, R2, R3 and R4 in output voltage detecting circuit, for detecting first input end Uin1With
Second input terminal Uin2Voltage deviation, first input end Uin1With the second input terminal Uin2Meet the inspection to any phase or line voltage
It surveys, and does not limit voltage shape, be suitable for two level or more level differential voltage signals.
Specifically, in the first output end Uin1It is connected to the output end of the first phase of inverter, second output terminal Uin2It is connected to
When inverter busbar voltage cathode, then sampler 11 detects the output phase voltage of the first phase；In the first output end Uin1It is connected to inverse
Become the output end of the first phase of device, second output terminal Uin2It is connected to the output end of the second phase of inverter, then the detection of sampler 11 first
The mutually output line voltage alternate with second.
Wherein, the first phase can be any phase in U, V or W three-phase, and the second phase can be in the other two-phase of non-first phase
Any phase.Such as the first output end Uin1It is connected to inverter U phase output terminal, second output terminal Uin2It is connected to inverter bus
Voltage cathode, the then detection of sampler 11 export U phase voltage；Such as the first output end Uin1It is connected to inverter U phase output terminal, second
Output end Uin2It is connected to inverter V phase output terminal, then the alternate line voltage of module detection output U, V.
Output is isolated for that will simulate low voltage signal high-speed transitions into data bit stream in above-mentioned modulation unit 12, specifically
The completion of numerical model analysis Δ Σ chip can be used, inverter uses pulse width modulating technology, by adjusting exporting in carrier cycle
Voltage Pulse Width realizes expectation voltage output, and voltage change is exceedingly fast at porch, conventional within 1 microsecond.Conventional
Successive approximation sampling plan pays close attention to electrical voltage point instantaneous value, cannot accurately obtain voltage time face during quick changes in voltage
Product.Novelty of the embodiment of the present invention introduces numerical model analysis Δ Σ chip sampling plan, and the program can be obtained accurately in the sampling time
Average voltage, even if during quick changes in voltage.Numerical model analysis Δ Σ chip sample mode down-sampling time interval
According to the Sinc in 12 clock of modulation unit and demodulating unit3Filter extraction yield obtains.Such as 20MHz clock modulation unit 12
In conjunction with the Sinc of 32 extraction yields3Filter, it is 1.6 μ s that systematic sampling point, which exports time interval,.
Above-mentioned demodulating unit, for extracting high-order information of voltage from data bit stream, and in FPGA (Field-
Programmable Gate Array, field programmable gate array) in execute.
Above-mentioned voltage time integral unit, for clapping sampling start pulse signal and current bat sampling triggering arteries and veins according to upper one
Signal, the time interval between the two neighboring sampling start pulse signal of integral calculation are rushed, and claps sampling triggering arteries and veins according to upper one
Rush signal, current clap samples start pulse signal and high-order information of voltage, the two neighboring sampling trigger pulse letter of integral calculation
Voltage time and area between number.
Above-mentioned voltage time integral unit includes that integral subelement, first time integral subelement are receiving at the first time
Upper one resets when clapping sampling start pulse signal, and stores integral accumulation when receiving current bat sampling start pulse signal
And the time interval between the two neighboring sampling start pulse signal of integral calculation.
Above-mentioned voltage time integral unit further includes that the second time integral subelement and voltage time and area integrate subelement,
Wherein:
Second time integral subelement, for when receiving upper bat sampling start pulse signal, starting integral to be cumulative
(needing to reset before activation)；And Sinc is being received each time3Filter sample completes signal or current clap samples triggering arteries and veins
When rushing signal, the integral accumulating values of the second time integral subelement are stored, and the integral of the second time integral subelement is tired out
For addend value as the subdivision period, the subdivision period is sampling start pulse signal and Sinc3Letter is completed in filter output sampling
Time interval between number, two Sinc3Time interval or Sinc between signal are completed in filter output sampling3Filter is defeated
Signal and the current time interval clapped between sampling start pulse signal are completed in sampling out.
Voltage time and area integrates subelement, for when receiving upper bat sampling start pulse signal, starting to be integrated
Cumulative (needing to reset before activation), and Sinc is being received each time3Filter sample completes signal or current clap samples touching
When sending out pulse signal, by the integral accumulating values of the second time integral subelement and Sinc is received3Filter sample completes letter
Number or current instantaneous voltage when clapping sampling start pulse signal product as the voltage time and area for segmenting the period；
And the voltage time and area for segmenting the period adds up, start pulse signal is sampled until receiving current clap, is obtained adjacent
Voltage time and area between two sampling start pulse signals.
Above-mentioned output voltage acquiring unit, for according to the time interval and electricity between two neighboring sampling start pulse signal
Time and area is pressed, determines the sampled voltage average value between two neighboring sampling start pulse signal, and two neighboring sampling is touched
The sampled voltage average value between pulse signal is sent out as the output voltage currently clapped.
The embodiment of the present invention also provides a kind of inverter output voltage detection device 6, as shown in figure 5, the inverter exports
Voltage detection device 6 includes storage unit 61 and processing unit 62, is stored with and can execute in processing unit 62 in storage unit 61
Computer program, and when processing unit 62 executes the computer program, realizes inverter output voltage inspection as described above
The step of survey method.The inverter in inverter output voltage detection device 6 and above-mentioned Fig. 1 corresponding embodiment in the present embodiment
Method for detecting output voltage belongs to same design, and specific implementation process is shown in corresponding embodiment of the method in detail, and method is implemented
Technical characteristic in example is corresponding applicable in this apparatus embodiments, and which is not described herein again.
The embodiment of the present invention also provides a kind of storage medium, and computer program, computer program are stored on storage medium
When being executed by processor, the step of realizing inverter output voltage detection method as described above.Storage medium in the present embodiment
Belong to same design with the inverter output voltage detection method in above-mentioned Fig. 1 corresponding embodiment, specific implementation process is detailed
See corresponding embodiment of the method, and the technical characteristic in embodiment of the method is corresponding applicable in this apparatus embodiments, here not
It repeats again.
The foregoing is only a preferred embodiment of the present invention, but scope of protection of the present invention is not limited thereto,
In the technical scope disclosed by the present invention, any changes or substitutions that can be easily thought of by anyone skilled in the art,
It should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with scope of protection of the claims
Subject to.
Claims (10)
1. a kind of inverter output voltage detection method characterized by comprising
Sampling start pulse signal is clapped according to upper one and current clap samples start pulse signal, the two neighboring sampling touching of integral calculation
The time interval between pulse signal is sent out, and claps sampling start pulse signal, current bat sampling start pulse signal according to upper one
And high-order information of voltage, the two neighboring voltage time and area sampled between start pulse signal of integral calculation；
According to the time interval and voltage time and area between the two neighboring sampling start pulse signal, two neighboring adopt is determined
Sampled voltage average value between sample start pulse signal, and by it is described it is two neighboring sampling start pulse signal between sampled voltage
Average value as the output voltage currently clapped.
2. inverter output voltage detection method according to claim 1, which is characterized in that described clap according to upper one samples
Start pulse signal and current clap sample start pulse signal, the time between the two neighboring sampling start pulse signal of integral calculation
Interval, comprising:
When receiving upper bat sampling start pulse signal, first time integral subelement is resetted and starts integral and is added up；
When receiving current bat sampling start pulse signal, the integral cumulative number of the first time integral subelement is stored
Value, and using the integral accumulating values of first time integral subelement as between the two neighboring sampling start pulse signal
Time interval.
3. inverter output voltage detection method according to claim 1, which is characterized in that described clap according to upper one samples
Start pulse signal and current clap sample start pulse signal, the voltage between the two neighboring sampling start pulse signal of integral calculation
Time and area, comprising:
When receiving upper bat sampling start pulse signal, the second time integral subelement and voltage time and area are integrated into son
Unit starting integral is cumulative；
Sinc is being received each time3When filter sample completes signal or current bat sampling start pulse signal, described in storage
The integral accumulating values of second time integral subelement, and using the integral accumulating values of the second time integral subelement as
Segment the period；The subdivision period is upper bat sampling start pulse signal and Sinc3Letter is completed in filter output sampling
Time interval between number, two Sinc3Time interval or Sinc between signal are completed in filter output sampling3Filter is defeated
Signal and the current time interval clapped between sampling start pulse signal are completed in sampling out；
By the integral accumulating values of the second time integral subelement and receive the Sinc3Filter sample completes signal
Or voltage time face of the current product for clapping instantaneous voltage when sampling start pulse signal as the subdivision period
Product；
And the voltage time and area of the subdivision period is added in voltage time and area integral subelement, until receiving
Sampling start pulse signal is clapped to current, obtains the voltage time and area between the two neighboring sampling start pulse signal.
4. a kind of inverter output voltage detection device, which is characterized in that including sampling unit, modulation unit and demodulating unit,
The modulation unit includes numerical model analysis Δ Σ chip, and the demodulating unit includes that voltage time integral unit and output voltage obtain
Take unit, in which:
The sampling unit, for detecting inverter output voltage instantaneous value；
The numerical model analysis Δ Σ chip, for the analog signal of the inverter output voltage instantaneous value to be converted to data bit
Stream；
The demodulating unit, for extracting high-order information of voltage from the data bit stream；
The voltage time integral unit, for clapping sampling start pulse signal and current bat sampling trigger pulse letter according to upper one
Number, the time interval between the two neighboring sampling start pulse signal of integral calculation, and sampling trigger pulse letter is clapped according to upper one
Number, current clap sampling start pulse signal and the high-order information of voltage, the two neighboring sampling trigger pulse of integral calculation are believed
Voltage time and area between number；
The output voltage acquiring unit, for according to the time interval and electricity between the two neighboring sampling start pulse signal
Time and area is pressed, determines the sampled voltage average value between the two neighboring sampling start pulse signal, and by described adjacent two
Sampled voltage average value between a sampling start pulse signal is as the output voltage currently clapped.
5. inverter output voltage detection device according to claim 4, which is characterized in that the voltage time integral list
First includes that integral subelement, the first time integral subelement are receiving upper bat sampling start pulse signal at the first time
Shi Fuwei, and receive it is current clap sampling start pulse signal when storage integral accumulation and integral calculation is two neighboring adopts
Time interval between sample start pulse signal.
6. inverter output voltage detection device according to claim 5, which is characterized in that the voltage time integral list
Member further includes the second time integral subelement and voltage time and area integral subelement, and the demodulating unit includes Sinc3Filtering
Device, in which:
The second time integral subelement, it is cumulative for when receiving upper bat sampling start pulse signal, starting integral,
And Sinc is being received each time3When filter sample completes signal or current bat sampling start pulse signal, described in storage
The integral accumulating values of second time integral subelement, and using the integral accumulating values of the second time integral subelement as
Segment the period；The subdivision period is upper bat sampling start pulse signal and Sinc3Letter is completed in filter output sampling
Time interval between number, two Sinc3Time interval or the Sinc between signal are completed in filter output sampling3Filtering
Signal and the current time interval clapped between sampling start pulse signal are completed in device output sampling；
The voltage time and area integrates subelement, for when receiving upper bat sampling start pulse signal, starting to be integrated
It is cumulative, and Sinc is being received each time3When filter sample completes signal or current bat sampling start pulse signal, by institute
It states the integral accumulating values of the second time integral subelement and receives the Sinc3Filter sample completes signal or current
Clap voltage time and area of the product of instantaneous voltage when sampling start pulse signal as the subdivision period；And by institute
The voltage time and area for stating the subdivision period is added in the voltage time integral unit, samples touching until receiving current clap
Pulse signal is sent out, the voltage time and area between the two neighboring sampling start pulse signal is obtained.
7. inverter output voltage detection device according to claim 6, which is characterized in that the demodulating unit is at the scene
It is executed in programmable gate array FPGA.
8. inverter output voltage detection device according to claim 4, which is characterized in that the sampling unit includes defeated
Voltage detecting circuit out, the output voltage detecting circuit are used to detect the voltage deviation of first input end and the second input terminal,
Include:
It is connected to the output end of the first phase of inverter in the first input end, the second input terminal is connected to inverter busbar voltage
When cathode, then the output phase voltage of the first phase is detected；The output end of the first phase of inverter, institute are connected in the first input end
The output end that the second input terminal is connected to the second phase of inverter is stated, then detects the first phase output line voltage alternate with second；Institute
Stating the first phase is any phase in U, V or W three-phase, and second phase is any phase in the other two-phase of non-first phase.
9. a kind of inverter output voltage detection device, which is characterized in that including storage unit and processing unit, the storage is single
The computer program that can be executed in the processing unit is stored in member, and when the processing unit execution computer program
The step of realizing inverter output voltage detection method as claimed in any one of claims 1-3.
10. a kind of storage medium, which is characterized in that be stored with computer program, the computer program on the storage medium
When being executed by processor, realize as described in any one of claim 1-3 the step of inverter output voltage detection method.
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