CN109560100B - 一种正装GaN基LED微显示器件及其制作方法 - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 36
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 26
- 239000010980 sapphire Substances 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 239000003292 glue Substances 0.000 claims abstract description 25
- 238000002955 isolation Methods 0.000 claims abstract description 25
- 238000005530 etching Methods 0.000 claims description 34
- 238000000034 method Methods 0.000 claims description 30
- 239000002184 metal Substances 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 19
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 18
- 229910052681 coesite Inorganic materials 0.000 claims description 13
- 229910052906 cristobalite Inorganic materials 0.000 claims description 13
- 238000000151 deposition Methods 0.000 claims description 13
- 239000000377 silicon dioxide Substances 0.000 claims description 13
- 229910052682 stishovite Inorganic materials 0.000 claims description 13
- 229910052905 tridymite Inorganic materials 0.000 claims description 13
- 238000002347 injection Methods 0.000 claims description 9
- 239000007924 injection Substances 0.000 claims description 9
- 238000005516 engineering process Methods 0.000 claims description 7
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 238000009616 inductively coupled plasma Methods 0.000 claims description 6
- 238000002207 thermal evaporation Methods 0.000 claims description 6
- 235000012239 silicon dioxide Nutrition 0.000 claims description 5
- 238000001039 wet etching Methods 0.000 claims description 5
- 238000001704 evaporation Methods 0.000 claims description 4
- 239000000243 solution Substances 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 238000005566 electron beam evaporation Methods 0.000 claims description 3
- 238000000227 grinding Methods 0.000 claims description 3
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- 238000004528 spin coating Methods 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000002310 reflectometry Methods 0.000 description 4
- 101100442490 Artemisia annua DBR2 gene Proteins 0.000 description 3
- 239000000945 filler Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- XZWYZXLIPXDOLR-UHFFFAOYSA-N metformin Chemical compound CN(C)C(=N)NC(N)=N XZWYZXLIPXDOLR-UHFFFAOYSA-N 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
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Abstract
本发明属于LED微显示屏技术领域,提供一种正装GaN基LED微显示器件及其制作方法,包括蓝宝石衬底,在蓝宝石衬底正面设有若干个呈阵列分布的LED微显示单元,LED微显示单元间通过绝缘SU胶隔开;LED微显示单元包括位于蓝宝石衬底上的缓冲层、N‑GaN层、多量子阱、P‑GaN层和透明导电层,在N‑GaN层上设有N电极,在N电极和绝缘SU胶上设有SiO绝缘层,SiO绝缘层上P电极,P电极穿过SiO绝缘层与透明导电层接触;在蓝宝石衬底背面设有布拉格反射镜DBR;本发明的微显示器件在LED单元隔离槽内填充较厚的绝缘SU8胶,避免了因电极应力因素导致的断路,保证了LED微显示器件的稳定性;同时背面采用布拉格反射镜DBR,使得器件的出光率更好。
Description
技术领域
本发明涉及一种LED微显示器件及其制作方法,尤其是一种正装GaN基LED微显示器件及其制作方法,属于LED微显示屏技术领域。
背景技术
随着市场经济的不断发展,人们对LED显示屏的需求也不断在增长着。LED显示技术的快速进步与成熟以及客户要求的提高,微间距LED显示屏的点间距越来越小。它广泛应用在视频会议、指挥调度中心、安防监控中心、广电传媒等领域,微间距LED显示屏的高清显示、高刷新频率、无缝拼接、良好的散热系统、拆装方便灵活、节能环保等特点已经被广大行业用户熟知。市场对LED的亮度追求是永恒的话题,LED微显示器件也是,同时微间距LED器件还存在诸多问题,比如它的稳定性差,单元LED隔离沟槽处的P电极和N电极连接线很容易断裂,常规工艺的LED隔离沟槽用SiO2绝缘,厚度薄且脆弱,也存在漏电隐患。
发明内容
本发明的目的在于克服现有的缺陷,提供一种正装GaN基LED微显示器件及其制作方法,该微显示器件不需要额外的驱动电路,成本低;背面采用布拉格反射镜DBR,使得器件的出光率更好;同时在单元LED隔离沟槽内通过填充较厚的绝缘SU8胶,避免了因电极应力因素导致的断路,保证了LED微显示器件的稳定性。
为实现以上技术目的,本发明采用的技术方案是:一种正装GaN基LED微显示器件,包括蓝宝石衬底,其特征在于,在所述蓝宝石衬底正面设有若干个呈阵列分布的LED微显示单元,所述LED微显示单元间通过绝缘SU胶隔开;所述LED微显示单元包括位于蓝宝石衬底上的缓冲层、N-GaN层、多量子阱、P-GaN层和透明导电层,在所述N-GaN层上设有N电极,在所述N电极和绝缘SU胶上设有SiO绝缘层,SiO绝缘层上P电极,所述P电极穿过SiO绝缘层与透明导电层接触;在所述蓝宝石衬底背面设有布拉格反射镜DBR。
进一步地,呈阵列分布的LED微显示单元中的每行或列P电极均连在一起,每列或行N电极均连在一起,且每行或列P电极与多列或行N电极通过SiO绝缘层隔离,每列或行N电极与多行或列P电极通过SiO绝缘层隔离。
进一步地,所述布拉格反射镜DBR包括多组交替分布的SiO层和TiO层。
为了进一步实现以上技术目的,本发明还提出一种正装GaN基LED微显示器件的制作方法,其特征是,包括如下步骤:
步骤一. GaN基外延层的制作:采用GaN基LED外延片生长工艺,在蓝宝石衬底上依次生长缓冲层、N-GaN层、多量子阱和P-GaN层,完成GaN基外延层的制作;
步骤二. 深沟槽刻蚀:通过电子束蒸发技术,在GaN基外延层上蒸镀透明导电层;
在第一图形化掩膜板的遮挡下,依次刻蚀透明导电层、P-GaN层、多量子阱和N-GaN层,暴露部分N-GaN层,得到深沟槽;
步骤三. 隔离槽刻蚀:在第二图形化掩膜板的遮挡下,采用电感耦合等离子体刻蚀工艺,继续刻蚀暴露出来的部分N-GaN层,直至刻蚀深入到蓝宝石衬底,得到用于将LED微显示单元分隔开的隔离槽;
步骤四. 沉积绝缘SU胶:采用非真空基旋涂技术,在隔离槽中沉积绝缘SU胶;
步骤五. 制作N电极:采用热蒸发方法,在暴露出来的N-GaN层上淀积金属层,对金属层进行刻蚀,得到多条位于N-GaN层上N电极;
步骤六. 制作SiO绝缘层:采用PECVD方法,在透明导电层、N电极和绝缘SU胶上淀积形成SiO绝缘层;
步骤七. 制作P电极注入窗口:对SiO绝缘层进行刻蚀,形成多个阵列排布分的P电极注入窗口;
步骤八. 制作P电极:采用热蒸发方法,在P电极注入窗口内及SiO绝缘层上淀积金属层,对金属层进行刻蚀,形成多条与N电极相垂直分布的P电极;
步骤九. 制作布拉格反射镜DBR:对蓝宝石衬底背面进行研磨减薄,然后在蓝宝石衬底背面采用磁控溅射的方法蒸镀布拉格反射镜DBR,完成LED微显示器件的制作。
进一步地,所述步骤二中,深沟槽刻蚀的具体过程为:
在第一图形化掩膜板的遮挡下,对透明导电层进行湿法蚀刻,并在氮气环境中对透明导电层进行快速退火,得到呈阵列分布的透明导电层;
再采用电感耦合等离子体刻蚀工艺,继续依次刻蚀P-GaN层、多量子阱和N-GaN层,暴露部分N-GaN层。
进一步地,所述步骤三中,对透明导电层进行湿法蚀刻,选用的腐蚀液为FeCl溶液。
进一步地,形成N电极和P电极的金属层为Cr/Au金属。
进一步地,所述步骤五中,所述隔离槽的高度为4±0.5um,隔离槽内绝缘SU8胶的厚度为4±0.5um;所述深沟槽的高度为1.5±0.5um。
从以上描述可以看出,本发明的有益效果在于:
1)背面采用多角度发光的布拉格反射镜DBR,由低折射率材料SiO2和高折射率材料TiO2材料交替生长,总膜层在13-48层不等;并且在0°~60°入射角度出发,在可见光范围390-770nm波长段反射率≥99%,其他波段反射率很小。这样不同角度均提高了LED显示器件的发光亮度,提高了对比度,反光特性更好;
2)每个发光单元之间用防腐蚀性好、透明率高、绝缘性好、导热性能好、热稳定性能好的填充物SU8胶来隔离,SU8厚度正好沉积到隔离槽内,厚度4±0.5um,取代现有的用PECVD沉积10000A的SiO2,大大降低了P电极和N电极连接线在沟槽处出现断路的概率,使用填充物SU8胶可以最小化PECVD沉积过程中发生的潜在损伤,降低了漏电的概率,使得LED显示器件稳定新更好;
3)成行排列的多条P电极,每条P电极分别与位于该行的所有发光单元的ITO透明导电层电性连接;成列排列的多条N电极,每条N电极分别与位于该列的LED发光单元的N-GaN层电性连接,所述SiO2绝缘层分割与所述P电极和N电极之间。
附图说明
图1为本发明实施例1中在蓝宝石衬底上制作外延层和透明导电层后的剖视结构示意图。
图2为本发明实施例1中形成深沟槽后的剖视结构示意图。
图3为本发明实施例1中形成隔离槽后的剖视结构示意图。
图4为本发明实施例1中在隔离槽内填充绝缘SU8胶后的剖视结构示意图。
图5为本发明实施例1中形成条形N电极后的剖视结构示意图。
图6为本发明实施例1中SiO2绝缘层刻蚀后的剖视结构示意图。
图7为本发明实施例1中形成条形P电极和布拉格反射镜DBR后的剖视结构示意图。
图8为本发明实施例1中若干个呈阵列分布的LED微显示单元的俯视结构示意图。
附图标记说明:1-LED微显示单元、2-布拉格反射镜DBR、3-蓝宝石衬底、4-缓冲层、5- N-GaN层、6-多量子阱、7- P-GaN层、8-透明导电层、9-绝缘SU8胶、10-SiO2绝缘层、11-N电极、12-P电极、13-隔离槽和14-深沟槽。
具体实施方式
下面结合具体附图和实施例对本发明作进一步说明。
实施例1:如图7和图8所示,一种正装GaN基LED微显示器件,包括蓝宝石衬底3,在所述蓝宝石衬底3正面设有若干个呈阵列分布的LED微显示单元1;
所述LED微显示单元1包括位于蓝宝石衬底3上的缓冲层4、N-GaN层5、多量子阱6、P-GaN层7和透明导电层8,透明导电层8包括ITO,在所述N-GaN层5上设有N电极11,在所述N电极11和绝缘SU8胶9上设有SiO2绝缘层10,SiO2绝缘层10上P电极12,所述P电极12穿过SiO2绝缘层10与透明导电层8接触;
在所述蓝宝石衬底1背面设有布拉格反射镜DBR 2;所述布拉格反射镜DBR2包括多组交替分布的SiO2层和TiO2层,低折射率材料SiO2层和高折射率材料TiO2层交替生长,总膜层在13-48层之间;并且在0°~60°入射角度,在可见光范围390-770nm波长段反射率≥99%,其他波段反射率很小。这样不同角度均提高了LED显示器件的发光亮度,提高了对比度,反光特性更好;
所述LED微显示单元1间通过绝缘SU8胶9隔开;绝缘SU8胶9具有防腐蚀性好、透明率高、绝缘性好、导热性能好、热稳定性能好等优良性能,绝缘SU8胶9正好沉积到隔离槽13内,厚度约为4±0.5um,取代现有的用PECVD沉积10000A的SiO2,来隔离LED微显示单元1,大大降低了P电极12和N电极11连接线在隔离槽13处出现断路的概率,同时降低了漏电的概率,使得LED显示器件稳定新更好;
呈阵列分布的LED微显示单元1中的每行P电极12均连在一起,每列N电极11均连在一起,且每行P电极12与多列N电极11通过SiO2绝缘层10隔离,每列N电极11与多行P电极12通过SiO2绝缘层10隔离;成行排列的多条P电极12,每条P电极12分别与位于该行的所有LED微显示单元1的ITO透明导电层8电性连接;成列排列的多条N电极11,每条N电极11分别与位于该列的LED微显示单元1的N-GaN层5电性连接;
本实施例1中的N电极11和P电极12的行列可以互换。
如上实施例1一种正装GaN基LED微显示器件的制作方法,包括如下步骤:
如图1所示,步骤一. GaN基外延层的制作:采用GaN基LED外延片生长工艺,在蓝宝石衬底3上依次生长缓冲层4、N-GaN层5、多量子阱6和P-GaN层7,完成GaN基外延层的制作;
如图2所示,步骤二. 深沟槽刻蚀:通过电子束蒸发技术,在GaN基外延层上蒸镀透明导电层8;
在第一图形化掩膜板的遮挡下,依次刻蚀透明导电层8、P-GaN层7、多量子阱6和N-GaN层5,暴露部分N-GaN层5,得到深沟槽14;
所述步骤二中,深沟槽14刻蚀的具体过程为:
在第一图形化掩膜板的遮挡下,对透明导电层8进行湿法蚀刻,选用的腐蚀液为FeCl3溶液,并在氮气环境中对透明导电层8进行快速退火,得到呈阵列分布的透明导电层8;
再采用电感耦合等离子体刻蚀工艺,继续依次刻蚀P-GaN层7、多量子阱6和N-GaN层5,暴露部分N-GaN层5;
如图3所示,步骤三. 隔离槽刻蚀:在第二图形化掩膜板的遮挡下,采用电感耦合等离子体刻蚀工艺,继续刻蚀暴露出来的部分N-GaN层5,直至刻蚀深入到蓝宝石衬底3,得到用于将多个LED微显示单元1分隔开的隔离槽13;
本实施例中,所述隔离槽13的高度为4±0.5um,隔离槽13内绝缘SU8胶9的厚度为4±0.5um;所述深沟槽14的高度为1.5±0.5um;
如图4所示,步骤四. 沉积绝缘SU8胶9:采用非真空基旋涂技术,在隔离槽13中沉积绝缘SU8胶9;
如图5所示,步骤五. 制作N电极:采用热蒸发方法,在暴露出来的N-GaN层5上淀积金属层,对金属层进行刻蚀,得到多条位于N-GaN层5上N电极11;
如图6所示,如图步骤六. 制作SiO2绝缘层10:采用PECVD方法,在透明导电层8、N电极11和绝缘SU8胶9上淀积形成SiO2绝缘层10;
步骤七. 制作P电极注入窗口:对SiO2绝缘层10进行刻蚀,形成多个阵列排布分的P电极注入窗口;
如图7所示,步骤八. 制作P电极:采用热蒸发方法,在P电极注入窗口内及SiO2绝缘层10上淀积金属层,对金属层进行刻蚀,形成多条与N电极11相垂直分布的P电极12;
本实施例中形成N电极11和P电极12的金属层为Cr/Au金属;且在P电极12的金属层上还可制作钝化层,用于提高LED微显示屏的可靠性;
步骤九. 制作布拉格反射镜DBR:对蓝宝石衬底3背面进行研磨减薄,然后在蓝宝石衬底3背面采用磁控溅射的方法蒸镀布拉格反射镜DBR2,完成LED微显示器件的制作;
本实施例中N电极11和P电极12的均通过LED微显示器件的边缘进行打线引出。
以上对本发明及其实施方式进行了描述,该描述没有限制性,附图中所示的也只是本发明的实施方式之一,实际的结构并不局限于此。如果本领域的普通技术人员受其启示,在不脱离本发明创造宗旨的情况下,不经创造性的设计出与该技术方案相似的结构方式及实施例,均应属于本发明的保护范围。
Claims (5)
1.一种正装GaN基LED微显示器件的制作方法,其特征是,包括如下步骤:
步骤一. GaN基外延层的制作:采用GaN基LED外延片生长工艺,在蓝宝石衬底(3)上依次生长缓冲层(4)、N-GaN层(5)、多量子阱(6)和P-GaN层(7),完成GaN基外延层的制作;
步骤二. 深沟槽(14)刻蚀:通过电子束蒸发技术,在GaN基外延层上蒸镀透明导电层(8);
在第一图形化掩膜板的遮挡下,依次刻蚀透明导电层(8)、P-GaN层(7)、多量子阱(6)和N-GaN层(5),暴露部分N-GaN层(5),得到深沟槽(14);
步骤三. 隔离槽(13)刻蚀:在第二图形化掩膜板的遮挡下,采用电感耦合等离子体刻蚀工艺,继续刻蚀暴露出来的部分N-GaN层(5),直至刻蚀深入到蓝宝石衬底(3),得到用于将LED微显示单元(1)分隔开的隔离槽(13);
步骤四. 沉积绝缘SU8胶(9):采用非真空基旋涂技术,在隔离槽(13)中沉积绝缘SU8胶(9);
步骤五. 制作N电极:采用热蒸发方法,在暴露出来的N-GaN层(5)上淀积金属层,对金属层进行刻蚀,得到多条位于N-GaN层(5)上N电极(11);
步骤六. 制作SiO 2 绝缘层(10):采用PECVD方法,在透明导电层(8)、N电极(11)和绝缘SU8胶(9)上淀积形成SiO 2 绝缘层(10);
步骤七. 制作P电极注入窗口:对SiO 2 绝缘层(10)进行刻蚀,形成多个阵列排布分的P电极注入窗口;
步骤八. 制作P电极:采用热蒸发方法,在P电极注入窗口内及SiO 2 绝缘层(10)上淀积金属层,对金属层进行刻蚀,形成多条与N电极(11)相垂直分布的P电极(12);
步骤九. 制作布拉格反射镜DBR:对蓝宝石衬底(3)背面进行研磨减薄,然后在蓝宝石衬底(3)背面采用磁控溅射的方法蒸镀布拉格反射镜DBR(2),完成LED微显示器件的制作。
2.根据权利要求1所述的一种正装GaN基LED微显示器件的制作方法,其特征在于,所述步骤二中,深沟槽(14)刻蚀的具体过程为:
在第一图形化掩膜板的遮挡下,对透明导电层(8)进行湿法蚀刻,并在氮气环境中对透明导电层(8)进行快速退火,得到呈阵列分布的透明导电层(8);
再采用电感耦合等离子体刻蚀工艺,继续依次刻蚀P-GaN层(7)、多量子阱(6)和N-GaN层(5),暴露部分N-GaN层(5)。
3.根据权利要求1所述的一种正装GaN基LED微显示器件的制作方法,其特征在于,所述步骤二中,对透明导电层(8)进行湿法蚀刻,选用的腐蚀液为FeCl 3 溶液。
4.根据权利要求1所述的一种正装GaN基LED微显示器件的制作方法,其特征在于,形成N电极(11)和P电极(12)的金属层为Cr或Au金属。
5.根据权利要求1所述的一种正装GaN基LED微显示器件的制作方法,其特征在于,所述步骤四中,所述隔离槽(13)的高度为4±0.5um,隔离槽(13)内绝缘SU8胶(9)的厚度为4±0.5um;所述深沟槽(14)的高度为1.5±0.5um。
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