CN109546978A - A kind of current detection circuit of loudspeaker - Google Patents
A kind of current detection circuit of loudspeaker Download PDFInfo
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- CN109546978A CN109546978A CN201910035468.7A CN201910035468A CN109546978A CN 109546978 A CN109546978 A CN 109546978A CN 201910035468 A CN201910035468 A CN 201910035468A CN 109546978 A CN109546978 A CN 109546978A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
- H03F3/2175—Class D power amplifiers; Switching amplifiers using analogue-digital or digital-analogue conversion
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
- H03F3/2178—Class D power amplifiers; Switching amplifiers using more than one switch or switching amplifier in parallel or in series
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Abstract
The current detection circuit that the present invention discloses a kind of loudspeaker includes: the first detection resistance, the second detection resistance, sampling selection circuit, input selection circuit, sampling hold circuit and conversion circuit.The present invention is located at positive half period or negative half-cycle by the sampling selection circuit and the input selection circuit, according to the potential difference of the output stage VOP and the output stage VON, and selection samples the voltage at corresponding detection resistance both ends;Later, the different potentials for the clock control signal that the present invention is exported according to the clock control circuit start the voltage for sampling corresponding detection resistance both ends or stop sampling and exporting the voltage of sampling;To realize the detection to loudspeaker electric current, and without cutting top distortion function to D-type audio power amplifier addition is anti-, the performance of D-type audio power amplifier ensure that;And the sampling hold circuit in the present invention exports framework using fully differential input, fully differential, counteracts influence of the voltage fluctuation of Power Groud PGND to sampled voltage accuracy.
Description
Technical field
The present invention relates to technical field of current detection more particularly to a kind of current detection circuits of loudspeaker.
Background technique
Currently, D-type audio power amplifier is widely used due to having the advantages that high-efficient, small and performance of generating heat is good
In the portable devices such as Baffle Box of Bluetooth and mobile phone.
But due to portable device pursuit is small and exquisite, internal loudspeaker cavity is smaller, so biggish in broadcast sound volume
When music, when especially big supper bass song, it is excessively high that loudspeaker cavity may be displaced excessive or loudspeaker temperature because of vibrating diaphragm
Reason and damage, so generally can give D-type audio power amplifier design current detection circuit, so as to according to loudspeaker electric current
Size control D-type audio power amplifier output electric current size, and then protect loudspeaker will not because vibrating diaphragm be displaced it is excessive or
Loudspeaker temperature is excessively high and damages.But when larger due to the output power of D-type audio power amplifier, it may occur that top phenomenon is cut,
The current potential of output stage VOP or the current potential of output stage VON may be continuous high electricity occur in several pulse-width modulation frequencies
Flat or low level, general electric current detecting method is difficult accurate detection and goes out loudspeaker electric current at this time, so usually requiring that D class audio frequency
Power amplifier cuts top distortion function plus anti-, i.e., actively limits the output power of D-type audio power amplifier, makes its output not
Cut top.
But top distortion function is cut plus anti-in D-type audio power amplifier, D-type audio power amplifier will be reduced
Output power, without playing the performance of D-type audio power amplifier to greatest extent.
Summary of the invention
In view of this, the embodiment of the present invention provides a kind of current detection circuit of loudspeaker, when solving to detect loudspeaker electric current,
The problem of sacrificing the performance of D-type audio power amplifier.
To achieve the above object, the embodiment of the present invention provides the following technical solutions:
A kind of current detection circuit of loudspeaker, suitable for the loudspeaker being connected with D-type audio power amplifier, comprising: first
Detection resistance, the second detection resistance sample selection circuit, input selection circuit, sampling hold circuit, clock control circuit and turn
Change circuit;Wherein:
One end of first detection resistance is connected with the first input end of the input selection circuit, and tie point is as institute
The first input end for stating the current detection circuit of loudspeaker, the low side NMOS with the output stage VON of the D-type audio power amplifier
The source electrode of transistor is connected;
One end of second detection resistance is connected with the second input terminal of the input selection circuit, and tie point is as institute
The second input terminal for stating the current detection circuit of loudspeaker, the low side NMOS with the output stage VOP of the D-type audio power amplifier
The source electrode of transistor is connected;
The other end and the input selection circuit of the other end of first detection resistance, second detection resistance
Third input terminal, be grounded;
First output end of the input selection circuit is connected with the first input end of the sampling hold circuit;It is described defeated
The second output terminal for entering selection circuit is connected with the second input terminal of the sampling hold circuit;
First output end of the sampling hold circuit is connected with the first input end of the conversion circuit, and the sampling is protected
The second output terminal for holding circuit is connected with the second input terminal of the conversion circuit;The Clock control end of the sampling hold circuit
It is connected with the output end of the clock control circuit;
Output end of the output end of the conversion circuit as the current detection circuit of the loudspeaker;
When three input terminals of the sampling selection circuit are separately connected output stage VOP, output stage VON and the first sampling
Clock;The output end of the sampling selection circuit is connected with the switch control terminal of the input selection circuit;
The sampling selection circuit is used for when the potential difference of output stage VOP and output stage VON are in positive half period, control
The first input end of the input selection circuit forms access, third input terminal and its second output terminal with second output terminal and is formed
Access;And when the potential difference of output stage VOP and output stage VON are in negative half-cycle, third input terminal and the first output are controlled
End forms access, the second input terminal and its second output terminal and forms access;
The sampling hold circuit is used for the clock control signal exported according to the clock control circuit, adopts described in sampling
Voltage between two output ends of sample selection circuit, alternatively, stopping sampling and by the voltage output sampled to the conversion
Circuit.
Optionally, the input selection circuit, comprising: first switch, second switch, third switch, the 4th switch and the
One control module;Wherein:
First input end of the input terminal of the first switch as the input selection circuit;The second switch it is defeated
Enter second input terminal of the end as the input selection circuit;The input of the input terminal of the third switch and the 4th switch
End is connected, third input terminal of the tie point as the input selection circuit;
The output end of the first switch is connected with the output end that the third switchs, and tie point is selected as the input
First output end of circuit;The output end of the second switch is connected with the output end of the 4th switch, and tie point is as institute
State the second output terminal of input selection circuit;
The control terminal of the first switch is connected with the control terminal of the 4th switch, tie point and first control module
First output end is connected;The control terminal of the second switch is connected with the control terminal that the third switchs, tie point and described the
The second output terminal of one control module is connected;
Switch control terminal of the input terminal of first control module as the input selection circuit.
Optionally, the sampling hold circuit, comprising: first switch branch, second switch branch, third switching branches,
4th switching branches, voice coil motor, the second control module, the identical first capacitor of capacitance and the second capacitor and capacitance are identical
Third capacitor and the 4th capacitor;Wherein:
The input terminal of the first switch branch is connected with the input terminal of the third switching branches, described in tie point conduct
The first input end of sampling hold circuit;
The input terminal of the second switch branch is connected with the input terminal of the 4th switching branches, described in tie point conduct
Second input terminal of sampling hold circuit;
First output end of the first switch branch is connected with one end of the third capacitor, adopts described in tie point conduct
First output end of sample holding circuit;
First output end of the 4th switching branches is connected with one end of the 4th capacitor, adopts described in tie point conduct
The second output terminal of sample holding circuit;
The other end, the other end of the 4th capacitor and the anode of the voice coil motor of the third capacitor, are grounded;
First output end of the second switch branch is connected with the first output end of the third switching branches, tie point
It is connected with the negative terminal of the voice coil motor;
One end of the first capacitor is connected with the second output terminal of the first switch branch;The first capacitor it is another
One end is connected with the second output terminal of the second switch branch;
One end of second capacitor is connected with the second output terminal of the third switching branches;Second capacitor it is another
One end is connected with the second output terminal of the 4th switching branches;
First control terminal of the first switch branch, the first control terminal of the second switch branch, the third are opened
The first control terminal for closing branch connect with the first control terminal of the 4th switching branches, and the of tie point and second control module
One output end is connected;
Second control terminal of the second switch branch is connected with the second control terminal of the third switching branches, tie point
It is connected with the second output terminal of second control module;
Second control terminal of the first switch branch is connected with the second control terminal of the 4th switching branches, tie point
It is connected with the third output end of second control module;
Clock control end of the input terminal of second control module as the sampling hold circuit.
Optionally, the first switch branch, comprising: the 5th switch and the 6th switch;Wherein:
Input terminal of the input terminal of 5th switch as the first switch branch, the output end of the 5th switch
It is connected with the input terminal of the 6th switch, second output terminal of the tie point as the first switch branch, the 6th switch
First output end of the output end as the first switch branch;
First control terminal of the control terminal of 5th switch as the first switch branch, the control of the 6th switch
Second control terminal of the end processed as the first switch branch.
Optionally, the second switch branch, comprising: the 7th switch and the 8th switch;Wherein:
Input terminal of the input terminal of 7th switch as the second switch branch, the output end of the 7th switch
It is connected with the input terminal of the 8th switch, second output terminal of the tie point as the second switch branch, the described 8th opens
First output end of the output end of pass as the second switch branch;
First control terminal of the control terminal of 7th switch as the second switch branch, the control of the 8th switch
Second control terminal of the end processed as the second switch branch.
Optionally, the third switching branches, comprising: the 9th switch and the tenth switch;Wherein:
Input terminal of the input terminal of 9th switch as the third switching branches, the output end of the 9th switch
It is connected with the input terminal of the tenth switch, second output terminal of the tie point as the third switching branches, the tenth switch
First output end of the output end as the third switching branches;
First control terminal of the control terminal of 9th switch as the third switching branches, the control of the tenth switch
Second control terminal of the end processed as the third switching branches.
Optionally, the 4th switching branches, comprising: the 11st switch and the 12nd switch;Wherein:
Input terminal of the input terminal as the 4th switching branches of 11st switch, the 11st switch it is defeated
Outlet is connected with the input terminal of the 12nd switch, second output terminal of the tie point as the 4th switching branches, and the described tenth
First output end of the output end of two switches as the 4th switching branches;
First control terminal of the control terminal of 11st switch as the 4th switching branches, the 12nd switch
Second control terminal of the control terminal as the 4th switching branches.
Optionally, the clock control circuit, comprising: the second sampling clock, the first counter, the second counter and third
Counter;Wherein:
Output end of the output end of second sampling clock as the clock control circuit;Second sampling clock
First input end be connected with first counter;Second input terminal of second sampling clock and second counter
It is connected;The third input terminal of second sampling clock is connected with the third counter.
Optionally, the conversion circuit is Integrated Derivative analog-digital converter.
Optionally, first detection resistance is equal with the resistance value of second detection resistance;First sampling clock
Frequency be 256 times of pulse-width modulation frequency of the current potential of the output stage VOP and the current potential of the output stage VON.
In terms of existing technologies, the present invention passes through the sampling selection circuit and the input selection circuit, according to
The potential difference of the output stage VOP and the output stage VON are located at positive half period or negative half-cycle, the corresponding detection electricity of selection sampling
Hinder the voltage at both ends;Later, the different potentials for the clock control signal that the present invention is exported according to the clock control circuit start
It samples the voltage at corresponding detection resistance both ends or stops sampling and exporting the voltage of sampling;To realize to loudspeaker electric current
Detection, and without cutting top distortion function to D-type audio power amplifier addition is anti-, it ensure that D-type audio power amplifier
Performance;And the sampling hold circuit in the present invention exports framework using fully differential input, fully differential, counteracts Power Groud PGND
Influence of the voltage fluctuation to sampled voltage accuracy.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of schematic diagram of current detection means disclosed by the embodiments of the present invention;
Fig. 2 is the waveform diagram of switch control signal Sample_selt in (VOP-VON) positive and negative half period;
Fig. 3 is a kind of schematic diagram of current detection means disclosed in another embodiment of the present invention;
Fig. 4 is a kind of schematic diagram of current detection means disclosed in another embodiment of the present invention;
Fig. 5 is the signal of the sampling hold circuit 220 in a kind of current detection means disclosed in another embodiment of the present invention
Figure.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing and specific real
Applying mode, the present invention is described in further detail.
In this application, the terms "include", "comprise" or any other variant thereof is intended to cover non-exclusive inclusion,
So that the process, method, article or equipment for including a series of elements not only includes those elements, but also including not having
The other element being expressly recited, or further include for elements inherent to such a process, method, article, or device.Do not having
There is the element limited in the case where more limiting by sentence "including a ...", it is not excluded that in the mistake including the element
There is also other identical elements in journey, method, article or equipment.
In order to sacrifice the performance of D-type audio power amplifier, the embodiment of the present invention when solving the problem of detection loudspeaker electric current
The current detection circuit for disclosing a kind of loudspeaker, suitable for the loudspeaker being connected with D-type audio power amplifier, as shown in Figure 1, this reality
Current detection circuit disclosed in example is applied to be connected with D-type audio power amplifier 600, loudspeaker 700;Depending on actual conditions, the loudspeaker
700 branch road can may also be in series with inductance L;Current detection circuit disclosed in the present embodiment includes: the first detection resistance
RSP, the second detection resistance RSN, sampling selection circuit 100, input selection circuit 200, sampling hold circuit 300, clock control
Circuit 500 and conversion circuit 800;Wherein:
One end of first detection resistance RSP is connected with the first input end of input selection circuit 200, described in tie point conduct
The first input end of the current detection circuit of loudspeaker, it is brilliant with the low side NMOS of the output stage VON of D-type audio power amplifier 600
The source electrode of body pipe is connected.
One end of second detection resistance RSN is connected with the second input terminal of input selection circuit 200, described in tie point conduct
Second input terminal of the current detection circuit of loudspeaker, it is brilliant with the low side NMOS of the output stage VOP of D-type audio power amplifier 600
The source electrode of body pipe is connected.
The third of the other end of first detection resistance RSP, the other end of the second detection resistance RSN and input selection circuit
Input terminal is grounded.
It should be noted that the first detection resistance RSP is equal with the resistance value of the second detection resistance RSN.
First output end of input selection circuit 200 is connected with the first input end of sampling hold circuit 300, input selection
The second output terminal of circuit 200 is connected with the second input terminal of sampling hold circuit 300.
First output end of sampling hold circuit 300 is connected with the first input end of conversion circuit 800, sampling hold circuit
300 second output terminal is connected with the second input terminal of conversion circuit 800, the Clock control end of the sampling hold circuit 300
It is connected with the output end of clock control circuit 500.
Output end of the output end of conversion circuit 800 as the current detection circuit of the loudspeaker.
Three input terminals of sampling selection circuit 100 are separately connected output stage VOP, output stage VON and the first sampling clock
400;The output end of sampling selection circuit 100 is connected with the switch control terminal of input selection circuit 200.
It should be noted that the frequency of the first sampling clock is the current potential and the output stage VON of the output stage VOP
256 times of the pulse-width modulation frequency of current potential can also carry out other settings according to specific application environment in practical application, this
Place is only a kind of example, is not limited to that, within the scope of protection of this application.
Optionally, conversion circuit 800 can be Integrated Derivative analog-digital converter, can also be using discrete device composition
It can be realized the circuit of gain enlarging function;In practical application, can depending on its specific application environment, if can be realized and this
The other embodiments of identical working principle are within the scope of protection of this application.
It should also be noted that, sampling hold circuit 300 has low-frequency filter characteristics, by output stage VOP and output stage VON
The radio-frequency component for sampling obtained voltage is filtered, and is then sent through conversion module 800, high-frequency noise is prevented to be folded into audio
The signal-to-noise ratio of the current detecting, -3dB frequency of sampling hold circuit 300 are reduced in range are as follows: f (- 3dB)=(fsw*C1)/
(2*π*(C1+C3));Wherein, fsw is the frequency of switching tube in sampling hold circuit 300.
Specific working principle are as follows:
Selection circuit 100 is sampled according to the current potential of output stage VOP and the current potential of output stage VON, VOP-VON filter is calculated
Waveform after wave, by taking sine wave as an example, waveform is as shown in Fig. 2 top half;Selection circuit 100 is sampled in conjunction with the first sampling
The frequency of clock 400 judges that the potential difference (namely the filtered value of VOP-VON) of output stage VOP and output stage VON is in just
Half period or negative half-cycle, and export corresponding switch control signal Sample_selt.
As shown in Fig. 2, sampling selection circuit when the potential difference of output stage VOP and output stage VON are in positive half period
The current potential of the switch control signal Sample_selt of 100 outputs is with high level, and input selection circuit 200 is by its first input end
SN1 and its first output end form access, its third input terminal SN3 and its second output terminal are formed access;When sampling is kept
When the current potential for the clock control signal that the Clock control end of circuit 300 receives is high level, sampling hold circuit 300 starts pair
The voltage at the first both ends detection resistance RSP is sampled;When the when clock that the Clock control end of sampling hold circuit 300 receives
When the current potential of signal processed is low level, sampling hold circuit 300 stops sampling, by the voltage output sampled to conversion circuit
800;Conversion circuit 800 converts the voltage sampled, and obtaining PDM, (Pulse Density Modulation, pulse are close
Degree modulation) code;It repeats the above process until the current potential of switch control signal Sample_selt becomes low level.
When the potential difference of output stage VOP and output stage VON are in negative half-cycle, what sampling selection circuit 100 exported is opened
Close control signal Sample_selt current potential be low level, input selection circuit 200 by its third input terminal SN3 and its first
Output end forms access, its second input terminal SN2 and its second output terminal are formed access;When sampling hold circuit 300
When the current potential for the clock control signal that clock system termination receives is high level, sampling hold circuit 300 starts to the second detection electricity
The voltage at the resistance both ends RSN is acquired;When the electricity for the clock control signal that the Clock control end of sampling hold circuit 300 receives
When position is low level, sampling hold circuit 300 stops sampling, by the voltage output sampled to conversion circuit 800;Conversion circuit
800 pairs of voltages sampled are converted, and PDM code is obtained;It repeats the above process until switch control signal Sample_selt's
Current potential becomes high level.
Wherein, PDM code cic filter (Cascaded integrator-comb filter, the integral-pectination grade obtained
Connection filter) it is convertible restore sample voltage value Vsdm, the current value on loudspeaker can be obtained in Vsdm/ (2*RSP), so as into
The protection of row loudspeaker.
It should be noted that sampling selection circuit 100 passes through switch control signal Sample_selt's in the present embodiment
Different potentials achieve the purpose that controlling input selection circuit 200 forms different accesses;Reach identical purpose with this embodiment
Other embodiments are also in the range of the protection of the application.
It should also be noted that, in the present embodiment, clock control circuit 500 by the different potentials of clock control signal,
Achieve the purpose that controlling sampling hold circuit 300 starts to sample or stop sampling;Reach its of identical purpose with this embodiment
His embodiment is also within the scope of protection of this application.
The present invention is by the sampling selection circuit and the input selection circuit, according to the output stage VOP and described
The potential difference of output stage VON is located at positive half period or negative half-cycle, and selection samples the voltage at corresponding detection resistance both ends;Later,
The different potentials for the clock control signal that the present invention is exported according to the clock control circuit start to sample corresponding detection resistance two
The voltage at end or the voltage for stopping sampling and exporting sampling;To realize the detection to loudspeaker electric current, and without to D class
Audio-frequency power amplifier addition is anti-to cut top distortion function, ensure that the performance of D-type audio power amplifier;And because of the present invention
In sampling hold circuit using fully differential input, fully differential export framework, so counteracting the voltage fluctuation of Power Groud PGND
Influence to sampled voltage accuracy.
Another embodiment of the present invention additionally provides a kind of current detection circuit of specific loudspeaker, in above-described embodiment and figure
On the basis of 1 and Fig. 2, optionally, as shown in figure 3, its input selection circuit 200, comprising: first switch S1, second switch
S2, third switch S3, the 4th switch S4 and the first control module 201;Wherein:
First input end of the input terminal of first switch S1 as input selection circuit 200, the input terminal of second switch S2
As the second input terminal of input selection circuit 200, the input terminal of third switch S3 is connected with the input terminal of the 4th switch S4, even
Third input terminal of the contact as input selection circuit.
The output end of first switch S1 is connected with the output end of third switch S3, and tie point is as input selection circuit 200
The first output end;The output end of second switch S2 is connected with the output end of the 4th switch S4, and tie point is as input selection electricity
The second output terminal on road 200.
The control terminal of first switch S1 is connected with the control terminal of the 4th switch S4, tie point and the first control module 201
First output end is connected;The control terminal of second switch is connected with the control terminal that third switchs, tie point and the first control module 201
Second output terminal be connected.
Switch control terminal of the input terminal of first control module 201 as input selection circuit.
Specific working principle are as follows:
When the potential difference of output stage VOP and output stage VON are in positive half period, i.e. opening when input selection circuit 200
When the current potential for closing the switch control signal Sample_selt that control terminal receives is high level, the first of the first control module 201
Output end V1 exports closure signal, controls first switch S1 and the 4th switch S4 closure;And its second output terminal V2 output shutdown
Signal controls second switch S2 and third switch S3 and disconnects.
When the potential difference of output stage VOP and output stage VON are in negative half-cycle, i.e. opening when input selection circuit 200
When the current potential for closing the switch control signal Sample_selt that control terminal receives is low level, the first of the first control module 201
Output end V1 exports cut-off signals, controls first switch S1 and the 4th switch S4 and disconnects, second output terminal V2 output closure letter
Number, control second switch S2 and third switch S3 closure.
This gives a kind of specific embodiments of input selection circuit 200, it is not limited to this, actually answers
The circuit structure or chip that can be formed in other discrete devices is realized, depending on its specific application environment, as long as
It can be realized the scheme of above-mentioned working principle within the scope of protection of this application.
Remaining structure and principle are same as the previously described embodiments, no longer repeat one by one herein.
Optionally, such as Fig. 4, in another embodiment of the invention, a kind of embodiment of clock control circuit 500 is wrapped
It includes: the second sampling clock 510, the first counter 520, the second counter 530 and third counter 540;Wherein:
Output end of the output end of second sampling clock 510 as clock control circuit 500, with sampling hold circuit 300
Clock control end be connected;The first input end of second sampling clock 510 is connected with the first counter 520;Second sampling clock
510 the second input terminal is connected with the second counter 530;The third input terminal and third counter 540 of second sampling clock 510
It is connected.
Specific working principle are as follows:
When the potential difference of output stage VOP and output stage VON are in positive half period, i.e. switch control signal Sample_
The current potential of selt is high level, then when the current potential of output stage VOP increases, the clock control letter of the second sampling clock 510 output
Number current potential be high level;First counter 520 carries out plus one counts, and the second counter 530 utilizes the first sampling clock
400 carry out adding one to count.
When the decline of the current potential of output stage VOP, the first counter 520 continues plus two count, while the second counter
530 reset;First counter 520 continues the counting of the above process, when the first counter counts count to 256, the second sampling
The current potential for the signal that clock 510 exports becomes low level;If do not detected still when the second counter 530 count down to 256
Current potential to output stage VOP declines, then the clock control signal that the second counter 530 can force the second acquisition clock 510 to export
Current potential become low level, while third counter 540 starts to carry out using the first sampling clock 400 plus one counts.
When the current potential of output stage VOP rises again, the current potential of the signal of the second sampling clock 510 output becomes high electricity
It is flat;If not detecting that the current potential of output stage VOP rises still, then third meter when third counter 540 count down to 128
Number device 540 forces the current potential of the clock control signal of the second sampling clock 510 output to become high level.
Clock control circuit 500 repeats the above process, until the current potential of switch control signal Sample_selt becomes low electricity
Flat, i.e. the working condition of D-type audio power amplifier 600 becomes negative half-cycle from positive half period.
When the potential difference of output stage VOP and output stage VON are in negative half-cycle, i.e. switch control signal Sample_
The current potential of selt is low level, then when the current potential of output stage VON increases, the clock control letter of the second sampling clock 510 output
Number current potential be high level;First counter 520 carries out plus one counts, and the second counter 530 utilizes the first sampling clock
400 carry out adding one to count.
When the decline of the current potential of output stage VON, the first counter 520 continues plus two count, while the second counter
530 reset;First counter 520 continues the counting of the above process, when the first counter counts count to 256, the second sampling
The current potential for the signal that clock 510 exports becomes low level;If do not detected still when the second counter 530 count down to 256
Current potential to output stage VON declines, then the clock control signal that the second counter 530 can force the second acquisition clock 510 to export
Current potential become low level, while third counter 540 starts to carry out using the first sampling clock 400 plus one counts.
When the current potential of output stage VON rises again, the current potential of the signal of the second sampling clock 510 output becomes high electricity
It is flat;If not detecting that the current potential of output stage VON rises still, then third meter when third counter 540 count down to 128
Number device 540 forces the current potential of the clock control signal of the second sampling clock 510 output to become high level.
Clock control circuit 500 repeats the above process, until the current potential of switch control signal Sample_selt becomes high electricity
Flat, i.e. the working condition of D-type audio power amplifier 600 becomes positive half period from negative half-cycle.
It should be noted that a kind of specific embodiment of clock control circuit is merely provided in the present embodiment, it is practical
The circuit structure or chip that can be formed in other discrete devices is realized, depending on its specific application environment, only
It can be realized other schemes of above-mentioned working principle, within the scope of protection of this application.
Remaining structure and principle are same as the previously described embodiments, no longer repeat one by one herein.
Optionally, such as Fig. 5, sampling hold circuit 300, comprising: first switch branch 301, second switch branch 302,
Three switching branches 303, the 4th switching branches 304, voice coil motor VCM, the second control module 305, the identical first capacitor of capacitance
C1 and the second capacitor C2 and capacitance identical third capacitor C3 and the 4th capacitor C4;Wherein:
The input terminal of first switch branch 301 is connected with the input terminal of third switching branches 303, tie point conduct, sampling
The first input end of holding circuit 300;The input terminal of second switch branch 302 is connected with the input terminal of the 4th switching branches 304,
Tie point conduct, the second input terminal of sampling hold circuit 300.
First output end of first switch branch 301 is connected with one end of third capacitor C3, tie point conduct, and sampling is kept
First output end of circuit 300;First output end of the 4th switching branches 304 is connected with one end of the 4th capacitor C4, tie point
As the second output terminal of sampling hold circuit 300.
The other end, the other end of the 4th capacitor C4 and the anode of voice coil motor VCM of third capacitor C3, is grounded;Second
First output end of switching branches 302 is connected with the first output end of third switching branches 303, tie point and voice coil motor VCM
Negative terminal be connected.
One end of first capacitor C1 is connected with the second output terminal of first switch branch 301;The other end of first capacitor C1
It is connected with the second output terminal of second switch branch 302;One end of second capacitor C2 and the second output of third switching branches 303
End is connected;The other end of second capacitor C2 is connected with the second output terminal of the 4th switching branches 304.
The first control terminal, the first control terminal of second switch branch 302, third switching branches of first switch branch 301
303 the first control terminal is connected with the first control terminal of the 4th switching branches 304, and the of tie point and the second control module 305
One output end is connected.
Second control terminal of second switch branch 302 is connected with the second control terminal of third switching branches 303, tie point with
The second output terminal of second control module 305 is connected;The second control terminal and the 4th switching branches 304 of first switch branch 301
The second control terminal be connected, tie point is connected with the third output end of the second control module 305;Second control module 305 it is defeated
Enter Clock control end of the end as sampling hold circuit.
Optionally, as a kind of implementation, such as Fig. 4, first switch branch 301, comprising: the 5th switch S5 and the 6th is opened
Close S6;Wherein:
Input terminal of the input terminal of 5th switch S5 as first switch branch 301, the output end of the 5th switch S5 and
The input terminal of six switch S6 is connected, second output terminal of the tie point as first switch branch 301, the output end of the 6th switch S6
The first output end as first switch branch 301;
First control terminal of the control terminal of 5th switch S5 as first switch branch 301, the control terminal of the 6th switch S6
The second control terminal as first switch branch 301.
Optionally, as a kind of implementation, such as Fig. 4, second switch branch 302, comprising: the 7th switch S7 and the 8th is opened
Close S8;Wherein:
Input terminal of the input terminal of 7th switch S7 as second switch branch 302, the output end of the 7th switch S7 and
The input terminal of eight switch S8 is connected, second output terminal of the tie point as second switch branch 302, the output end of the 8th switch S8
The first output end as second switch branch 302;
First control terminal of the control terminal of 7th switch S7 as second switch branch 302, the control terminal of the 8th switch S8
The second control terminal as second switch branch 302.
Optionally, as a kind of implementation, such as Fig. 3, third switching branches 303, comprising: the 9th switch S9 and the tenth is opened
Close S10;Wherein:
Input terminal of the input terminal of 9th switch S9 as third switching branches 303, the output end of the 9th switch S9 and
The input terminal of ten switch S10 is connected, second output terminal of the tie point as third switching branches 303, the output of the tenth switch S10
Hold the first output end as third switching branches 303;
First control terminal of the control terminal of 9th switch S9 as third switching branches 303, the control terminal of the tenth switch S10
The second control terminal as third switching branches 303.
Optionally, as a kind of implementation, such as Fig. 3, the 4th switching branches 304, comprising: the 11st switch S11 and
12 switch S12;Wherein:
Input terminal of the input terminal of 11st switch S11 as the 4th switching branches 304, the output of the 11st switch S11
End is connected with the input terminal of the 12nd switch S12, and second output terminal of the tie point as the 4th switching branches 304, the 12nd opens
Close first output end of the output end of S12 as the 4th switching branches 304;
First control terminal of the control terminal of 11st switch S11 as the 4th switching branches 304, the 12nd switch S12's
Second control terminal of the control terminal as the 4th switching branches 304.
It should be noted that in the present embodiment, the 5th switch S5, the 6th switch S6, the 7th switch S7, the 8th switch S8,
9th switch S9, the tenth switch S10, the 11st switch S11 and the 12nd switch S12 are that control terminal receives high level signal
When, it is switched on, when receiving low level signal, is disconnected;Reach the other embodiments of identical purpose with this embodiment,
Within the scope of protection of this application;Hereinafter, being only illustrated in this embodiment to the working principle of sampling hold circuit 300.
Specific working principle are as follows:
When the potential difference of output stage VOP and output stage VON are in positive half period, i.e., as switch control signal Sample_
When the current potential of selt is high level, its first input end SN1 and its first output end are formed access by input selection circuit 200,
Its third input terminal SN3 and its second output terminal are formed into access.
When the current potential for the clock control signal that clock control circuit 500 exports is high level, the second control module 305
The current potential of the signal P1 of first output end output is high level, the 5th switch S5, the 7th switch S7, the 9th switch S9 and the 11st
Switch S11 closure, first capacitor C1 and the second capacitor C2 start to adopt the voltage at the first both ends detection resistance RSP.
When the current potential for the clock control signal that clock control circuit 500 exports becomes low level, the second control module 305
The current potential of signal P1 of the first output end become low level, the 5th switch S5, the 7th switch S7, the 9th switch S9 and the 11st
Switch S11 is disconnected, and Φ 1 is lower by height, and first capacitor C1 and the second capacitor C2 stop acquisition.
Wherein, the voltage value that first capacitor C1 is sampled is IL*RSP, and the voltage value that the second capacitor C2 is sampled is-IL*
RSP;Wherein, IL is the operating current of D-type audio power amplifier.
After the current potential of the signal P1 of first output end of the second control module 305 becomes low level, i.e., after Φ 1 is lower, warp
Certain non-overlap time is spent, the current potential of the signal of the second output terminal P2 of the second control module 305 becomes high level, and the 8th opens
S8 and the tenth switch S10 closure is closed, Φ 2 is got higher by low, establishes voice coil motor VCM voltage;By certain voice coil motor VCM electricity
After pressing settling time, the current potential of the signal of the third output end of the second control module 305 becomes high level, the 6th switch S6 and the
12 switch S12 closure, Φ 3 are got higher by low, the voltage transfer that first capacitor C1 and the second capacitor C2 are upsampled to third
On capacitor C3 and the 4th capacitor C4, and export to conversion module 800.
Wherein, the voltage of two output ends output of sampling hold circuit 300 is the first output of sampling hold circuit 300
The difference of the current potential SH_VON of the current potential SH_VOP and its first output end at end, i.e. SH_VOP-SH_VON=2*IL*RSP.
It should be noted that voice coil motor VCM voltage is the first output end and second in order to make sampling hold circuit 300
The voltage of the output of output end is in the input common-mode range of Integrated Derivative analog-digital converter.
After the current potential of signal that clock control circuit 500 exports becomes high level again, the of the second control module 305
The current potential of the signal P3 of the current potential and third output end of the signal P2 of two output ends becomes low level, the 6th switch S6, the 8th
Switch S8, the tenth switch S10 and the 12nd switch S12 are disconnected, and Φ 2 and Φ 3 are lower by height;Using certain non-overlap time
Afterwards, the current potential of the signal of the first output end of the second control module 305 becomes high level, the 5th switch S5, the 7th switch S7,
Nine switch S9 and the 11st switch S11 closure, Φ 1 gets higher by low, and first capacitor C1 and the second capacitor C2 start again at sampling the
The voltage at one both ends detection resistance RSP, repeats the above process, until the current potential of switch control signal Sample_selt becomes low
Potential difference between level, i.e. output stage VOP and output stage VON is in negative half-cycle.
When the potential difference of output stage VOP and output stage VON are in negative half-cycle, i.e., as switch control signal Sample_
When the current potential of selt is low level, its third input terminal SN3 and its first output end are formed access by input selection circuit 200,
Its second input terminal and its second output terminal are formed into access.
When the current potential for the clock control signal that clock control circuit 500 exports is high level, the second control module 305
The signal P1 of first output end output is high level, the 5th switch S5, the 7th switch S7, the switch of the 9th switch S9 and the 11st
S11 closure, first capacitor C1 and the second capacitor C2 start to sample 200 third input terminal of input selection circuit and the second input terminal it
Between voltage, i.e. the voltage at the second both ends detection resistance RSN.Remaining process is same as described above, no longer repeats one by one herein.
It should be noted that the present embodiment merely provides a kind of embodiment of sampling hold circuit, in practical application,
The circuit structure or chip that can be formed with other discrete devices is realized, depending on its specific application environment, as long as can
Realize other schemes of above-mentioned working principle, within the scope of protection of this application.
Remaining structure and principle are same as the previously described embodiments, no longer repeat one by one herein.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, of the invention
It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one
The widest scope of cause.
It should also be noted that, herein, relational terms such as first and second and the like are used merely to one
Entity or operation are distinguished with another entity or operation, without necessarily requiring or implying between these entities or operation
There are any actual relationship or orders.
Claims (10)
1. a kind of current detection circuit of loudspeaker, suitable for the loudspeaker being connected with D-type audio power amplifier, which is characterized in that
Include: the first detection resistance, the second detection resistance, sampling selection circuit, input selection circuit, sampling hold circuit, when clock
Circuit and conversion circuit processed;Wherein:
One end of first detection resistance is connected with the first input end of the input selection circuit, and tie point is as the loudspeaker
The first input end of current detection circuit, the low side NMOS crystal with the output stage VON of the D-type audio power amplifier
The source electrode of pipe is connected;
One end of second detection resistance is connected with the second input terminal of the input selection circuit, and tie point is as the loudspeaker
Second input terminal of current detection circuit, the low side NMOS crystal with the output stage VOP of the D-type audio power amplifier
The source electrode of pipe is connected;
The of the other end of first detection resistance, the other end of second detection resistance and the input selection circuit
Three input terminals, are grounded;
First output end of the input selection circuit is connected with the first input end of the sampling hold circuit;The input choosing
The second output terminal for selecting circuit is connected with the second input terminal of the sampling hold circuit;
First output end of the sampling hold circuit is connected with the first input end of the conversion circuit, and the sampling keeps electricity
The second output terminal on road is connected with the second input terminal of the conversion circuit;The Clock control end of the sampling hold circuit and institute
The output end for stating clock control circuit is connected;
Output end of the output end of the conversion circuit as the current detection circuit of the loudspeaker;
Three input terminals of the sampling selection circuit are separately connected output stage VOP, output stage VON and the first sampling clock;Institute
The output end for stating sampling selection circuit is connected with the switch control terminal of the input selection circuit;
The sampling selection circuit is used for when the potential difference of output stage VOP and output stage VON are in positive half period, described in control
The first input end of input selection circuit forms logical with second output terminal formation access, third input terminal and its second output terminal
Road;And when the potential difference of output stage VOP and output stage VON are in negative half-cycle, third input terminal and the first output end are controlled
It forms access, the second input terminal and its second output terminal and forms access;
The sampling hold circuit is used for the clock control signal exported according to the clock control circuit, samples the sampling choosing
The voltage between two output ends of circuit is selected, alternatively, stopping sampling and by the voltage output sampled to the conversion circuit.
2. the current detection circuit of loudspeaker according to claim 1, which is characterized in that the input selection circuit, comprising:
First switch, second switch, third switch, the 4th switch and the first control module;Wherein:
First input end of the input terminal of the first switch as the input selection circuit;The input terminal of the second switch
The second input terminal as the input selection circuit;The input terminal phase of the input terminal of the third switch and the 4th switch
Even, third input terminal of the tie point as the input selection circuit;
The output end of the first switch is connected with the output end that the third switchs, and tie point is as the input selection circuit
The first output end;The output end of the second switch is connected with the output end of the 4th switch, and tie point is as described defeated
Enter the second output terminal of selection circuit;
The control terminal of the first switch is connected with the control terminal of the 4th switch, and the first of tie point and first control module
Output end is connected;The control terminal of the second switch is connected with the control terminal that the third switchs, tie point and first control
The second output terminal of molding block is connected;
Switch control terminal of the input terminal of first control module as the input selection circuit.
3. the current detection circuit of loudspeaker according to claim 1, which is characterized in that the sampling hold circuit, comprising:
First switch branch, third switching branches, the 4th switching branches, voice coil motor, the second control module, holds second switch branch
It is worth identical first capacitor and the second capacitor and the identical third capacitor of capacitance and the 4th capacitor;Wherein:
The input terminal of the first switch branch is connected with the input terminal of the third switching branches, and tie point is as the sampling
The first input end of holding circuit;
The input terminal of the second switch branch is connected with the input terminal of the 4th switching branches, and tie point is as the sampling
Second input terminal of holding circuit;
First output end of the first switch branch is connected with one end of the third capacitor, and tie point is protected as the sampling
Hold the first output end of circuit;
First output end of the 4th switching branches is connected with one end of the 4th capacitor, and tie point is protected as the sampling
Hold the second output terminal of circuit;
The other end, the other end of the 4th capacitor and the anode of the voice coil motor of the third capacitor, are grounded;
First output end of the second switch branch is connected with the first output end of the third switching branches, tie point and institute
The negative terminal for stating voice coil motor is connected;
One end of the first capacitor is connected with the second output terminal of the first switch branch;The other end of the first capacitor
It is connected with the second output terminal of the second switch branch;
One end of second capacitor is connected with the second output terminal of the third switching branches;The other end of second capacitor
It is connected with the second output terminal of the 4th switching branches;
First control terminal of the first switch branch, the first control terminal of the second switch branch, third switch branch
First control terminal on road is connected with the first control terminal of the 4th switching branches, and the first of tie point and second control module is defeated
Outlet is connected;
Second control terminal of the second switch branch is connected with the second control terminal of the third switching branches, tie point and institute
The second output terminal for stating the second control module is connected;
Second control terminal of the first switch branch is connected with the second control terminal of the 4th switching branches, tie point and institute
The third output end for stating the second control module is connected;
Clock control end of the input terminal of second control module as the sampling hold circuit.
4. the current detection circuit of loudspeaker according to claim 3, which is characterized in that the first switch branch, comprising:
5th switch and the 6th switch;Wherein:
Input terminal of the input terminal as the first switch branch of 5th switch, the output end of the 5th switch and the
The input terminal of six switches is connected, second output terminal of the tie point as the first switch branch, the output of the 6th switch
Hold the first output end as the first switch branch;
First control terminal of the control terminal of 5th switch as the first switch branch, the control terminal of the 6th switch
The second control terminal as the first switch branch.
5. the current detection circuit of loudspeaker according to claim 3, which is characterized in that the second switch branch, comprising:
7th switch and the 8th switch;Wherein:
Input terminal of the input terminal of 7th switch as the second switch branch, the output end of the 7th switch and institute
The input terminal for stating the 8th switch is connected, second output terminal of the tie point as the second switch branch, the 8th switch
First output end of the output end as the second switch branch;
First control terminal of the control terminal of 7th switch as the second switch branch, the control terminal of the 8th switch
The second control terminal as the second switch branch.
6. the current detection circuit of loudspeaker according to claim 3, which is characterized in that the third switching branches, comprising:
9th switch and the tenth switch;Wherein:
Input terminal of the input terminal as the third switching branches of 9th switch, the output end of the 9th switch and the
The input terminal of ten switches is connected, second output terminal of the tie point as the third switching branches, the output of the tenth switch
Hold the first output end as the third switching branches;
First control terminal of the control terminal of 9th switch as the third switching branches, the control terminal of the tenth switch
The second control terminal as the third switching branches.
7. the current detection circuit of loudspeaker according to claim 3, which is characterized in that the 4th switching branches, comprising:
11st switch and the 12nd switch;Wherein:
Input terminal of the input terminal of 11st switch as the 4th switching branches, the output end of the 11st switch
It is connected with the input terminal of the 12nd switch, second output terminal of the tie point as the 4th switching branches, the described 12nd opens
First output end of the output end of pass as the 4th switching branches;
First control terminal of the control terminal of 11st switch as the 4th switching branches, the control of the 12nd switch
Second control terminal of the end processed as the 4th switching branches.
8. the current detection circuit of loudspeaker according to claim 1, which is characterized in that the clock control circuit, comprising:
Second sampling clock, the first counter, the second counter and third counter;Wherein:
Output end of the output end of second sampling clock as the clock control circuit;The of second sampling clock
One input terminal is connected with first counter;Second input terminal of second sampling clock and the second counter phase
Even;The third input terminal of second sampling clock is connected with the third counter.
9. the current detection circuit of loudspeaker according to claim 1, which is characterized in that the conversion circuit is that integral-is micro-
Submodular converter.
10. the current detection circuit of loudspeaker according to claim 1, which is characterized in that first detection resistance and institute
The resistance value for stating the second detection resistance is equal;The frequency of first sampling clock is the current potential of the output stage VOP and described defeated
256 times of the pulse-width modulation frequency of the current potential of grade VON out.
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CN201910035468.7A CN109546978B (en) | 2019-01-15 | 2019-01-15 | Current detection circuit of loudspeaker |
KR1020217025609A KR102577482B1 (en) | 2019-01-15 | 2020-01-13 | Current detection circuit for loudspeaker |
PCT/CN2020/071720 WO2020147672A1 (en) | 2019-01-15 | 2020-01-13 | Current detection circuit for loudspeaker |
US17/423,346 US11698393B2 (en) | 2019-01-15 | 2020-01-13 | Current detection circuit for loudspeaker |
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