CN109545840A - A kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode - Google Patents

A kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode Download PDF

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CN109545840A
CN109545840A CN201811354615.9A CN201811354615A CN109545840A CN 109545840 A CN109545840 A CN 109545840A CN 201811354615 A CN201811354615 A CN 201811354615A CN 109545840 A CN109545840 A CN 109545840A
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groove profile
protective layer
silicon carbide
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power mos
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胡盛东
安俊杰
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Chongqing University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41741Source or drain electrodes for field effect devices for vertical or pseudo-vertical devices
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    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7827Vertical transistors
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    • H01ELECTRIC ELEMENTS
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes

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Abstract

The invention discloses a kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode; on the one hand on the basis of conventional groove profile field oxide device; p-type protective layer is shared using groove profile gate electrode and groove profile source electrode; cellular width can be effectively reduced, so that conducting resistance of the device in ON state be effectively reduced;On the other hand heterojunction schottky diode structure is used, i.e. polysilicon is directly contacted with silicon carbide, while reducing device manufacturing cost, eliminate the uncontrollable integrity problem of Schottky barrier due to caused by schottky metal annealing temperature difference, the purpose of the problem of to reach the technique manufacture difficulty for reducing the silicon carbide groove profile field oxide device with diode structure, alleviate between MOS device breakdown voltage and conducting resistance.

Description

A kind of silicon carbide groove profile field oxygen power MOS with protective layer and heterojunction diode Device
Technical field
The invention belongs to field of semiconductor, and in particular to a kind of carbon with protective layer and heterojunction diode SiClx groove profile field oxygen power MOS (Metal Oxide Semiconductor) device.
Background technique
Silicon carbide power device is because of its high voltage, low on-resistance, the electrical characteristics such as rapidly switches off, is widely used to In power-supply system.Although its excellent electrical characteristic is verified in many electric system application, high chip Cost and integrity problem still limit the status that they replace Si IGBT.And the integrity problem of grid oxic horizon is people One of long-term focus of attention problem, and thus propose numerous alleviation contradictory schemes, wherein below the oxide structure of groove profile field Placing p-type protective layer is considered as that one of the contradictory structure can be effectively relieved.
As shown in Figure 1,1 is N-type substrate layer, 2 drift about typical silicon carbide groove profile field oxygen power MOS device construction for N-type Area, 3 be N-type carrier diffusion region, and 4 be P-type channel layer, and 5 be N-type source region, and 6 be grid oxide layer, and 7 be grid polycrystalline silicon, and 9 protect for P Sheath, 10 be source metal, and 11 be drain metal.The more traditional groove profile device of the structure can greatly reduce the electric field of grid oxic horizon Intensity, and grid capacitance is reduced, increase devices switch speed.Tool inside the oxygen power MOS device construction of silicon carbide groove profile field There is P-type channel area, drift region and substrate form a parasitic body diode.When inverter circuit uses, secondary post can be made full use of Raw body diode conduction achievees the purpose that system compact to omit external fast recovery diode.However, as silicon carbide Base device, compared with silicon-based devices, the Built-in potential of silicon carbide diode is higher, and in the case where conducting heavy current, body Diode can deteriorate, and entire device reliability is caused to reduce.Therefore, in inverter circuit, usually one silicon carbide Xiao of inverse parallel Special based diode.Then, the parasitic inductance that everything increases the usable floor area of chip again and the system integration generates.In carbon In the case where SiClx high-speed switch, the parasitic inductance of very little can also bring unnecessary concussion to device.
On this basis, a kind of silicon carbide groove profile field oxide structure with built-in Schottky diode is suggested, and sees Fig. 2, and 1 It is N-type drift region for N type substrate layer, 2,3 be N-type carrier diffusion region, and 4 be P-type channel layer, and 5 be N-type source region, and 6 be grid oxygen Layer, 7 be grid polycrystalline silicon, and 9 be P protective layer, and 10 be source metal, and 11 be drain metal, and 12 be schottky metal knot.Compare figure 1, the maximum improvement of the silicon carbide groove profile field oxide structure with built-in Schottky diode is to use integrated groove profile Schottky Diode structure, therefore transistor size can be maximally reduced, it also lays the foundation for the miniaturization of system, related content It can be seen that bibliography: Kobayashi, Yusuke, et al. " Body PiN diode inactivation with low on- resistance achieved by a 1.2kV-class 4H-SiC SWITCH-MOS."2017IEEE International of Electron Devices Meeting(IEDM).IEEE,2017。
Therefore in order to further decrease the technique manufacture difficulty of the silicon carbide groove profile field oxide device with diode structure, delay The problem of solving between device electric breakdown strength and conducting resistance has the further of the silicon carbide groove profile field oxide device of diode structure Research becomes worldwide research hotspot.
Summary of the invention
In view of this, the purpose of the present invention is to provide a kind of silicon carbide groove profile with protective layer and heterojunction diode Field oxygen power MOS (Metal Oxide Semiconductor) device.
For achieving the above object, the invention provides the following technical scheme:
1, a kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode, the MOS device From the bottom up successively include drain metal 11, N-type substrate layer 1, N-type drift region 2, N-type carrier diffusion region 3, P-type channel layer 4, Source metal 10, setting P protective layer 9, N-type source region 5, groove profile gate electrode and groove profile source electrode, the P protective layer 9 are set to Below groove profile gate electrode and groove profile source electrode, the groove profile gate electrode and the groove profile source electrode share the P protective layer 9, institute Groove profile source electrode is stated using heterojunction diode structure.
Preferably, the groove profile gate electrode includes grid oxide layer 6 and grid polycrystalline silicon 7.
Further, the grid polycrystalline silicon 7 is N-type or p-type polysilicon.
Preferably, the groove profile source electrode includes source polysilicon 8.
Further, the source polysilicon 8 is p-type polysilicon, and the material of the p-type polysilicon is nickel, titanium, gold or silver One of metal or various metals mixture.
Preferably, the groove profile source electrode is set to the lower part of the source metal 10.
Preferably, the groove profile gate electrode and the lower part of the source metal 10, the side of N-type source region 5, P-type channel layer 4 Side contact.
Preferably, the side of the N-type source region 5 is contacted with the side of the groove profile gate electrode, and N-type source region 5 supports bottom It is contacted with another side with the P-type channel layer 4, the lower contacts on the top of the N-type source region 5 and the source metal 10.
Preferably, the material of the P protective layer 9 is semiconductor material with wide forbidden band.
Further, the semiconductor material with wide forbidden band is GaN.
The beneficial effects of the present invention are:
1, a kind of silicon carbide groove profile field oxygen power MOS devices with protective layer and heterojunction diode disclosed by the invention Part shares p-type protective layer using groove profile gate electrode and groove profile source electrode on the basis of conventional groove profile field oxide device, can be effective Cellular width is reduced, so that conducting resistance of the device in ON state be effectively reduced;
2, a kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode disclosed by the invention Middle groove profile source electrode uses heterojunction schottky diode structure, i.e. polysilicon is directly contacted with silicon carbide, in the device system of reduction It causes this while, eliminates the uncontrollable integrity problem of Schottky barrier due to caused by schottky metal annealing temperature difference.
Detailed description of the invention
In order to keep the purpose of the present invention, technical scheme and beneficial effects clearer, the present invention provides following attached drawing:
Fig. 1 is conventional silicon carbide groove profile field oxide device structural schematic diagram;
Fig. 2 is the silicon carbide groove profile field oxide device structural schematic diagram with Schottky diode;
Fig. 3 is a kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode of the invention Structural schematic diagram;
In figure, 1 is N-type substrate layer, and 2 be N-type drift region, and 3 be N-type carrier diffusion region, and 4 be P-type channel layer, and 5 be N Type source region, 6 be grid oxide layer, and 7 be grid polycrystalline silicon, and 8 be source polysilicon, and 9 be P protective layer, and 10 be source metal, and 11 be leakage Pole metal, 12 be schottky metal knot.
Specific embodiment
Below by a preferred embodiment of the present invention will be described in detail.The experiment of actual conditions is not specified in embodiment Method, usually according to conventional conditions or according to the manufacturer's recommendations.
A kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode, structure such as Fig. 3 institute Show, 1 is N-type substrate layer, and 2 be N-type drift region, and 3 be N-type carrier diffusion region, and 4 be P-type channel layer, and 5 be N-type source region, and 6 are Grid oxide layer, 7 be grid polycrystalline silicon, and 8 be source polysilicon, and 9 be P protective layer, and 10 be source metal, and 11 be drain metal.
A kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode, the MOS device packet Include successively includes drain metal 11, N-type substrate layer 1, N-type drift region 2, N-type carrier diffusion region 3, P-type channel layer from the bottom up 4, source metal 10, setting P protective layer 9, N-type source region 5, groove profile gate electrode and groove profile source electrode, the P protective layer 9 are arranged Below groove profile gate electrode and groove profile source electrode, the groove profile gate electrode and the groove profile source electrode share the P protective layer 9, The groove profile source electrode uses heterojunction diode structure.
Above-mentioned groove profile gate electrode includes grid oxide layer 6 and grid polycrystalline silicon 7 in the present invention, wherein the grid polycrystalline silicon 7 is N Type or p-type polysilicon.
Above-mentioned groove profile source electrode includes partially or without side wall field oxygen layer and source polysilicon 8, wherein the source in the present invention Pole polysilicon 8 is p-type polysilicon, and the material of the p-type polysilicon is one of nickel, titanium, gold or silver metal or a variety of gold Belong to mixture.
Also have following positional relationship in MOS device structure of the invention: the groove profile source electrode is set to the source electrode The lower part of metal 10;The groove profile gate electrode and the lower part of the source metal 10, the side of N-type source region 5, P-type channel layer 4 Side contact;The side of the N-type source region 5 is contacted with the side of the groove profile gate electrode, and N-type source region 5 supports bottom and another One side is contacted with the P-type channel layer 4, the lower contacts on the top of the N-type source region 5 and the source metal 10.
In addition the material of the P protective layer 9 is semiconductor material with wide forbidden band, and the semiconductor material with wide forbidden band is GaN.
A kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode disclosed by the invention, On the basis of conventional groove profile field oxide device, p-type protective layer is shared using groove profile gate electrode and groove profile source electrode, can be effectively reduced Cellular width, so that conducting resistance of the device in ON state be effectively reduced;In addition disclosed by the invention a kind of with protective layer Heterojunction schottky diode knot is used with groove profile source electrode in the silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device of heterojunction diode Structure, i.e. polysilicon are directly contacted with silicon carbide, while reducing device manufacturing cost, are eliminated due to schottky metal annealing temperature The uncontrollable integrity problem of Schottky barrier caused by degree difference.
Finally, it is stated that preferred embodiment above is only used to illustrate the technical scheme of the present invention and not to limit it, although logical It crosses above preferred embodiment the present invention is described in detail, however, those skilled in the art should understand that, can be Various changes are made to it in form and in details, without departing from claims of the present invention limited range.

Claims (10)

1. a kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode, the MOS device is under It up successively include drain metal (11), N-type substrate layer (1), N-type drift region (2), N-type carrier diffusion region (3), P-type channel Layer (4), source metal (10), which is characterized in that setting P protective layer (9), N-type source region (5), groove profile gate electrode and groove profile source Electrode, the P protective layer (9) are set to below groove profile gate electrode and groove profile source electrode, the groove profile gate electrode and the groove profile Source electrode shares the P protective layer (9), and the groove profile source electrode uses heterojunction diode structure.
2. a kind of silicon carbide groove profile field oxygen power MOS with protective layer and heterojunction diode according to claim 1 Device, which is characterized in that the groove profile gate electrode includes grid oxide layer (6) and grid polycrystalline silicon (7).
3. a kind of silicon carbide groove profile field oxygen power MOS with protective layer and heterojunction diode according to claim 2 Device, which is characterized in that the grid polycrystalline silicon (7) is N-type or p-type polysilicon.
4. a kind of silicon carbide groove profile field oxygen power MOS with protective layer and heterojunction diode according to claim 1 Device, which is characterized in that the groove profile source electrode includes source polysilicon (8).
5. a kind of silicon carbide groove profile field oxygen power MOS with protective layer and heterojunction diode according to claim 4 Device, which is characterized in that the source polysilicon (8) is p-type polysilicon, and the material of the p-type polysilicon is nickel, titanium, Jin Huo One of person's silver metal or various metals mixture.
6. a kind of silicon carbide groove profile field oxygen power MOS with protective layer and heterojunction diode according to claim 1 Device, which is characterized in that the groove profile source electrode is set to the lower part of the source metal (10).
7. a kind of silicon carbide groove profile field oxygen power MOS with protective layer and heterojunction diode according to claim 1 Device, which is characterized in that the groove profile gate electrode and the lower part of the source metal (10), the side of N-type source region (5), p-type ditch The side of channel layer (4) contacts.
8. a kind of silicon carbide groove profile field oxygen power MOS with protective layer and heterojunction diode according to claim 1 Device, which is characterized in that the side of the N-type source region (5) is contacted with the side of the groove profile gate electrode, and N-type source region (5) are supported Bottom is contacted with another side with the P-type channel layer (4), top and the source metal (10) of the N-type source region (5) Lower contacts.
9. a kind of silicon carbide groove profile field oxygen power MOS with protective layer and heterojunction diode according to claim 1 Device, which is characterized in that the material of the P protective layer (9) is semiconductor material with wide forbidden band.
10. a kind of silicon carbide groove profile field oxygen power MOS with protective layer and heterojunction diode according to claim 9 Device, which is characterized in that the semiconductor material with wide forbidden band is GaN.
CN201811354615.9A 2018-11-14 2018-11-14 A kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with protective layer and heterojunction diode Pending CN109545840A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110828555A (en) * 2019-11-18 2020-02-21 重庆大学 Asymmetric heterojunction silicon carbide groove type field oxygen power MOS device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110828555A (en) * 2019-11-18 2020-02-21 重庆大学 Asymmetric heterojunction silicon carbide groove type field oxygen power MOS device

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Application publication date: 20190329