CN109522238B - Sorting method and device - Google Patents

Sorting method and device Download PDF

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CN109522238B
CN109522238B CN201811159505.7A CN201811159505A CN109522238B CN 109522238 B CN109522238 B CN 109522238B CN 201811159505 A CN201811159505 A CN 201811159505A CN 109522238 B CN109522238 B CN 109522238B
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memory
numbers
sorted
sequenced
sorting
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CN109522238A (en
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彭志文
朱先智
徐建红
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SHANGHAI KAIYING NETWORK TECHNOLOGY Co Ltd
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SHANGHAI KAIYING NETWORK TECHNOLOGY Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory

Abstract

The method comprises the steps of distributing a memory and determining the initial address of the memory when a plurality of numbers to be sorted need to be sorted; acquiring a plurality of numbers to be sorted; respectively mapping each digit to be sequenced to a corresponding bit position in the memory from the starting address based on a positive mapping function, and marking the bit position; the method comprises the steps of carrying out digital restoration on bit positions with marks in sequence based on a continuous and ordered storage rule of a memory and an inverse function corresponding to a mapping positive function to obtain a sequencing result of a plurality of numbers to be sequenced, so that the method can realize sequencing of the plurality of numbers to be sequenced by utilizing the continuity of the allocated memory and the orderliness of the memory and only by mapping the plurality of numbers to be sequenced to the bit positions corresponding to the memory, thereby achieving the purpose of rapidly sequencing the plurality of numbers to be sequenced and further improving the efficiency of sequencing the plurality of numbers to be sequenced.

Description

Sorting method and device
Technical Field
The present application relates to the field of computers, and in particular, to a sorting method and apparatus.
Background
In the prior art, data generally needs to be sorted, for example, 50 persons in a class need to be sorted from high to low, and for example, recharge of a user in a game application needs to be sorted from high to low. In the prior art, a bubble sorting algorithm, a selective sorting algorithm, a quick sorting (QuickSort) algorithm and the like are generally adopted to sort a plurality of numbers needing to be sorted, the bubble sorting algorithm and the selective sorting algorithm are low in sorting forest and only suitable for sorting a small number of numbers, and although the sorting efficiency of the quick sorting algorithm is much higher than that of the bubble sorting algorithm and the selective sorting algorithm, the efficiency of sorting the numbers with larger data volume is still not optimistic, so how to improve the numerical sorting under the large data becomes a main subject of research in the industry.
Disclosure of Invention
An object of the present application is to provide a sorting method and apparatus.
According to an aspect of the present application, there is provided a sorting method, wherein the method comprises:
allocating a memory and determining the initial address of the memory;
acquiring a plurality of numbers to be sorted;
respectively mapping each digit to be sequenced to a corresponding bit position in the memory from the initial address based on a positive mapping function, and marking the bit position;
and digitally restoring the bit positions with the marks in sequence based on the continuous and ordered storage rule of the memory and the inverse function corresponding to the positive mapping function to obtain the sequencing results of the plurality of numbers to be sequenced.
Further, in the above sorting method, while allocating a memory and determining a start address of the memory, the method further includes:
and determining the positive mapping function and the corresponding inverse mapping function according to the data type used for storing data in the memory.
Further, in the above sorting method, the mapping from the start address to each of the numbers to be sorted based on a positive mapping function to a corresponding bit position in the memory is ((p + pos), mod) ═ ((p + N/b), N% b),
b is the number of bits occupied by the data type used for storing data in the memory; p is the starting address of the memory, N is the number to be sorted, pos is the rounding of N divided by b, mod is the remainder of N divided by b, (p + pos) is used for indicating the address corresponding to the pos data type starting from the starting address p in the memory.
Further, in the above sorting method, the marking the bit positions includes: the bit position is marked with a 1.
Further, in the above sorting method, the digitally restoring bit positions with flags in sequence based on the continuous ordered storage rule of the memory and the inverse function corresponding to the positive mapping function to obtain the sorting results of the numbers to be sorted, includes:
based on the continuous ordered storage rule of the memory and the inverse function corresponding to the positive mapping function, carrying out digital restoration on the bit positions with the marks in sequence to obtain an initial sequencing result of the plurality of numbers to be sequenced corresponding to the memory;
acquiring the sequencing requirements of a user on the numbers to be sequenced;
determining a sorting result of the plurality of numbers to be sorted based on the sorting requirement and the initial sorting result.
According to another aspect of the present application, there is also provided a non-volatile storage medium having computer readable instructions stored thereon, which, when executed by a processor, cause the processor to implement the sorting method as described above.
According to another aspect of the present application, there is also provided an apparatus for sorting, wherein it comprises:
one or more processors;
a non-volatile storage medium for storing one or more computer-readable instructions,
when executed by the one or more processors, cause the one or more processors to implement the ordering method described above.
Compared with the prior art, when a plurality of numbers to be sorted need to be sorted, a memory is allocated and the initial address of the memory is determined; acquiring a plurality of numbers to be sorted; respectively mapping each digit to be sequenced to a corresponding bit position in the memory from the initial address based on a positive mapping function, and marking the bit position; based on the continuous ordered storage rule of the memory and the inverse function corresponding to the mapping positive function, the bit positions with the marks are digitally restored in sequence to obtain the sequencing results of the numbers to be sequenced, so that the digits to be sequenced can be sequenced as long as the numbers to be sequenced are mapped to the bit positions corresponding to the memory correspondingly by utilizing the continuity of the allocated memory and the orderliness of the memory (for example, the memory addresses are sequenced from small to large), and the purpose of rapidly sequencing the numbers to be sequenced is achieved, and the efficiency of sequencing the numbers to be sequenced is improved.
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Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
FIG. 1 illustrates a flow diagram of a ranking method in accordance with an aspect of the subject application;
the same or similar reference numbers in the drawings identify the same or similar elements.
Detailed Description
The present application is described in further detail below with reference to the attached figures.
In a typical configuration of the present application, the terminal, the device serving the network, and the trusted party each include one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include non-transitory computer readable media (transient media), such as modulated data signals and carrier waves.
As shown in fig. 1, a schematic flowchart of a sorting method according to an aspect of the present application is applied to an application scenario of sorting large-scale numbers, and the method includes step S11, step S12, step S13, and step S14, and specifically includes:
step S11, allocating a memory and determining the initial address of the memory; here, when the computer allocates a memory, the memory addresses are consecutive, and the allocation of a memory can be realized by, for example, the following memory allocation function:
unsigned short int*p=(unsigned short int*)malloc(sizeof(unsigned short int)*SIZE)
at the same time, the allocated memory is also ordered, i.e. ordered from small to large, for example a 2-byte memory is shown in the following table:
TABLE 1A 2-byte memory
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Table 1 shows a memory with an unsigned short int, which includes addresses 1000 and 1001 for the memory occupied by 2 bytes, where a byte has 8 bits, so that the memory has 16 bits from 0 to 15, which can be digitally marked
For another example, to allocate one memory by using short int (2 bytes) for balancing efficiency, if SIZE in the memory allocation function is 1M, the number of bit positions of the allocated memory is 1M × 2 bytes × 8 — 1600 ten thousand, that is, the memory allocated as 1M can realize sorting of integers within 1600 ten thousand.
Step S12, acquiring a plurality of numbers to be sorted; here, the number of numbers to be sorted may be hundreds, tens of millions, or even hundreds of millions.
Step S13, starting from the start address, mapping each of the numbers to be sorted to a corresponding bit position in the memory based on a positive mapping function, and marking the bit position;
and step S14, digitally restoring the bit positions with the marks in sequence based on the continuous ordered storage rule of the memory and the inverse function corresponding to the positive mapping function, and obtaining the sequencing results of the numbers to be sequenced.
Through the steps S11 to S14, by using the continuity of the allocated memory and the orderliness of the memory (for example, the memory addresses are already sorted from small to large), as long as the bits to be sorted are mapped to the bit positions corresponding to the memory and marked, and the bit positions with the marks are digitally restored according to the continuous and ordered storage rule of the memory, the sorting result of the numbers to be sorted can be obtained, and the sorting of the numbers to be sorted can be realized, so that the purpose of quickly sorting the numbers to be sorted is achieved, and the efficiency of sorting the numbers to be sorted is improved.
In this embodiment, the starting address of the allocated memory may be 0 or a preset address in the memory, and the following further description will take the starting address as 0 and the starting address as the preset address as examples.
Case one, when the starting address in the allocated memory is 0
Allocating a 128M short int (2 bytes) of memory via a computer memory instruction, wherein a byte has 8 bits, the allocated memory includes: 128M 2 x 8-20 billion bits, i.e., all integers in 20 billion can be ordered, and since a byte has 8 bits, then 16 bits can be used to map 16 numbers for a 2 byte short int, thus, if a number exists within 0-15, it is mapped to the corresponding bit position in the first short int, if the number is 16-31, then it is mapped to the corresponding bit position in the second short int, namely, according to the data type used for storing data in the allocated memory, the positive mapping function and the corresponding inverse mapping function are determined, herein, the data type includes, but is not limited to, short integer (short int), integer (int), long integer (long int), single precision (float), double precision (double), and the like.
At this time, if the data type is short int, the specific calculation formula of the positive mapping function is as follows:
pos is N/b is N/16; // the few short int in memory
mod N% b N% 16; // the second slot in the second short int
Wherein, N is a number to be sorted, b is the number of bits occupied by the data type for storing data in the memory, and here, if the data type for storing data in the allocated memory: the number of bits occupied by short int is 2 bytes × 8 — 16, then b is 16, pos is to divide N by b to get the integer, mod is to divide N by b to get the remainder, i.e. pos is used to indicate that the number N to be sorted is at the first short int in the memory, and mod is used to indicate that the number N to be sorted is at the mod bit position in the first short int in the memory.
For example, when the number 1860 to be sorted needs to be mapped to the memory 128M, pos — N/b — 1860/16 — 116, and mod — N% b — 1860% 16 — 4, that is, the number 1860 to be sorted is mapped to a bit position ((p + pos), mod) in the memory 128M and having a start address of 0: the 4 th bit in the 116 th short int is located (116, 4), where p is the start address of the memory, and at this time, p is 0; then, in order to conveniently and quickly find the bit position of the mapped number from the memory in the follow-up process, marking the bit position, and setting the bit position as: the position (116, 4) of the 4 th bit in the 116 th short int is marked as 1, wherein the formula for setting the corresponding bit position as 1 is as follows: (p + pos) |2^ mod, where p is the starting address of the memory, and when p is 0; thus, the numbers to be sorted can be mapped to the allocated 128M memories, so that the numbers to be sorted form an ordered sorting result in the memories.
As another example, the ranking numbers are treated separately in the 128M short int allocations: 1606. 1603, 1605, and 1604, wherein the starting address is 0, then according to the determined positive mapping function, mapping the bit position of 1606 is obtained as: point N/b 1606/16-100, mod N% b 1606% 16-6, i.e. mapping the to-be-sorted number 1606 to the position where the 6 th bit in the 100 th short int of the 128M short int is located (100, 6); according to the bit position mapping method of the number to be sorted 1606, positions (100, 3) where the number to be sorted 1603 is mapped to the 3 rd bit in the 100 th short int of the 128M short int are respectively calculated and mapped, a position (100, 5) where the number to be sorted 1605 is mapped to the 5 th bit in the 100 th short int of the 128M short int, and a position where the number to be sorted 1604 is mapped to the 4 th bit in the 100 th short int of the 128M short int are mapped, and a plurality of numbers to be sorted are: 1606. 1603, 1605 and 1604 are mapped to corresponding bit positions marked 1 respectively as shown in table 2 below:
table 2 numbers to sort: 1606. 1603, 1605 and 1604 respectively to which bit positions
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0
And then according to the continuous orderliness of the memory addresses, carrying out digital reduction on the data to be sorted corresponding to all the bit positions with marks in sequence on the basis of the inverse function corresponding to the positive mapping function, wherein the specific calculation formula of the positive mapping function is as follows:
pos is N/b is N/16; // the few short int in memory
mod N% b N% 16; // the second slot in the second short int
The formula of the inverse function corresponding to the positive mapping function is:
N(pos,mod)=pos*16+mod
n (pos, mod) is used to indicate a corresponding number after a number reduction is performed on a mod bit position in a pos short int of the allocated memory with the flag.
From table 2, bit positions 3, 4, 5, and 6 in the 100 th short int of the allocated memory are all marked as 1, and then the bit positions with the marks in table 2 may be sequentially digitally restored according to the inverse function corresponding to the mapping positive function, which are respectively:
n (100, 3) ═ 100 × 16+3 ═ 1603// N (100, 3) is used for indicating a corresponding number after the number reduction is carried out on the 3 rd bit position in the 100 th short int of the allocated memory with the mark;
N(100,4)=100*16+4=1604;
N(100,5)=100*16+5=1605;
N(100,6)=100*16+6=1606;
obtaining a plurality of numbers to be sorted: 1606. 1603, 1605 and 1604 correspond to the initial sorting results in 128M short int memories: 1603. 1604, 1605, and 1606;
then, acquiring the sorting requirements of the user on the numbers to be sorted; here, the sorting requirements of the user for the plurality of numbers to be sorted may include, but are not limited to: the order is from small to large; the sequence from big to small; sequencing the first preset number from small to large and sequencing the second preset number from large to small in sequence; sequencing the first preset number from large to small and sequencing the second preset number from small to large in a circulating mode; and sequencing from small to large/from large to small according to a preset proportion, and the like. For example, the initial ranking result obtained by ranking the numbers to be ranked in 1 to 20 is: 1. 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19 and 20, if the user's requirement for sorting the 20 numbers to be sorted is to sequentially cycle the sorting of the first predetermined number (5) from small to large and the sorting of the second predetermined number (5) from large to small, the obtained sorting result is: 1. 2, 3, 4, 5, 10, 9, 8, 7, 6, 11, 12, 13, 14, 15, 20, 19, 18, 17 and 16.
Finally, if the user is not aware of the number to be sorted: 1606. 1603, 1605 and 1604, according to the sorting requirement and the initial sorting result: 1603. 1604, 1605, and 1606, determining the plurality of numbers to be sorted: 1606. the ordering of 1603, 1605, and 1604 results in: 1606. 1605, 1604 and 1603, the sequencing of a plurality of numbers to be sequenced is realized by utilizing the continuity and the orderliness of the allocated memories, and the purpose of rapidly sequencing the numbers is achieved.
And secondly, when the initial address in the allocated memory is a preset address, the preset address can be determined by system setting when the memory is allocated.
After a memory of 128M short int (2 bytes) is allocated by a computer memory instruction, when the initial address of the memory is determined to be a memory address 12, a plurality of numbers to be sorted are required: 30. 60, 10 and 40, and calculating the bit positions mapped by the number to be sorted 30 according to the specific calculation formula of the positive mapping function as follows: pos is 30/16 is 1, mod is 30% 16 is 14, since the starting address is the memory address 12, the number to be sorted 30 is mapped to the position ((p + pos), mod) is ((p + N/b), N% b) is (14, 14) where the corresponding bit position in the memory is the 14 th bit of the memory address 14, where b is the number of bits occupied by the data type for storing data in the memory; p is the initial address of the memory, N is the number to be sorted, pos is the rounding of N divided by b, mod is the remainder of N divided by b, (p + pos) is used for indicating the address corresponding to the pos data type starting from the initial address p in the memory; according to the above step of mapping the number to be sorted 30 to the corresponding bit position in the memory, mapping the number to be sorted 60 (pos: 60/16 ═ 3, mod ═ 60% ═ 12) to the position (18, 12) where the corresponding bit position is the 12 th bit of the memory address 18 (18: 12+2 ═ 3), mapping the number to be sorted 10 (pos: 10/16 ═ 0, mod ═ 10%: 16 ═ 10) to the position (12, 10) where the corresponding bit position is the 10 th bit of the memory address 12 (12: 2 ═ 0), mapping the number to be sorted 40(pos ═ 40/16 ═ 2, mod ═ 40%: 16 ═ 8) to the position (16, 8) where the corresponding bit position is the 8 th bit of the memory address 16) in the memory, and searching the subsequent mapped bits from the memory, marking the bit positions, and enabling the plurality of numbers to be sequenced to be: 30. 60, 10 and 40 respectively correspond to bit positions: the position of the 14 th bit of the memory address 14, the position of the 12 th bit of the memory address 18, the position of the 10 th bit of the memory address 12, and the position of the 8 th bit of the memory address 16 are marked as 1, as shown in table 3. The formula for setting the corresponding bit position to 1 is: (p + pos) |2^ mod, where p is the starting address of the memory, and at this time, p ═ 12; as such, a number of numbers to be sorted may be: 30. 60, 10 and 40 are respectively mapped to the allocated 128M memories, so that a plurality of words to be sorted form an ordered sorting result in the memories.
Table 3 numbers to sort: 30. 60, 10 and 40 are mapped to bit positions in memory, respectively
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Address
0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 12
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 14
0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 16
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 18
And then according to the continuous orderliness of the memory addresses, carrying out digital reduction on the data to be sorted corresponding to all the bit positions with marks in sequence on the basis of the inverse function corresponding to the positive mapping function, wherein the specific calculation formula of the positive mapping function is as follows:
pos is N/b is N/16; // the first short int in memory starting from the start address p
mod N% b N% 16; // a few slots in the memory at the first port int starting from the start address p
The formula of the inverse function corresponding to the positive mapping function is:
N(p+pos,mod)=pos*16+mod
the memory management method includes that (p + pos) is used for indicating an address corresponding to a first pos data type starting from a starting address p in the memory, (p + pos, mod) is used for indicating a position where a mod bit in a first pos short int starting from the starting address 12 of the allocated memory with a mark is located, and N (pos, mod) is used for indicating a corresponding number after digit restoration is performed on a mod bit position in a second pos short int starting from the starting address 12 of the allocated memory with the mark.
From table 3, the 10 th bit position in the 0 th short int (memory address is 12) starting from the start address is 12 in the allocated memory is marked as 1, the 14 th bit position in the 1 st short int (memory address is 14 ═ 12+2, because one short int occupies two byte addresses) is marked as 1, the 8 th bit position in the 2 nd short int (memory address is 16 ═ 12+ 2) is marked as 1, and the 12 th bit position in the 3 rd short int (memory address is 18 ═ 12+2 × 3) is marked as 1, then the bits with marks in table 2 can be sequentially restored according to the inverse function (N (pos, mod) ═ b + mod ═ point 16+ mod) corresponding to the positive mapping function, and the numbers are respectively:
n (12, 10) ═ 0 × 16+10 ═ 10// N (0, 10) is used for indicating a corresponding number after the number reduction is carried out on the 3 rd bit position in the 0 th short int starting from the starting address 12 in the allocated memory with the mark;
N(14,14)=1*16+14=30;
N(16,8)=2*16+8=40;
N(18,12)=3*16+12=60;
obtaining a plurality of numbers to be sorted: 30. 60, 10 and 40 correspond to the initial ordering results in 128 short int memories: 10. 30, 40 and 60;
then, acquiring the sorting requirements of the user on the numbers to be sorted; if the user is not associated with the number to be sorted: 30. 60, 10 and 40, if the sorting requirements are sorted from big to small, according to the sorting requirements and the initial sorting result: 10. 30, 40 and 60, determining the plurality of numbers to be sorted: 30. the ordering results of 60, 10 and 40 are: 60. 40, 30 and 10, the sequencing of a plurality of numbers to be sequenced is realized by utilizing the continuity and the orderliness of the allocated memories, and the aim of rapidly sequencing the numbers is fulfilled.
According to another aspect of the application, there is also provided a non-volatile storage medium having computer-readable instructions stored thereon, which, when executed by a processor, cause the processor to carry out the method of any one of claims 1 to 5.
According to another aspect of the present application, there is also provided an apparatus for sorting, wherein it comprises:
one or more processors;
a non-volatile storage medium for storing one or more computer-readable instructions,
when executed by the one or more processors, cause the one or more processors to implement the method of any one of claims 1-5.
Here, for details of each embodiment of the apparatus for sorting, reference may be specifically made to corresponding parts of the method embodiment corresponding to the apparatus for sorting, and details are not described herein again.
In summary, in the present application, when a plurality of numbers to be sorted need to be sorted, a memory is allocated and a start address of the memory is determined; acquiring a plurality of numbers to be sorted; respectively mapping each digit to be sequenced to a corresponding bit position in the memory from the initial address based on a positive mapping function, and marking the bit position; based on the continuous ordered storage rule of the memory and the inverse function corresponding to the mapping positive function, the bit positions with the marks are digitally restored in sequence to obtain the sequencing results of the numbers to be sequenced, so that the digits to be sequenced can be sequenced as long as the numbers to be sequenced are mapped to the bit positions corresponding to the memory correspondingly by utilizing the continuity of the allocated memory and the orderliness of the memory (for example, the memory addresses are sequenced from small to large), and the purpose of rapidly sequencing the numbers to be sequenced is achieved, and the efficiency of sequencing the numbers to be sequenced is improved.
It should be noted that the present application may be implemented in software and/or a combination of software and hardware, for example, implemented using Application Specific Integrated Circuits (ASICs), general purpose computers or any other similar hardware devices. In one embodiment, the software programs of the present application may be executed by a processor to implement the steps or functions described above. Likewise, the software programs (including associated data structures) of the present application may be stored in a computer readable recording medium, such as RAM memory, magnetic or optical drive or diskette and the like. Additionally, some of the steps or functions of the present application may be implemented in hardware, for example, as circuitry that cooperates with the processor to perform various steps or functions.
In addition, some of the present application may be implemented as a computer program product, such as computer program instructions, which when executed by a computer, may invoke or provide methods and/or techniques in accordance with the present application through the operation of the computer. Program instructions which invoke the methods of the present application may be stored on a fixed or removable recording medium and/or transmitted via a data stream on a broadcast or other signal-bearing medium and/or stored within a working memory of a computer device operating in accordance with the program instructions. An embodiment according to the present application comprises an apparatus comprising a memory for storing computer program instructions and a processor for executing the program instructions, wherein the computer program instructions, when executed by the processor, trigger the apparatus to perform a method and/or a solution according to the aforementioned embodiments of the present application.
It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned. Furthermore, it is obvious that the word "comprising" does not exclude other elements or steps, and the singular does not exclude the plural. A plurality of units or means recited in the apparatus claims may also be implemented by one unit or means in software or hardware. The terms first, second, etc. are used to denote names, but not any particular order.

Claims (6)

1. A method of sorting, wherein the method comprises:
allocating a memory and determining the initial address of the memory;
acquiring a plurality of numbers to be sorted;
respectively mapping each number to be sorted to a corresponding bit position in the memory based on a positive mapping function from the starting address, and marking the bit position, where the bit position is ((p + pos), mod) ((p + N/b), N% b), and b is the number of bits occupied by a data type for storing data in the memory; p is the initial address of the memory, N is the number to be sorted, pos is the rounding of N divided by b, mod is the remainder of N divided by b, (p + pos) is used for indicating the address corresponding to the pos data type starting from the initial address p in the memory;
and digitally restoring the bit positions with the marks in sequence based on the continuous and ordered storage rule of the memory and the inverse function corresponding to the positive mapping function to obtain the sequencing results of the plurality of numbers to be sequenced.
2. The method of claim 1, wherein said allocating a memory and determining a starting address of said memory further comprises:
and determining the positive mapping function and the corresponding inverse mapping function according to the data type used for storing data in the memory.
3. The method of claim 1, wherein the marking the bit positions comprises: the bit position is marked with a 1.
4. The method according to claim 1, wherein the digitally restoring bit positions with labels in sequence based on the continuous ordered storage rule of the memory and the inverse function corresponding to the positive mapping function to obtain the ordering result of the numbers to be ordered, comprises:
based on the continuous ordered storage rule of the memory and the inverse function corresponding to the positive mapping function, carrying out digital restoration on the bit positions with the marks in sequence to obtain an initial sequencing result of the plurality of numbers to be sequenced corresponding to the memory;
acquiring the sequencing requirements of a user on the numbers to be sequenced;
determining a sorting result of the plurality of numbers to be sorted based on the sorting requirement and the initial sorting result.
5. A non-transitory storage medium having stored thereon computer readable instructions which, when executed by a processor, cause the processor to implement the method of any one of claims 1 to 4.
6. An apparatus for sorting, wherein it comprises:
one or more processors;
a non-volatile storage medium for storing one or more computer-readable instructions,
when executed by the one or more processors, cause the one or more processors to implement the method of any one of claims 1-4.
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