CN109508500B - Method for estimating FinFET threshold statistical distribution caused by random orientation of metal gate grains - Google Patents

Method for estimating FinFET threshold statistical distribution caused by random orientation of metal gate grains Download PDF

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CN109508500B
CN109508500B CN201811365053.8A CN201811365053A CN109508500B CN 109508500 B CN109508500 B CN 109508500B CN 201811365053 A CN201811365053 A CN 201811365053A CN 109508500 B CN109508500 B CN 109508500B
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statistical distribution
finfet
random orientation
grains
estimating
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CN109508500A (en
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戴良
吕伟锋
赵志峰
司鹏
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Hangzhou Dianzi University
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    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]

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Abstract

The inventionThe method for estimating the statistical distribution of FinFET threshold caused by the random orientation of metal gate grains specifically comprises 6 steps: firstly, designing a proper structure model by utilizing sentourus, then determining a parameter model of random orientation of grid metal crystal grains in sdevice, then simulating simulation/radio frequency performance parameters of 500 randomly generated random orientation models of grid metal crystal grains, and then extracting by using an aspect toolI dV g Curve and f _ VT1 function are called to extract device performance parameter V T And then, importing the related data into Origin, judging and fitting GaussAmp statistical distribution by utilizing an analysis tool box of the Origin according to a maximum likelihood method, and finally verifying the correctness of the statistical distribution through chi-square test. The invention provides a method for quickly and accurately estimating the statistical distribution of simulation/radio frequency performance variation of actual devices and circuits caused by the random orientation of the gate metal crystal grains of a FinFET device in the early stage of circuit design.

Description

Method for estimating FinFET threshold statistical distribution caused by random orientation of metal gate grains
Technical Field
The invention belongs to the field of semiconductor information devices, integrated devices and circuit design, and mainly relates to a method for estimating threshold voltage (V) of fin field effect transistor (FinFET) caused by random orientation (MGG) of gate metal (such as TaN material) grains T ) Statistical distribution method, and more particularly, to a method for fast and accurate prediction of V in FinFET devices and circuits due to MGG during actual manufacturing T Statistical distribution of performance variation.
Background
In the current integrated circuit industry, planar MOSFETs have failed to meet the increasing performance demands for transistors on the 22nm and below scale. Therefore, a multi-gate FinFET is proposed to replace the conventional planar MOSFET device. However, over decades of development, the fabrication of integrated devices and circuit chips has been very complex, involving a total of thousands of different process steps and the technical requirements of each step are also very high. These process steps integrate FinFET devices on a very small semiconductor wafer by relying on various physical or chemical processes such as ion implantation, annealing, etching, and deposition.
Although the current semiconductor manufacturing technology is mature, all fine particles of a silicon wafer cannot be controlled very accurately in the whole process, and as a result, certain random fluctuation phenomena occur in FinFET process parameters, so that the uncertainty of the performance of FinFET devices is influenced, and the performance yield of circuits formed by the FinFET devices is reduced.
According to the present state of the art, the sources of fluctuation that cause these phenomena mainly include: gate metal grain orientation random variation (MGG), line Edge Roughness (LER), random Doping Fluctuation (RDF), and the like. And related studies indicate that MGG has been identified as a major source of uncertainty affecting FinFET device performance relative to the other two random behaviors. MGG causes FinFET device parameter variations because: the gate metal is formed by an Atomic Layer Deposition (ALD) process, however, the entire deposition process of the atomic layer cannot be precisely controlled due to technical reasons, resulting in a metal layer of the gate consisting of several grains having a diameter of several nanometers and different orientations. Because the crystal grains with different orientations have different metal work functions, different metal-semiconductor work function differences (phi ms) are generated, so that different FinFET devices on the same semiconductor chip have different work function differences and the phi ms random fluctuation phenomenon is generated.
Taking tantalum nitride (TaN) metal gate as an example, it has three different work function values of 4.0 ev (100), 4.15 ev (200) and 4.8 ev (220), and the probability of occurrence is 50%, 30% and 20%, respectively. Apparently, [ phi ] ms is taken as the threshold voltage (V) T ) Main part of composition, V T And will also produce some random variation with work function fluctuation, showing some statistical distribution. However, the existing metal gate engineering technology can inhibit the V of the device caused by MGG T The effect of the characteristic change is little. Currently, many studies are only conducted to perform rough analysis and judgment according to a chart obtained by a large amount of sample data. In fact, however, this phenomenon must be accurately estimated and characterized with statistical distributions. Therefore, relatively fast and accurate statistical distribution of probability densities is used for prediction in early integrated device and circuit design and manufacture, and system is relied onIt is essential that the theory of science is used to test whether the estimated statistical distribution is reliable.
Disclosure of Invention
The invention provides a method for estimating FinFET threshold statistical distribution caused by random orientation of gate metal grains aiming at the defects of the prior art.
The invention adopts the following scheme to solve the technical problem:
a method for estimating statistical distribution of FinFET threshold voltage random fluctuation caused by random orientation of gate metal crystal grains specifically comprises the following steps:
a proper structure model is designed through Sentaurus software, parameters of the FinFET device are set, including a Ratio (RGG) of metal grains to metal areas of a grid electrode, the probability of grain directions and corresponding work function values are determined according to different metal characteristics, compromise of simulation efficiency and precision is considered, and 500 random device models are set and generated.
Then extracting outI d -V g Curve, and extracting the threshold voltage value V of the FinFET device by using an f _ VT1 function T
Then reading a large amount of data generated by random simulation of Sentaurus software into Origin, applying an analysis tool box of the Origin, and fitting and characterizing a Probability Density Function (PDF) and a cumulative probability function (CDF).
Finally, the correctness of the statistical distribution can be verified through a chi-square test.
The invention has the beneficial effects that: the invention can quickly and accurately predict the statistical distribution of the random fluctuation of the performance of the actual nanometer device and the integrated circuit caused by the random orientation effect of the metal crystal grains of the grid electrode in the early stage of the design of the FinFET device and the integrated circuit, and provides a certain guiding function for designing and manufacturing the integrated circuit chip.
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FIG. 1 is a block diagram of the technical scheme and specific steps of the present invention.
Detailed Description
As shown in fig. 1, the detailed implementation steps of this example are:
(1) According to the specific nanometer technology, the model parameters and the RGG value, corresponding model parameters and algorithms are designed in the Sentaurus simulation software.
(2) The randomly generated 500 gate metal grain random orientation models were set to predict the statistical results of actual integrated circuit fabrication.
(3) For nano FinFET devices, the devices are extracted using an aspect toolI d -V g Curve and calling f _ VT1 function to extract threshold voltage V of randomly generated FinFET model T A large amount of sample data.
(4) Then, a large amount of sample data generated by the Sentaurus simulation is imported and saved into each variable of Origin software.
(5) And (5) reading a large amount of sample data stored in the variables in the step (4) by utilizing an Origin analysis tool box, selecting a fitting dialog box in the analysis tool box, and then selecting nonlinear curve fitting to select GaussAmp statistical distribution for fitting and characterization.
(6) And (5) carrying out chi-square test on the sample data according to the statistical theory on the fitted statistical distribution result in the step (5), wherein the confidence probability is designed to be 0.05. If the obtained probability is greater than 0.05, the estimation of the sample data by the statistical distribution is correct, and the accuracy and the effectiveness of the statistical distribution are strictly proved by taking the statistical theory as a basis.
In summary, the present invention provides a method for estimating the MGG induced FinFET threshold voltage (V) T ) The method can well make up the defect that the performance change statistical distribution of the FinFET integrated device is judged only by depending on sample data, and the accuracy of the statistical distribution obtained by the method is tested according to the theory of statistics, so that the modern advanced FinFET integrated device and a circuit performance evaluation system are well perfected.
It should be understood by those skilled in the art that the above steps and schemes are only used for verifying the present invention, and are not meant to be limiting, and that the changes and modifications of the above steps and schemes are within the scope of the present invention.

Claims (3)

1. A method of estimating FinFET threshold statistical distribution due to random orientation of metal gate grains, comprising:
designing FinFET model parameters by aid of Sentaurus computer technology aided design software according to the actual process technology level;
generating 500 grid metal crystal grain random orientation models by random simulation;
extract using Inspect toolI d -V g Drawing a threshold voltage parameter of the FinFET device by calling an f _ VT1 function through the curve;
reading and storing a large amount of sample data generated by the Sentaurus simulation into each variable of Origin software;
and (3) fitting and representing the performance parameters and the change data information of the FinFET device by using an Origin analysis tool box and a probability density function and an accumulative probability function of Gaussamp distribution.
2. The method of claim 1, wherein the method comprises estimating statistical distribution of FinFET threshold values caused by random orientation of metal gate grains, wherein: and initially judging the correctness of the fitting result by using a maximum likelihood method, and confirming whether the statistical fitting characteristic is correct or not by using a chi-square test method.
3. The method of claim 1, wherein the method comprises estimating statistical distribution of FinFET threshold values caused by random orientation of metal gate grains, wherein: the confidence probability in the chi-square test method was set to 0.05.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103186691A (en) * 2012-09-17 2013-07-03 上海华力微电子有限公司 Independent double-grid FinFET channel potential distribution analysis model
CN104881520A (en) * 2015-05-04 2015-09-02 复旦大学 Tri-gate Fin FET (fin field effect transistor) potential and sub-threshold oscillation amplitude extracting method
CN106328652A (en) * 2015-06-30 2017-01-11 格罗方德半导体公司 Integrated circuit structure and methods of electrically connecting same
CN108052727A (en) * 2017-12-08 2018-05-18 杭州电子科技大学 A kind of metal gate Work function Change causes the method for estimation of gate capacitance statistical distribution

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Publication number Priority date Publication date Assignee Title
US9735275B2 (en) * 2015-12-18 2017-08-15 International Business Machines Corporation Channel replacement and bimodal doping scheme for bulk finFET threshold voltage modulation with reduced performance penalty

Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
CN103186691A (en) * 2012-09-17 2013-07-03 上海华力微电子有限公司 Independent double-grid FinFET channel potential distribution analysis model
CN104881520A (en) * 2015-05-04 2015-09-02 复旦大学 Tri-gate Fin FET (fin field effect transistor) potential and sub-threshold oscillation amplitude extracting method
CN106328652A (en) * 2015-06-30 2017-01-11 格罗方德半导体公司 Integrated circuit structure and methods of electrically connecting same
CN108052727A (en) * 2017-12-08 2018-05-18 杭州电子科技大学 A kind of metal gate Work function Change causes the method for estimation of gate capacitance statistical distribution

Non-Patent Citations (1)

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Title
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