CN109474197B

CN109474197B - Novel high-capacity multi-level hybrid clamping type topological structure and topological method

Info

Publication number: CN109474197B
Application number: CN201811341204.6A
Authority: CN
Inventors: 王湘明; 井庆阳; 邢作霞; 陈哲
Original assignee: Shenyang University of Technology
Current assignee: Shenyang University of Technology
Priority date: 2018-11-12
Filing date: 2018-11-12
Publication date: 2021-03-26
Anticipated expiration: 2038-11-12
Also published as: CN109474197A

Abstract

A novel high-capacity multi-level mixed clamping type topological structure and a topological method are disclosed, the structure is a three-phase four-bridge arm structure, a bridge arm is added on the traditional mixed three-phase structure and is specially used for clamping, and the structure does not need to be additionally provided with a voltage balancing circuit and use an independent direct current voltage source, and can realize neutral point potential balance by itself no matter what load characteristics are; the traditional clamping device is improved, a diode clamping device of a three-phase four-bridge arm topology is changed into a capacitor clamping device, and an active switch tube is added to serve as the clamping device, so that the topology realizes a current bidirectional path, and the problem of capacitor voltage imbalance is solved. The voltage-sharing problem inherent in the series operation of the power switches is effectively solved, and a good way is provided for realizing high-voltage energy control by using the low-voltage-withstanding level power switch.

Description

Novel high-capacity multi-level hybrid clamping type topological structure and topological method

Technical Field

The invention designs a novel hybrid clamping type multi-level converter, and belongs to the field of power electronic converters.

Background

The purpose of the multilevel topology is to realize multilevel output voltage, so that the converter can be applied to higher voltage occasions, and the harmonic performance of the output voltage is improved. In order to solve the problem of simultaneous switching on and off of series devices, new multilevel converters have been developed since the 80's of the 20 th century. Multilevel converters are classified into three basic types, a diode-clamped type, a flying capacitor type, and a cascade type. As the number of levels increases, the number of clamps required increases by a factor of 2 or even a square, and in addition to increasing system cost and control complexity, the large number of devices means an increased probability of failure. Various voltage-type multi-level converters are proposed in succession, and the control performance thereof is greatly improved, so that the voltage-type multi-level converters become the development direction of high-voltage large-capacity power electronic systems and are widely applied to the field of large-capacity power conversion.

The multilevel power inverter technology mainly comprises a multilevel inverter topology, a multilevel modulation strategy and a related control strategy for improving the operation performance of the multilevel inverter. However, the conventional multi-level inverter needs more power devices and has a complex structure, which causes the problems of large volume, low efficiency, high cost and the like, and greatly limits the practical application range thereof. However, the hybrid multilevel inverter is proposed as a novel concept, and is still in a preliminary research stage, because of various combination forms of hybrid multilevel topologies, a unified mode structure is not formed at home and abroad, and the practical application of the hybrid multilevel inverter is evaluated from the cost performance. The performance of such a hybrid multilevel inverter depends on the appropriate hybrid multilevel modulation strategy and its associated control strategy. At present, the hybrid multi-level modulation strategy is still in a continuous development stage, and is not the same as the traditional multi-level modulation strategy in the research of a system, and the universal research on the control of the same type hybrid topology is lacked. The asymmetry of the hardware structure of the hybrid topology simplifies the topology, and at the same time, the problems of continuous energy exchange among the hybrid power units, unbalanced capacitor voltage, large switching loss, unbalanced power unit output and the like are caused, which hinders the practical application of the hybrid multilevel inverter in the high-voltage and high-power driving occasions. Aiming at the practical problems, a reasonable mixed multi-level topology and a modulation and control strategy thereof need to be constructed to effectively solve the problems. At present, no report is found.

Disclosure of Invention

The purpose of the invention is as follows:

the invention provides a novel high-capacity multi-level mixed clamping type topological structure and a topological method, and aims to solve the problem that devices on the inner side of a bridge arm have turn-off overvoltage in a common diode clamping NPC topology and provide a bidirectional path for current. Compared with the common capacitance clamping topology, the topology only structurally adds two diodes D₁And D₂However, it is the presence of two clamping diodes that solves many problems.

The technical scheme is as follows:

the utility model provides a novel many level of large capacity mix clamping type topological structure which characterized in that: the structure is a three-phase four-bridge arm structure, a bridge arm is added on the traditional mixed three-phase structure and is specially used for clamping, and the structure does not need to be additionally provided with a voltage balancing circuit and use an independent direct-current voltage source, and can realize neutral-point potential balance under any load characteristic; the traditional clamping device is improved, a diode clamping device of a three-phase four-bridge arm topology is changed into a capacitor clamping device, and an active switch tube is added to serve as the clamping device, so that the topology realizes a current bidirectional path, and the problem of capacitor voltage imbalance is solved.

The topology method implemented by utilizing the novel high-capacity multi-level hybrid clamping topology structure is characterized in that: two ends of the level inverter are used for raising the output level from four levels to five levels; a first transistor S_alAnd an eighth transistor S_a8And clamping the IGBT second transistor S at the same time_c2A third transistor S_c3A fourth transistor S_c4Fifth transistor S_c5The sixth transistor S_c6The seventh transistor S_c7Realize the first capacitor C of the DC bus capacitor₁A second capacitor C₂Third capacitor C₃Fourth capacitor C₄And a clamp diode first diode D₁A second diode D₂A third diode D₃Are connected in parallel; in order to keep the dc bus capacitance and the cell site diode voltage balanced, the diode must be connected in parallel with different capacitances during a modulation cycle, so that the first transistor S_alA third transistor S_c3Fifth transistor S_c5And a seventh transistor S_c7The switch states are the same, and the second transistor S_c2A fourth transistor S_c4The sixth transistor S_c6And an eighth transistor S_a8The switch states are consistent, (S)_a1And S_a8Are connected in series to form a group), (S)_c3And S_c4Are connected in series to form a group), (S)_c5And S_c6Are connected in series to form a group), (S)_c7And S_a8One group in series) are respectively connected in parallel with the switches at the two ends of the capacitor to be oppositely switched on and off; when S is_alWhen conducting, clampBit diode D₁,D₂,D₃Respectively and DC bus capacitor C₁,C₂,C₃Parallel connection; when S is_alWhen turned off, the clamping diode D₁,D₂,D₃Then respectively connected with the DC bus capacitor C₂,C₃, C₄Parallel connection; the two capacitors connected in parallel can be charged and discharged according to the voltage difference between the two capacitors to keep the voltages of the two capacitors approximately equal; so when S_alIs conducted with C₁＝D₁,C₂＝D₂,C3＝D₃；S_a1When disconnected, has C2 ═ D₁,C₃＝D₂,C₄＝D₃(ii) a Visible clamping diode D₁,D₂,D₃Plays a role of a bridge, so that C₁＝D₁＝C₂,C₂＝D₂＝C₃,C₃＝D₃＝C₄I.e. C₁＝C₂＝C₃＝C₄＝D₁＝D₂＝D₃And self-balancing of capacitance and voltage is realized.

The method utilizes a large number of capacitor devices, the most important link is the selection of the parameters of the floating capacitor, and the excellent characteristics of the capacitance clamping type multi-level converter are all based on the premise of the voltage distribution balance of the floating capacitor. The invention provides a method for selecting a suspension capacitor, and because the voltage levels of the suspension capacitors are greatly different, if the capacitance capacity is selected based on the principle, the fluctuation amount of the capacitor voltage with a high voltage level is far larger than the fluctuation amount of a capacitor voltage with a low voltage level, so that the blocking voltage born by a power device is unbalanced.

In the method for selecting the suspension capacitor, because the voltage levels of the suspension capacitors are greatly different, if the capacitor capacity is selected based on the principle, the fluctuation amount of the capacitor voltage with a high voltage level is far larger than the fluctuation amount with a low voltage level, so that the blocking voltage born by the power device is unbalanced, and the unit voltage fluctuation equation is as follows:

in order to ensure that each power switch bears balanced blocking voltage, the fluctuation amplitude of each unit voltage is equal;

the optimal selection of the capacitor parameters is subject to the optimal selection problem of the floating capacitor parameters on the premise of ensuring that the voltage change of each unit is balanced and the fluctuation range does not exceed an allowable value. When the PWM method is adjusted based on duty ratio, the allowable fluctuation peak-peak value of unit voltage is assumed to be 2 epsilon V_cel,kWhen the load is a pure resistor, the required minimum floating capacitance is

Wherein, I_maxThe load current fundamental wave amplitude is shown, Ts is a switching period, and N is a level number. When the load becomes inductive

0≤cosθ≤1-(2/N)

The minimum suspension capacity required is

As can be seen from the above description, when the number of levels and the switching frequency of the inverter are fixed, the floating capacitance is mainly determined by the amplitude of the fundamental wave of the load current.

The advantages and effects are as follows:

the hybrid multi-level inversion technology is an innovative technology with distinct characteristics, and not only can fully utilize the characteristics of a power device, but also promotes further theoretical research of a multi-level modulation strategy. The hybrid clamping three-phase four-bridge arm multi-level converter has the obvious advantages that the level number of the inverter is easy to expand, the control of the inverter is very flexible, only one independent direct-current power supply is needed, and the design of a rectification side is very simple. When the rectifying side adopts a similar structure, the inverter can operate in four quadrants, and is particularly suitable for alternating-current transmission application occasions.

If there is no diode D₁And D₂Due to stray inductance in the line, S_a1An induced potential is generated across the terminals. But due to the presence of the clamping capacitor, S_a1The voltage at two ends is maximumIs finally clamped at C₁Over voltage, over voltage is not maintained; for S_a4Clamping principle and S_a1The same; but for S_a2Or S_a3In other words, the situation is different, diode D₁And D₂It cannot be provided with a clamping path. When the number of levels increases, all the inner switching devices except the 6 peripheral devices may need an auxiliary absorption loop, which greatly increases the complexity of the system and also increases the cost. After the diode is added, the diode and the clamping capacitor form a clamping circuit, so that S is_a2Or S_a3The overvoltage generated at turn-off is clamped. This topology is more flexible in terms of switching mode than capacitive clamping.

The invention also extends to a three-phase mixed clamping type three-level topological structure, and compared with a common diode clamping type three-level structure, the three-phase mixed clamping type three-level topological structure increases a clamping capacitor behind the diode of each bridge arm, and the structure not only solves the problem of diode series connection, but also reduces the unbalance of capacitor voltage on the direct current side by charging and discharging the added capacitor. The added capacitance can realize bidirectional current flow.

The hybrid clamped multilevel topology is a representative one of the topologies. For a multilevel inverter, the components that can realize clamping are usually diodes, capacitors and active switching devices, and two or more clamping devices are mixed together to realize the clamping function, which is called "mixed clamping".

The invention firstly provides a substructure in a mixed clamping five-level three-phase four-bridge arm: a mixed clamping three-phase four-bridge-arm single-phase topological structure. Topology is shown in FIG. 3, C_a1，C_a2，C_a3，C_a4，C_a5，C_a6，C_a7，D₂，D₂，D₃And S_a2，S_a3， S_a4，S_a5，S_a6，S_a7Diode-clamped four-level inverter, S, with improved composition_a1，S_a8The two ends of the improved diode-clamped four-level inverter are connected in series, so that the output level is raised from four levels to five levels.

The invention finally forms a hybrid clamping bit multi-level three-phase inverter topology with four bridge arms, as shown in the figure. The structure, the working mode and the control strategy of three-phase working bridge arms A, B and C in the figure are the same as those of a traditional diode box-position multi-level three-phase topology, and the fourth bridge arm is specially used for realizing a clamping function and balancing the voltage of each capacitor. The topology simultaneously adopts three devices of a diode, an active switch tube and a capacitor to realize clamping, and also belongs to mixed clamping.

The three bridge arms have the same structure, wherein each bridge arm is provided with three layers of floating capacitors. Each phase of bridge arm is formed by stacking and serially connecting N current conversion units and N voltage sources, wherein each current conversion unit is formed by two power switches S with complementary states_a1And S_a5The components are controlled independently; the voltage source is composed of a power supply V_dcAnd N-1 rated voltages are i V_dcSuspension capacitance C of/N (i ═ … …, N-1)_kComposition, capacitance is different for each level. As can be seen from the figure, the blocking voltage that the power switch receives at any time is (Vs)_a1)_off＝(V_sa5)_off＝V_ci-V_ci-1＝Vcel_iIn the formula, Vcel_iDefined as the ith converter cell voltage, V_ci＝iV_dcN, i ═ 1, …, n. as can be seen from the above formula, when V is_ci＝iV_dcat/N, the blocking voltages experienced by the power switches are all equal, and (Vs)_a1) _off＝(V_sa5)_off＝Vcel_i＝V_dcThe above formula indicates that when the voltage distribution of the floating capacitor is balanced, the capacitance clamping type inverter structurally ensures that all power devices in series operation bear the same load and the value is only V_dcBlocking voltage of/N. The voltage-sharing problem inherent in the series operation of the power switches is effectively solved, and a good way is provided for realizing high-voltage energy control by using the low-voltage-withstanding level power switch.

Drawings

FIG. 1 is a diode/capacitor hybrid clamped three-level single phase structure;

FIG. 2 is a three-phase three-level inverter topology;

FIG. 3 is a three-phase four-leg single-phase single-arm topology of a hybrid clamped five-level inverter;

fig. 4 shows a hybrid clamped three-phase four leg three-phase topology.

Detailed Description

A novel high-capacity multi-level hybrid clamping type topological structure is a three-phase four-bridge-arm structure, a bridge arm is added on the traditional hybrid three-phase structure and is specially used for clamping, and the structure does not need to be additionally provided with a voltage balancing circuit and use an independent direct-current voltage source, and can realize neutral-point potential balance by itself under any load characteristic; the traditional clamping device is improved, a diode clamping device of a three-phase four-bridge arm topology is changed into a capacitor clamping device, and an active switch tube is added to serve as the clamping device, so that the topology realizes a current bidirectional path, and the problem of capacitor voltage imbalance is solved. And two ends of the level inverter are used for increasing the output level from four levels to five levels. S_alAnd S_a8While also clamping IGBT S_c2,S_c3,S_c4,S_c5, S_c6，S_c7Together realizing DC bus capacitor C₁,C₂,C₃,C₄And a clamping diode D₁,D₂,D₃In parallel with each other. In order to keep the dc bus capacitance and the cell site diode voltage balanced, the diode must be connected in parallel with different capacitances during a modulation cycle, so S_al,S_c3,S_c5And S_c7Consistent on-off state, S_c2、S_c4,S_c6And S_a8The switch states are consistent, (S)_a1,S_c2)、(S_c3,S_c4),(S_c5,S_c6), (S_c7,S_a8) And four switches which are respectively connected in parallel at two ends of the capacitor are in open-close complementation. When S is_alWhen conducting, the clamping diode D₁,D₂,D₃Respectively and DC bus capacitor C₁,C₂,C₃Parallel connection; when S is_alWhen turned off, the clamping diode D₁,D₂,D₃Then respectively connected with the DC bus capacitor C₂,C₃,C₄And (4) connecting in parallel. Two capacitors connected in parallel will be based on itThe voltage difference between them is charged and discharged to keep the voltages approximately equal. So when S_alIs conducted with C₁＝D₁,C₂＝D₂,C3＝D₃；S_a1When disconnected, has C2 ═ D₁,C₃＝D₂,C₄＝D₃. Visible clamping diode D₁, D₂,D₃Plays a role of a bridge, so that C₁＝D₁＝C₂,C₂＝D₂＝C₃,C₃＝D₃＝C₄I.e. C₁＝C₂＝C₃＝C₄＝D₁＝D₂＝D₃And self-balancing of capacitance and voltage is realized. It can be seen that the precondition for self-balancing of the capacitor voltage is S_alAnd alternately switched on and off. The direct current bus capacitor and the clamping capacitor with stable voltage values provide stable voltage under a certain level for the output through different IGBT switch state combinations.

The relationship between the output voltage and the switch state of the topology is shown in Table 1, and the output of 3V can be seen_dc,2V_dc,1V_dcThe switch states corresponding to the levels are respectively provided with a pair of redundancies. Redundant switch state pairs, one switch state S_alOn, another switch state S_alAnd (6) turning off.

TABLE 1 relationship between output voltage and switching state

When S is_alWhen conducting, S_c2,S_c4,S_c6,S_a8Respectively formed by S_alIs connected in parallel with the diode D_c3,D_c5,D_c7Directly clamping to a corresponding direct current bus capacitor; when S is_alAt disconnection, S_al,S_c3,S_c5,S_c7Respectively formed by D_c2,D_c4,D_c6,S_alThe anti-parallel diode boxes are arranged on the corresponding direct current bus capacitors. The hybrid clamped topology includes an improved diode-clamped four-level inverterThe clamping diodes and the IGBTs in the variable topology are directly or indirectly clamped to the clamping capacitors. Ideally, the highest blocking voltage of all the tubes in the topology when disconnected is clamped to a capacitor voltage.

In order to make the objects and advantages of the present invention more apparent, the embodiments are described with reference to S_aiHas a switching function of S_iNeglecting the fluctuation component of the capacitor voltage, the output voltage at one side of the inverter is

Vo＝∑_i,……NS_iV_celi＝V_dc/N∑_i,……NS_i

If rated value V of unit voltage_ci＝V_dcThe per unit value of the output voltage is V when the/N is the basic value_O,P,U＝∑S_iSince the power factors are controlled independently of each other, in order to obtain a k (k) level output voltage, i 1

Different synthetic methods are used. The synthesis of the inverter output voltage will be described below by taking the three-phase four-leg hybrid circuit shown in fig. 3 as an example.

TABLE 2 relationship between switching state and output voltage of mixed-clamping five-level inverter and current of floating capacitor

Note: the symbols "+" and "-" in the table indicate that the floating capacitor current and the load current flow in the same direction and in opposite directions, respectively.

Table 1 shows V in FIG. 3_aThe method of (1). As can be seen from table 1, there are a large number of redundant phase voltage switch configurations in this hybrid clamp topology. Also, to output a given level voltage, a simultaneous level can be found regardless of the load current flow directionA method for synthesizing the voltage of a balance suspension capacitor. Therefore, compared with a diode clamping type multi-level inverter, the hybrid clamping type voltage synthesis control and the capacitor voltage balance control are more flexible.

The invention utilizes a large number of capacitor devices, so that the most important link in the concrete implementation process is the selection of the parameters of the floating capacitor, and the excellent characteristics of the capacitance clamping type multilevel converter are all based on the premise of the voltage distribution balance of the floating capacitor. Due to the uncontrollable nature of the load, on the basis of effectively controlling the balance of the voltage of the suspension capacitor, the control switch bears balanced blocking voltage which is very important for the safe operation of the inverter, and the control switch needs to select proper suspension capacitor parameters to realize the aim.

The invention provides a method for selecting a suspension capacitor, and because the voltage levels of the suspension capacitors are greatly different, if the capacitance capacity is selected based on the principle, the fluctuation amount of the capacitor voltage with a high voltage level is far larger than the fluctuation amount of a capacitor voltage with a low voltage level, so that the blocking voltage born by a power device is unbalanced. As can be seen from FIG. 3, the cell voltage ripple equation is

In order to ensure that each power switch bears balanced blocking voltage, the fluctuation amplitude of each unit voltage is equal. Therefore, under the action of the same load current and symmetric control pulse, the capacities of the floating capacitors are required to be equal. Therefore, the floating capacitor parameters are selected according to the principle that the fluctuation amplitudes of the capacitor voltages are equal, so that the floating capacitors are equal to ensure that the power switches bear balanced blocking voltages.

In the implementation method, the capacitance parameters are optimized and selected, and the optimized selection problem of the suspension capacitance parameters is to ensure that the voltage change of each unit is balanced and the fluctuation range does not exceed an allowable value. When the PWM method is adjusted based on duty ratio, the allowable fluctuation peak-peak value of unit voltage is assumed to be 2 epsilon V_cel,kWhen the load is a pure resistor, the required minimum floating capacitance is

0≤cosθ≤1-(2/N)

The minimum suspension capacity required is

The novel hybrid multi-level inverter provided by the invention is provided for solving the defects of the traditional multi-level inverter, can output more levels by fewer power devices and direct current power supplies, greatly simplifies a multi-level topological structure, reduces the volume and reduces the cost. Therefore, the hybrid multi-level inverter has a larger application value and a wide development prospect in the field of high-voltage high-power conversion.

Claims

1. A novel high-capacity multi-level mixed clamping topology method is characterized in that: the method is implemented according to the following structure:

the structure is a three-phase four-bridge arm structure, a bridge arm is added on the traditional mixed three-phase structure, a diode clamping device of a three-phase four-bridge arm topology is changed into a capacitance clamping device, and an active switching tube is added to serve as the clamping device, so that the topology realizes a current bidirectional path and improves the problem of unbalanced capacitance and voltage; after the diode is added, the diode and the clamping capacitor form a clamping circuit, so that S is_a2Or S_a3The overvoltage generated when switching off is clamped; in terms of switching mode, the topology is more flexible than capacitive clamping; c_a1，C_a2，C_a3，C_a4，C_a5，C_a6，C_a7，D₂，D₂，D₃And S_a2，S_a3，S_a4，S_a5，S_a6，S_a7Diode-clamped four-level inverter, S, with improved composition_a1，S_a8The two ends of the improved diode clamping type four-level inverter are connected in series, so that the output level is increased from four levels to five levels;

the method adds a bridge arm on the traditional mixed three-phase structure, and changes a diode clamping device of a three-phase four-bridge arm topology into a capacitance clamping device;

two ends of the level inverter are used for raising the output level from four levels to five levels; the diode must be connected in parallel with different capacitances during a modulation cycle, so that the first transistor S_alA third transistor S_c3Fifth transistor S_c5And a seventh transistor S_c7The switch states are the same, and the second transistor S_c2A fourth transistor S_c4The sixth transistor S_c6And an eighth transistor S_a8The switch states are consistent, and four groups of switches connected in parallel at two ends of the capacitor respectively are complementary to each other in an open-close mode after being connected in series; when S is_alWhen conducting, the clamping diode D₁,D₂,D₃Respectively and DC bus capacitor C₁,C₂,C₃Parallel connection; when S is_alWhen turned off, the clamping diode D₁,D₂,D₃Then respectively connected with the DC bus capacitor C₂,C₃,C₄Parallel connection; the two capacitors connected in parallel can be charged and discharged according to the voltage difference between the two capacitors to keep the voltages of the two capacitors approximately equal; so when S_alIs conducted with C₁＝D₁,C₂＝D₂,C3＝D₃；S_a1When disconnected, has C2 ═ D₁,C₃＝D₂,C₄＝D₃(ii) a Visible clamping diode D₁,D₂,D₃Plays a role of a bridge, so that C₁＝D₁＝C₂,C₂＝D₂＝C₃,C₃＝D₃＝C₄I.e. C₁＝C₂＝C₃＝C₄＝D₁＝D₂＝D₃Realizing capacitor voltageAnd (4) self-balancing.

2. The topological method according to claim 1, characterized in that: the four groups after the series connection are as follows: s_a1And S_a8Are connected in series as a group S_c3And S_c4Are connected in series as a group S_c5And S_c6Are connected in series as a group S_c7And S_a8Are connected in series to form a group.

3. The topological method according to claim 1, characterized in that: in the method for selecting the suspension capacitor, because the voltage levels of the suspension capacitors are greatly different, if the capacitor capacity is selected based on the voltage levels, the fluctuation amount of the capacitor voltage with a high voltage level is far larger than the fluctuation amount with a low voltage level, so that the blocking voltage born by the power device is unbalanced, and the unit voltage fluctuation equation is as follows:

in order to ensure that each power switch bears balanced blocking voltage, the fluctuation amplitude of each unit voltage is equal; the optimal selection of the capacitor parameters is carried out, and the optimal selection of the floating capacitor parameters is based on the condition that the voltage change of each unit is balanced and the fluctuation range does not exceed an allowable value; when the PWM method is adjusted based on duty ratio, the allowable fluctuation peak-peak value of unit voltage is assumed to be 2 epsilon V_cel,kWhen the load is a pure resistor, the required minimum floating capacitance is

Wherein, I_maxIs the load current fundamental wave amplitude, Ts is the switching period, N is the level number; the minimum suspension capacity required when the load inductive property is more than or equal to 0 and less than or equal to 1- (2/N)

From the above canIt is known that when the number of levels and the switching frequency of the inverter are constant, the floating capacitance is mainly determined by the amplitude of the fundamental wave of the load current.

4. The topological method according to claim 3, wherein: the relationship between output voltage and switching state is shown below, with a 3V output seen_dc,2V_dc,1V_dcA pair of redundancies exist in the switch states corresponding to the levels respectively; redundant switch state pairs, one switch state S_alOn, another switch state S_alTurning off;

relationship between output voltage and switching state:

when S is_alWhen conducting, S_c2,S_c4,S_c6,S_a8Respectively formed by S_alIs connected in parallel with the diode D_c3,D_c5,D_c7Directly clamping to a corresponding direct current bus capacitor; when S is_alAt disconnection, S_al,S_c3,S_c5,S_c7Respectively formed by D_c2,D_c4,D_c6,S_alThe anti-parallel diode box position is arranged on the corresponding direct current bus capacitor; each clamping diode and IGBT in the improved diode clamping four-level inversion topology contained in the mixed clamping topology are directly or indirectly clamped on a clamping capacitor; therefore, ideally, the highest blocking voltage when all the tubes in the topology are disconnected is clamped to a capacitor voltage;

order S_aiHas a switching function of S_iNeglecting the fluctuation component of the capacitor voltage, the output voltage at one side of the inverter is

Vo＝∑_i，......NS_iV_celi=V_dc/N Σ_i，......NS_i

If rated value V of unit voltage_ci＝V_dcThe per unit value of the output voltage is V when the/N is the basic value_O,P,U＝∑S_iSince the control of the power factors is independent of one another, k, o, 1.... multidot.n; level output voltage, in common

Different synthetic methods are used.