CN109471750B - SOE jitter elimination method and system - Google Patents
SOE jitter elimination method and system Download PDFInfo
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- CN109471750B CN109471750B CN201811318566.3A CN201811318566A CN109471750B CN 109471750 B CN109471750 B CN 109471750B CN 201811318566 A CN201811318566 A CN 201811318566A CN 109471750 B CN109471750 B CN 109471750B
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Abstract
The invention discloses an SOE jitter elimination method and a system, which belong to the technical field of power system automation and are characterized in that: the method comprises the following steps: the method comprises the following steps: setting a time window; wherein: the time window is a 16-bit or 32-bit or 64-bit unsigned integer and is represented by continuous 1 bits, the size of the time window depends on the length of jitter elimination time, and the represented jitter elimination time is an integral multiple of a sampling period; step two: recording a real-time opening state; the method specifically comprises the following steps: recording a real-time opening state by using an integer, wherein the real-time opening state is a 16-bit or 32-bit or 64-bit unsigned integer, and the real-time opening state is consistent with a time window; the current open state is recorded at the lowest bit of the integer; shifting the integer left by one bit before each recording; step three: judging the state of starting after eliminating tremble; the method specifically comprises the following steps: and carrying out bit AND operation on the real-time open state and the time window, updating the open state after jitter elimination only when the result is equal to 0 or the time window value, and otherwise, maintaining the original state.
Description
Technical Field
The invention belongs to the technical field of power system automation, and particularly relates to an SOE jitter elimination method and an SOE jitter elimination system.
Background
As is known, when there is disturbance or jitter in the input signal, if the input signal is not processed, it may cause the event sequence recording system soe (sequence Of event) to reject or report by mistake, and even cause the relay protection operation to be abnormal. At this time, a software jitter elimination method is often adopted to filter out disturbed information, that is, after the jitter elimination time is kept in the open state, the open-circuit displacement is determined. The conventional processing method comprises the steps of reading a system clock, capturing an opening change edge, storing the system clock, calculating and comparing duration and the like, the whole process is executed in interruption, the operation is complex, the CPU resource occupation is large, and the efficiency is low.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides an SOE jitter elimination method and an SOE jitter elimination system in order to reduce the load of a CPU and simply and efficiently realize the jitter elimination function of an incoming signal.
One of the objectives of the present invention is to provide an SOE jitter elimination method, which implements the SOE jitter elimination processing by the shift comparison and logic operation of data bits; at least comprises the following steps:
the method comprises the following steps: setting a time window; wherein:
the time window is a 16-bit or 32-bit or 64-bit unsigned integer and is represented by continuous 1 bits, the size of the time window depends on the length of jitter elimination time, and the represented jitter elimination time is an integral multiple of a sampling period;
step two: recording a real-time opening state; the method specifically comprises the following steps:
recording a real-time opening state by using an integer, wherein the real-time opening state is a 16-bit or 32-bit or 64-bit unsigned integer, and the real-time opening state is consistent with a time window; the current open state is recorded at the lowest bit of the integer; shifting the integer left by one bit before each recording;
step three: judging the state of starting after eliminating tremble; the method specifically comprises the following steps:
and carrying out bit AND operation on the real-time open state and the time window, updating the open state after jitter elimination only when the result is equal to 0 or the time window value, and otherwise, maintaining the original state.
Another object of the present invention is to provide a system of an SOE jitter elimination method, which at least comprises:
time window setting module: setting a time window; wherein:
the time window is a 16-bit or 32-bit or 64-bit unsigned integer and is represented by continuous 1 bits, the size of the time window depends on the length of jitter elimination time, and the represented jitter elimination time is an integral multiple of a sampling period;
the real-time entry state recording module: recording a real-time opening state; the method specifically comprises the following steps:
recording a real-time opening state by using an integer, wherein the real-time opening state is a 16-bit or 32-bit or 64-bit unsigned integer, and the real-time opening state is consistent with a time window; the current open state is recorded at the lowest bit of the integer; shifting the integer left by one bit before each recording;
and a debounce after-entering state judgment module: judging the state of starting after eliminating tremble; the method specifically comprises the following steps:
and carrying out bit AND operation on the real-time open state and the time window, updating the open state after jitter elimination only when the result is equal to 0 or the time window value, and otherwise, maintaining the original state.
It is a further object of the present invention to provide a computer program for implementing an SOE jitter reduction method.
The fourth objective of the present invention is to provide an information data processing terminal for implementing the SOE jitter elimination method.
It is a further object of the present invention to provide a computer-readable storage medium, comprising instructions which, when run on a computer, cause the computer to perform an SOE debounce method.
In summary, the advantages and positive effects of the invention are:
the invention realizes the SOE jitter elimination function simply and efficiently, and occupies less CPU resources because the system clock does not need to be read additionally and the deflection time does not need to be recorded in the jitter elimination process; the bit operation is adopted to replace the addition and subtraction operation, so the realization efficiency is high. Particularly, when the number of the open loops is large, the utilization rate of the CPU can be obviously reduced, the performance of the CPU is improved, and the method has obvious practical significance.
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FIG. 1 is a flow chart of a preferred embodiment of the present invention;
FIG. 2 is a system block diagram of a preferred embodiment of the present invention;
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the following embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
An SOE jitter elimination method realizes SOE jitter elimination processing through shift comparison and logic operation of data bits, and comprises the following specific steps:
step 1: a time window is set. The time window is an integer which can be a 16-bit, 32-bit or 64-bit unsigned integer, and is expressed by continuous 1 bits, the size of the integer depends on the length of the jitter elimination time, and the represented jitter elimination time is an integral multiple of the sampling period;
step 2: and recording the real-time opening state. Recording real-time open state by using integer, wherein the real-time open state can be 16-bit, 32-bit or 64-bit unsigned integer, but needs to be consistent with a time window; the current open state is recorded at the lowest bit of the integer; before each recording, the integer is shifted to the left by one bit;
and step 3: and judging the state of the switch-on after the jitter is eliminated. And carrying out bit AND operation on the real-time open state and the time window, updating the open state after jitter elimination only when the result is equal to 0 or the time window value, and otherwise, maintaining the original state. When the 1 is set to represent the on-position and the clear 0 represents the off-position, the result is 0, and the on-position is opened after the jitter is eliminated; the result is equal to the time window value, indicating that the switch-in and switch-off are performed after the jitter is eliminated. When the setting 1 represents the open position and the clear 0 represents the closed position, the result is 0, and the open position and the closed position are opened after the jitter is eliminated; the result is equal to the time window value, indicating that the split bit is open after debounce.
A first preferred embodiment of the invention is described in detail below with reference to fig. 1:
an SOE jitter elimination method comprises the following steps:
step 1: setting a time window, wherein the time window is a 32-bit unsigned integer and is marked as a mask, the size of the time window depends on the length of jitter elimination time, and the represented jitter elimination time is an integral multiple of a sampling period; assuming that the sampling period is 500us and the jitter elimination time is 5ms in this example, 11 consecutive 1 bits are needed for representation, i.e., mask is 0x7 FF;
step 2: recording a real-time entry state, wherein the real-time entry state is consistent with the type of time window data, and the real-time entry state is recorded by using a 32-bit unsigned integer and is marked as di; before recording, the integer is shifted to the left by one bit, namely di ═ di < < 1; the current open state is recorded at the lowest bit of the integer, in this example, the bit is set to 1 to represent an on bit, and clear 0 to represent a off bit, and in the same way, when the on bit is opened, di ═ di |0x1, and when the off bit is opened, di ═ di & (∼ 0x 1);
and step 3: and judging the state of the switch-on after the jitter is eliminated. And performing bit AND operation on the real-time entry state and the time window, wherein the result is still a 32-bit unsigned integer and is marked as value, and then the value is di | mask. When the value is 0, updating the input state after jitter elimination into a split state; and when the value is equal to the mask, updating the input state after jitter elimination to be an on-position state, and otherwise, maintaining the original state.
A second preferred embodiment of the invention is described in detail below with reference to fig. 2:
an SOE debouncing system comprising:
time window setting module: setting a time window; wherein:
the time window is a 16-bit or 32-bit or 64-bit unsigned integer and is represented by continuous 1 bits, the size of the time window depends on the length of jitter elimination time, and the represented jitter elimination time is an integral multiple of a sampling period;
the real-time entry state recording module: recording a real-time opening state; the method specifically comprises the following steps:
recording a real-time opening state by using an integer, wherein the real-time opening state is a 16-bit or 32-bit or 64-bit unsigned integer, and the real-time opening state is consistent with a time window; the current open state is recorded at the lowest bit of the integer; shifting the integer left by one bit before each recording;
and a debounce after-entering state judgment module: judging the state of starting after eliminating tremble; the method specifically comprises the following steps:
and carrying out bit AND operation on the real-time open state and the time window, updating the open state after jitter elimination only when the result is equal to 0 or the time window value, and otherwise, maintaining the original state.
In a third preferred embodiment, a computer program for implementing an SOE jitter elimination method includes the following steps:
step 1: a time window is set. The time window is an integer which can be a 16-bit, 32-bit or 64-bit unsigned integer, and is expressed by continuous 1 bits, the size of the integer depends on the length of the jitter elimination time, and the represented jitter elimination time is an integral multiple of the sampling period;
step 2: and recording the real-time opening state. Recording real-time open state by using integer, wherein the real-time open state can be 16-bit, 32-bit or 64-bit unsigned integer, but needs to be consistent with a time window; the current open state is recorded at the lowest bit of the integer; before each recording, the integer is shifted to the left by one bit;
and step 3: and judging the state of the switch-on after the jitter is eliminated. And carrying out bit AND operation on the real-time open state and the time window, updating the open state after jitter elimination only when the result is equal to 0 or the time window value, and otherwise, maintaining the original state. When the 1 is set to represent the on-position and the clear 0 represents the off-position, the result is 0, and the on-position is opened after the jitter is eliminated; the result is equal to the time window value, indicating that the switch-in and switch-off are performed after the jitter is eliminated. When the setting 1 represents the open position and the clear 0 represents the closed position, the result is 0, and the open position and the closed position are opened after the jitter is eliminated; the result is equal to the time window value, indicating that the split bit is open after debounce.
The fourth preferred embodiment is an information data processing terminal for implementing the SOE jitter elimination method. The SOE jitter elimination method comprises the following steps:
step 1: a time window is set. The time window is an integer which can be a 16-bit, 32-bit or 64-bit unsigned integer, and is expressed by continuous 1 bits, the size of the integer depends on the length of the jitter elimination time, and the represented jitter elimination time is an integral multiple of the sampling period;
step 2: and recording the real-time opening state. Recording real-time open state by using integer, wherein the real-time open state can be 16-bit, 32-bit or 64-bit unsigned integer, but needs to be consistent with a time window; the current open state is recorded at the lowest bit of the integer; before each recording, the integer is shifted to the left by one bit;
and step 3: and judging the state of the switch-on after the jitter is eliminated. And carrying out bit AND operation on the real-time open state and the time window, updating the open state after jitter elimination only when the result is equal to 0 or the time window value, and otherwise, maintaining the original state. When the 1 is set to represent the on-position and the clear 0 represents the off-position, the result is 0, and the on-position is opened after the jitter is eliminated; the result is equal to the time window value, indicating that the switch-in and switch-off are performed after the jitter is eliminated. When the setting 1 represents the open position and the clear 0 represents the closed position, the result is 0, and the open position and the closed position are opened after the jitter is eliminated; the result is equal to the time window value, indicating that the split bit is open after debounce.
A computer-readable storage medium including instructions which, when executed on a computer, cause the computer to perform an SOE debouncing method, the SOE debouncing method including the steps of: the SOE jitter elimination method comprises the following steps: step 1: a time window is set. The time window is an integer which can be a 16-bit, 32-bit or 64-bit unsigned integer, and is expressed by continuous 1 bits, the size of the integer depends on the length of the jitter elimination time, and the represented jitter elimination time is an integral multiple of the sampling period;
step 2: and recording the real-time opening state. Recording real-time open state by using integer, wherein the real-time open state can be 16-bit, 32-bit or 64-bit unsigned integer, but needs to be consistent with a time window; the current open state is recorded at the lowest bit of the integer; before each recording, the integer is shifted to the left by one bit;
and step 3: and judging the state of the switch-on after the jitter is eliminated. And carrying out bit AND operation on the real-time open state and the time window, updating the open state after jitter elimination only when the result is equal to 0 or the time window value, and otherwise, maintaining the original state. When the 1 is set to represent the on-position and the clear 0 represents the off-position, the result is 0, and the on-position is opened after the jitter is eliminated; the result is equal to the time window value, indicating that the switch-in and switch-off are performed after the jitter is eliminated. When the setting 1 represents the open position and the clear 0 represents the closed position, the result is 0, and the open position and the closed position are opened after the jitter is eliminated; the result is equal to the time window value, indicating that the split bit is open after debounce.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When used in whole or in part, can be implemented in a computer program product that includes one or more computer instructions. When loaded or executed on a computer, cause the flow or functions according to embodiments of the invention to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, the computer instructions may be transmitted from one website site, computer, server, or data center to another website site, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL), or wireless (e.g., infrared, wireless, microwave, etc.)). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that includes one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (4)
1. An SOE jitter elimination method, which realizes SOE jitter elimination processing through shift comparison and logic operation of data bits; the method is characterized in that: at least comprises the following steps:
the method comprises the following steps: setting a time window; wherein:
the time window is a 16-bit or 32-bit or 64-bit unsigned integer and is represented by continuous 1 bits, the size of the time window depends on the length of jitter elimination time, and the represented jitter elimination time is an integral multiple of a sampling period;
step two: recording a real-time opening state; the method specifically comprises the following steps:
recording a real-time opening state by using an integer, wherein the real-time opening state is a 16-bit or 32-bit or 64-bit unsigned integer, and the real-time opening state is consistent with a time window; the current open state is recorded at the lowest bit of the integer; shifting the integer left by one bit before each recording;
step three: judging the state of starting after eliminating tremble; the method specifically comprises the following steps:
and carrying out bit AND operation on the real-time open state and the time window, updating the open state after jitter elimination only when the result is equal to 0 or the time window value, and otherwise, maintaining the original state.
2. The system of SOE debouncing method of claim 1, wherein: at least comprises the following steps:
time window setting module: setting a time window; wherein:
the time window is a 16-bit or 32-bit or 64-bit unsigned integer and is represented by continuous 1 bits, the size of the time window depends on the length of jitter elimination time, and the represented jitter elimination time is an integral multiple of a sampling period;
the real-time entry state recording module: recording a real-time opening state; the method specifically comprises the following steps:
recording a real-time opening state by using an integer, wherein the real-time opening state is a 16-bit or 32-bit or 64-bit unsigned integer, and the real-time opening state is consistent with a time window; the current open state is recorded at the lowest bit of the integer; shifting the integer left by one bit before each recording;
and a debounce after-entering state judgment module: judging the state of starting after eliminating tremble; the method specifically comprises the following steps:
and carrying out bit AND operation on the real-time open state and the time window, updating the open state after jitter elimination only when the result is equal to 0 or the time window value, and otherwise, maintaining the original state.
3. An information data processing terminal for implementing the SOE jitter mitigation method of claim 1.
4. A computer-readable storage medium comprising instructions that, when executed on a computer, cause the computer to perform the SOE debouncing method of claim 1.
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| CN101986217A (en) * | 2010-11-03 | 2011-03-16 | 江阴众和电力仪表有限公司 | Accurate measurement and elimination method of maximum accumulative error of time of sequence of event |
| CN102999461A (en) * | 2011-09-16 | 2013-03-27 | 飞兆半导体公司 | Conversion circuit and method of serial interface |
| CN103457352A (en) * | 2013-08-08 | 2013-12-18 | 许继集团有限公司 | BCD gear information collection method for intelligent substation |
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