CN102999461A - Conversion circuit and method of serial interface - Google Patents
Conversion circuit and method of serial interface Download PDFInfo
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- CN102999461A CN102999461A CN 201110275398 CN201110275398A CN102999461A CN 102999461 A CN102999461 A CN 102999461A CN 201110275398 CN201110275398 CN 201110275398 CN 201110275398 A CN201110275398 A CN 201110275398A CN 102999461 A CN102999461 A CN 102999461A
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Abstract
The invention discloses a conversion circuit and a conversion method of a serial interface. The circuit comprises a generation module, a counting module and a storage and output module, wherein the generation module is used for generating a cyclic time window signal according to the pin Din of an input single-wire serial interface; within each cycle of the time window signal, the time window signal is regarded to be valid within the preset time of starting from the first falling edge of the pin Din and is regarded to be invalid within preset time of arrival, and after the time window signal is regarded to be invalid, the time window signal starts to enter a next cycle of the time window signal from the next falling edge of the pin Din; the counting module is used for counting the number of the rising edges of the pin Din when the time window signal is valid, and is reset when the time window signal is invalid; and the storage and output module is used for storing the counting result of the counting module according to the time sequence of the time window signal before the counting module is reset, and jointly outputting the stored counting result by using an output pin Dout1 and an output pin Dout2. By using the conversion circuit and the conversion method of the serial interface, the performance of a system is improved.
Description
Technical field
The present invention relates to electronic circuit field, relate in particular to a kind of change-over circuit and method of serial line interface.
Background technology
In the prior art, the communication modes between the electronic circuit mainly is divided into parallel communication and serial communication.Wherein, the communications protocol of parallel communication is simpler, but signal wire is more; The signal wire of serial communication is less, realizes easily long-distance transmissions, but communications protocol (that is, interface circuit) is complicated.
General low and middle-end electronic product; for example; main frame is connected with signal between the liquid crystal display driver module; single-chip microcomputer and light-emitting element array; communication between the charactron; these communication interfaces generally only carry out the one-way data transmission; and to data rate also less demanding (Microsecond grade even Millisecond); but all need communication interface simple as much as possible; be easy to realize; and because LCD MODULE; charactron generally is installed in electronic product; on the panel of instrument and equipment, and a segment distance is arranged between the main frame, so; be not suitable for using parallel communication, usually can adopt single wire serial interface in this case.
In addition, under many circumstances, particularly in the power supply product design, can meet with continually the limited problem of number of pin.For example, in wafer-level package (Chip Scale Package is referred to as CSP), two pins will take whole chip one-third of the area, not only wasted the area of source element, also limited current capacity, so, also be fit in this case realize with single wire serial interface, only by a pin the transmission of data, take to reduce pin, realize less encapsulation, thereby reduced cost.
At present, the universal serial bus of commonly using has bus between the IC, and (Inter-Integrated Circuit is referred to as I
2C), USB (universal serial bus) (Universal Serial Bus is referred to as USB) etc., serial line interface has serial peripheral interface (Serial Peripheral Interface is referred to as SPI), RS-232 etc., but often needs many signal wires.And how to realize the compatibling problem of single wire serial interface and multi-thread universal serial bus or interface, be a direction that requires study.
Although also have the communications protocol (1-wire) of single line in the prior art, its ultimate principle is by produce low pulse at single line, judge 0 or 1 with the width of pulse, but, owing to be to judge by the width of pulsewidth, so wide being bound to of corresponding long pulse than short pulse duration length much can cause message transmission rate to descend like this.Simultaneously, also must satisfy the concrete time span of output pulse width as controller, therefore, it is very inconvenient that control is got up.
In correlation technique, if some single serial protocols carry out data transmission, controller must satisfy the time slot requirement so.In many design circuits that do not comprise oscillator, there are not enough pins to be used for steering logic, the work of controller is very complicated, and comprise the design circuit of oscillator, need the oscillation frequency of reference oscillator to come count pulse, and also can consumes power when not having data transmission to occur, this has all limited applying of chip.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of conversion plan of serial line interface, causes chip to promote limited problem with the poor compatibility that solves at least single wire serial interface in the above-mentioned correlation technique.
To achieve these goals, according to an aspect of the present invention, provide a kind of change-over circuit of serial line interface.
Change-over circuit according to serial line interface of the present invention comprises: generation module is used for the pin D according to the single wire serial interface of input
InProduce periodic time window signal, wherein, within each cycle of time window signal, the time window signal is from D
InFirst negative edge be designated as in schedule time of beginning effectively, and when the schedule time arrives, be designated as invalid, the time window signal be designated as invalid after, from D
InNext negative edge begin the next cycle of entry time window signal; Counting module is used for when the time window signal is effective, to D
InThe number of rising edge count; And when the time window invalidating signal, the reset count module; And the storage output module, be used for the count results according to sequential stored count module before counting module resets of time window signal, and use output pin D
Out1And D
Out2The count results of uniting the output storage.
Preferably, this change-over circuit also comprises: calibration module is used for the time window signal that the time-delay generation module produces, to guarantee the D of storage output module
Out1And D
Out2The count results of uniting output storage before counting module resets.
Preferably, calibration module comprises four mutually phase inverters of series connection.
Preferably, counting module comprises two d type flip flops, and wherein, the reset terminal of two d type flip flops links to each other with the output terminal of calibration module.
Preferably, the schedule time is determined by the delay cell in the generation module.
Preferably, the storage output module comprises two digital register, and wherein, the output of two digital register is respectively D
Out1And D
Out2
Preferably, this change-over circuit also comprises: latch module, and for the D in each cycle of lock-in time window signal
InFirst negative edge, carry out timing with the opening time window.
Preferably, generation module comprise one or, a phase inverter and a chronotron.
To achieve these goals, according to a further aspect in the invention, also provide a kind of conversion method that comprises the serial line interface of above-mentioned change-over circuit.
According to the conversion method that comprises the serial line interface of above-mentioned change-over circuit of the present invention, may further comprise the steps: from D
InFirst negative edge start time window signal effective, when the time window signal was effective, counting module was to D
InThe number of rising edge count; When the schedule time arrives, the count results of counting module is sent to the storage output module, by the D of storage output module
Out1And D
Out2The count results of uniting the output storage, and reset count module.
To achieve these goals, in accordance with a further aspect of the present invention, also provide a kind of change-over circuit of serial line interface.
Change-over circuit according to serial line interface of the present invention comprises: the second generation module is used for the pin D according to the single wire serial interface of input
InProduce periodic time window signal, wherein, within each cycle of time window signal, the time window signal is from D
InFirst rising edge be designated as in schedule time of beginning effectively, and when the schedule time arrives, be designated as invalid, the time window signal be designated as invalid after, from D
InNext rising edge begin the next cycle of entry time window signal; The second counting module is used for when the time window signal is effective, to D
InThe number of negative edge count; And when the time window invalidating signal, the second counting module resets; And the second storage output module, be used for the count results of before the second counting module resets, store the second counting module according to the sequential of time window signal and use output pin D
Out1And D
Out2The count results of uniting the output storage.
By the present invention, adopt the pin D according to the single wire serial interface of input
InProduce periodic time window signal, when the time window signal is effective, to D
InThe number of rising edge count, when the time window invalidating signal, use output pin D
Out1And D
Out2The mode of uniting the count value count results of output when time window is effective, be a plurality of signals with the single-wire signal decompress(ion), so that the single wire serial interface circuit is easy to control, solve the poor compatibility of single wire serial interface in the correlation technique and caused chip to promote limited problem, reduce cost of products, improved the performance of system.
Description of drawings
Accompanying drawing described herein is used to provide a further understanding of the present invention, consists of the application's a part, and illustrative examples of the present invention and explanation thereof are used for explaining the present invention, do not consist of improper restriction of the present invention.In the accompanying drawings:
Fig. 1 is the synoptic diagram according to the change-over circuit of the serial line interface of the embodiment of the invention;
Fig. 2 is the synoptic diagram of the change-over circuit of serial line interface according to the preferred embodiment of the invention;
Fig. 3 is the process flow diagram according to the conversion method of the serial line interface of the embodiment of the invention;
Fig. 4 is the process flow diagram of the conversion method of serial line interface according to another embodiment of the present invention;
Fig. 5 is the synoptic diagram according to the change-over circuit of the serial line interface of the embodiment of the invention one;
Fig. 6 is the signal sequence synoptic diagram according to the change-over circuit of the serial line interface of the embodiment of the invention one;
Fig. 7 is the waveform synoptic diagram according to the data transmission of the change-over circuit of the serial line interface of the embodiment of the invention two.
Embodiment
Hereinafter also describe in conjunction with the embodiments the present invention in detail with reference to accompanying drawing.Need to prove that in the situation of not conflicting, embodiment and the feature among the embodiment among the application can make up mutually.
According to the embodiment of the invention, provide a kind of change-over circuit of serial line interface.Fig. 1 is the synoptic diagram according to the change-over circuit of the serial line interface of the embodiment of the invention, and as shown in Figure 1, this change-over circuit comprises: generation module 12 is used for the pin D according to the single wire serial interface of input
InProduce periodic time window signal, wherein, within each cycle of time window signal, the time window signal is from D
InFirst negative edge be designated as in schedule time of beginning effectively, and when the schedule time arrives, be designated as invalid, the time window signal be designated as invalid after, from D
InNext negative edge begin the next cycle of entry time window signal; Counting module 14 is coupled to generation module 12, is used for when the time window signal is effective, to D
InThe number of rising edge count; And when the time window invalidating signal, reset count module 14; And storage output module 16, be coupled to generation module 12 and counting module 14, be used for the count results according to sequential stored count module 14 before counting module 14 resets of time window signal, and use output pin D
Out1And D
Out2The count results of uniting the output storage.
By this change-over circuit, generation module 12 is according to the pin D of the single wire serial interface of input
InProduce periodic time window signal, counting module 14 is when the time window signal is effective, to D
InThe number of rising edge count, storage output module 16 uses output pin D when the time window invalidating signal
Out1And D
Out2Associating output count results has solved the poor compatibility of single wire serial interface in the correlation technique and causes chip to promote limited problem, has reduced cost of products, has improved the performance of system.
For example, the time window signal can be from first D
InNegative edge begin fixing a period of time of timing, during this period of time time window all is set to effectively, after the timing end, time window is set to invalid, to wait for the D in next cycle
InNegative edge.Wherein, the window width of time window signal is the summation of elapsed time when time window is effective in the one-period and when invalid.
In implementation process, storage output module 16 can be before counting module 14 resets the count results of stored count module 14, until next cycle count module 14 is upgraded new result.
Fig. 2 is the synoptic diagram of the change-over circuit of serial line interface according to the preferred embodiment of the invention, as shown in Figure 2, this change-over circuit also comprises: calibration module 22, be coupled to generation module 12 and counting module 14, be used for the time window signal that time-delay generation module 12 produces, to guarantee the D of storage output module 16
Out1And D
Out2The count results of uniting output storage before counting module 14 resets.
Because when time window finishes, storage output module 16 can upgrade new value from counting module 14, counting module 14 also can reset oneself simultaneously, so, output module 16 upgrades is numerical value before counting module 14 resets in order to guarantee to store, can carry out one section time-delay to the reset signal of counting module 14, the effect of Here it is calibration module 22.
Preferably, the schedule time can be determined by the delay cell in the generation module 12.This preferred embodiment be so that the window width of time window signal can improve Systems balanth according to the actual conditions adjustment, compatible and output validity of data.
In order to guarantee that storing output module 16 can preserve its result before counting module 14 resets, can introduce chain of inverters and the reset portion of counting module 14 is divided carry out a bit of time delays.
For example, calibration module 22 can comprise four mutually phase inverters of series connection.The method realizes simple, workable.
Preferably, counting module 14 comprises two d type flip flops, and wherein, the reset terminal of two d type flip flops links to each other with the output terminal of calibration module 22.Wherein, the counting end of d type flip flop and D
InLink to each other, to D
InRising edge count.The method realizes simple, workable.
Preferably, storage output module 16 comprises two digital register, and wherein, the output of two digital register is respectively D
Out1And D
Out2
Preferably, this change-over circuit also comprises: latch module 24, be coupled to generation module 12 and time delay module 22, and be used for the interior D of each cycle of lock-in time window signal
InFirst negative edge, carry out timing with the opening time window.Can improve Systems balanth and validity like this.
Preferably, generation module 12 comprise one or, a phase inverter and a chronotron.
According to the embodiment of the invention, also provide a kind of conversion method of the serial line interface according to above-mentioned change-over circuit.Fig. 3 is the process flow diagram according to the conversion method of the serial line interface of the embodiment of the invention, as shown in Figure 3, may further comprise the steps:
Step S302 is from D
InFirst negative edge start time window signal effective, when the time window signal was effective, counting module was to D
InThe number of rising edge count;
Step S304 according to the window width of the time window signal of setting, at the end of each time window, is sent to storage output module 16 with the count results of counting module 14, by the D of storage output module 16
Out1And D
Out2The count results of uniting the output storage, and reset count module 14.
By above-mentioned steps, adopt the pin D according to the single wire serial interface of input
InProduce periodic time window signal, when the time window signal is effective, to D
InThe number of rising edge count, when the time window invalidating signal, use output pin D
Out1And D
Out2Unite the mode of exporting count results, be a plurality of signals with the single-wire signal decompress(ion), so that the single wire serial interface circuit is easy to control, has solved the poor compatibility of single wire serial interface in the correlation technique and cause chip to promote limited problem, reduce cost of products, improved the performance of system.
Corresponding to above-mentioned change-over circuit, the embodiment of the invention also provides a kind of conversion method of serial line interface.Fig. 4 is the process flow diagram of the conversion method of serial line interface according to another embodiment of the present invention, and as shown in Figure 4, the method may further comprise the steps:
Step S402 arranges generation module 12, and generation module 12 is according to the pin D of the single wire serial interface of input
InProduce periodic time window signal, wherein, within each cycle of time window signal, the time window signal is from D
InFirst negative edge be designated as in schedule time of beginning effectively, and when the schedule time arrives, be designated as invalid, the time window signal be designated as invalid after, from D
InNext negative edge begin the next cycle of entry time window signal;
Step S404 arranges counting module 14, and counting module 14 is when the time window signal is effective, to D
InThe number of rising edge count, and when the time window invalidating signal, reset count module 14; And
Step S406 arranges storage output module 16, and storage output module 16 is according to the count results of sequential stored count module 14 before counting module 14 resets of time window signal, and use output pin D
Out1And D
Out2The count results of uniting the output storage.
By above-mentioned steps, with single-wire signal D
In" decompress(ion) " is two signal D
Out1And D
Out2Can certainly export according to demand surpass two signals (such as, three, four even more), unique different be the register number that needs to increase counting module 14 and storage output module 16, for example, suppose that three signals of output then need the register of three counting modules 14 and the register of three storage output modules 16, by that analogy.Like this so that the single wire serial interface circuit is easy to control, solve the poor compatibility of single wire serial interface in the correlation technique and cause chip to promote limited problem, reduced cost of products, improved the performance of system.
Preferably, calibration module 22 is set also after generation module 12, the time window signal that calibration module 22 time-delay generation modules 12 produce is to guarantee the D of storage output module 16
Out1And D
Out2Unite the count results that output counting module 14 resets and stores before.That is, in order to guarantee that storing output module 16 can preserve count results before counting module 14 resets, can use the reset circuit of 22 pairs of counting modules 14 of calibration module to delay time.
Need to prove, the embodiment of the invention be utilize single input signal a hopping edge (for example, rising edge or negative edge), produce the time window of a set time length (take first hopping edge as starting point, fixedly timing a period of time finishes, it is effective to be defined as time window in the section at this moment), time window effectively during this period of time in, (rising edge or negative edge) counted in hopping edge to single input signal, when time window is invalid, the count results of time window in effective time outputed to output terminal, finish the function that single input signal converts many output signals to.
Synoptic diagram such as the change-over circuit of the serial line interface of the embodiment of the invention among Fig. 1, the embodiment of the invention also provides a kind of change-over circuit of serial line interface, with identical such as circuit module among Fig. 1 and annexation, the hopping edge of generation time window is not identical when just realizing.For example, the change-over circuit of this serial line interface can comprise: the second generation module 42 is used for the pin D according to the single wire serial interface of input
InProduce periodic time window signal, wherein, within each cycle of time window signal, the time window signal is from D
InFirst rising edge be designated as in schedule time of beginning effectively, and when the schedule time arrives, be designated as invalid, the time window signal be designated as invalid after, from D
InNext rising edge begin the next cycle of entry time window signal; The second counting module 44 is used for when the time window signal is effective, to D
InThe number of negative edge count; And when the time window invalidating signal, the second counting module 44 resets; And the second storage output module 46, be used for the count results of before the second counting module 44 resets, store the second counting module 44 according to the sequential of time window signal and use output pin D
Out1And D
Out2The count results of uniting the output storage.
Be described in detail below in conjunction with the implementation procedure of example to the embodiment of the invention.
Embodiment one
Present embodiment provides a kind of change-over circuit of single wire serial interface of dead-beat device, namely, need not any reference clock input, can be at 1 line transmitting data only, be easy to controller and use, it can be with a plurality of pins (base pin selection, enable pin, optional pin etc.) pin of boil down to.
Fig. 5 is the synoptic diagram according to the change-over circuit of the serial line interface of the embodiment of the invention one, as shown in Figure 5, this change-over circuit comprises: latch 50, time window signal generation unit 52, alignment unit 54, counter 56 and digital register 58, and din is the unique pin for transmission, and dout1 and dout2 are two pins for controller control, namely, from the angle of whole system, input pin has been extended to two output pins (that is, " decompress(ion) " pin).
Wherein, the delay unit (DELAY cell) in the time window signal generation unit 52 is the meat and potatoes of this circuit.In implementation process, for different data transmission, different delay values can be set.Wherein, Time Created, the time-delay of negative edge of window should accurately be designed, and rising edge should be fast as far as possible, and this will be reduced to the next time retention time of transmission.
In implementation process, the conversion method of the serial line interface in the present embodiment can for: at first, from first negative edge of din, for cnt (namely, counter 56) is provided with a time window (timingwindow, this time window signal by or door drive), count (that is, data transmission is based on the number of the rising edge of din) with the rising edge to din; Then, at the end (that is, when time window finishes) of time window, the result of cnt will be sent to relevant data register 58.
Fig. 6 is the signal sequence synoptic diagram according to the change-over circuit of the serial line interface of the embodiment of the invention one, and as shown in Figure 6, the flow process of this conversion method may further comprise the steps:
Step S601, the output (latch_output) of the negative edge triggering latch 50 (latch) of din is step-down correspondingly.Because timingwindow is the control signal (that is, being connected to the LAT end of latch 50) of latch, and this moment, latch was in enabled state, so latch output equals input.
Step S602, or two inputs (latch_output and inv_output) of door are zero simultaneously.Particularly, Latch_output is that to jump at present at step S601 be zero, and inv_output not be owing to the reason of delay cell can be overturn immediately, so, also be zero.Therefore, or the output timingwindow of door at this moment lower the jumping be zero, the output of latch pinned keep.
Step S603, the output of DELAY cell is followed input after a period of time of having delayed time, and also redirect downwards is zero.
Step S604, with DELAY cell simple oppositely after, inv_output is output as height.That is, the phase inverter behind the DELAY cell in the time window signal generation unit 52 is output as height.
Step S605, because inv_output uprises, or the output timingwindow of door becomes height, again latch enabled.
Step S606, because din inputs redirect for high, in case latch is enabled, the output of latch is overturn simultaneously and is height.
Step S607, each rising edge cnt[1:0 of din in the effective time window] just add 1, in this example altogether note to 3 rising edges, so be added to 3 (namely, cnt[1:0 among Fig. 6] output " 2 ' b11 " be binary representation, being converted to the decimal system is 3).
Step S608, after time window is invalid, dout[1:0] cnt[1:0 of updated stored] value, and output " 2 ' b11 ".
Step S609, after time window is invalid, cnt[1:0] value be reset to 0.Because the existence of alignment unit 54 is arranged, so reset operation can be at dout[1:0] upgrade and reset again after finishing.Preferably, alignment unit 54 can be realized by reverse strand.
Need to prove that the most basic unit of this circuit is the delay unit that determines the time window width.As shown in Figure 5, the phase inverter of four the middle series connection retention time that can satisfy data register.In Fig. 6, between step S608 and the step S609, the td that delays time for some time is to guarantee at step S609cnt[1:0] value be reset to before 0, step S608 preserves cnt[1:0] count value.
Preferably, and the output of time window signal generation unit 52 (that is, or the result of door) be the reset signal of cnt, also be the clock signal of data register.
Preferably, latch 50 can make the input of delay unit 54 ignore the transmission of data of din and remain unchanged in delay cycle.
As seen, present embodiment provides a kind of very simple compression function pin, maximization power pin to reduce the method for conducting resistance, the method has reduced taking of pin, so that when design can use less encapsulation to reduce cost, improved the utilization factor of system element, and, in the situation of dead-beat device, realized the single-wire signal din of input is converted to two output signal dout[1] and dout[0].
Embodiment two
Fig. 7 is the waveform synoptic diagram according to the data transmission of the change-over circuit of the serial line interface of the embodiment of the invention two, as shown in Figure 7, show four kinds of possible situations, here a din pin can replace two function pins, namely, be a plurality of signal dout[1 with single-wire signal din decompress(ion)] and dou[0] (that is, dout[1:0]).Thereby so that controller can control the din signal at an easy rate, but the control signal of controller need to be positioned at time window.
Particularly, for each possible situation, can divide following steps to realize:
Need to prove, the conversion method of the serial line interface that provides at present embodiment can be applied to the design of pin limited (single line) or cost limited (dead-beat device) or power limited (do not have continue energy consumption), also is applicable to the client of the compact package of removable design.
In sum, the embodiment of the invention provides a kind of conversion method of single wire serial interface of dead-beat device, the design of dead-beat device is a kind of design of very low energy consumption, and compressed the pin of chip, expanded the range of application of single wire serial interface, reduce cost of products, improved the performance of system.
Obviously, those skilled in the art should be understood that, above-mentioned each module of the present invention or each step can realize with general calculation element, they can concentrate on the single calculation element, perhaps be distributed on the network that a plurality of calculation elements form, alternatively, they can be realized with the executable program code of calculation element, thereby, they can be stored in the memory storage and be carried out by calculation element, and in some cases, can carry out step shown or that describe with the order that is different from herein, perhaps they are made into respectively each integrated circuit modules, perhaps a plurality of modules in them or step are made into the single integrated circuit module and realize.Like this, the present invention is not restricted to any specific hardware and software combination.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. the change-over circuit of a serial line interface is characterized in that, comprising:
Generation module is used for the pin D according to the single wire serial interface of input
InProduce periodic time window signal, wherein, within each cycle of described time window signal, described time window signal is from D
InFirst negative edge be designated as in schedule time of beginning effectively, and when the described schedule time arrives, be designated as invalid, described time window signal be designated as invalid after, from D
InNext negative edge begin to enter the next cycle of described time window signal;
Counting module is used for when described time window signal is effective, to D
InThe number of rising edge count; And when described time window invalidating signal, described counting module resets; And
The storage output module for the count results of storing described counting module according to the sequential of described time window signal before described counting module resets, and uses output pin D
Out1And D
Out2The described count results of uniting the output storage.
2. change-over circuit according to claim 1 is characterized in that, also comprises:
Calibration module is for the described time window signal of the described generation module generation of delaying time, to guarantee the D of described storage output module
Out1And D
Out2The described count results of uniting output storage before described counting module resets.
3. change-over circuit according to claim 2 is characterized in that, described calibration module comprises four mutually phase inverters of series connection.
4. change-over circuit according to claim 2 is characterized in that, described counting module comprises two d type flip flops, and wherein, the reset terminal of described two d type flip flops links to each other with the output terminal of described calibration module.
5. change-over circuit according to claim 1 is characterized in that, the described schedule time is determined by the delay cell in the described generation module.
6. change-over circuit according to claim 1 is characterized in that, described storage output module comprises two digital register, and wherein, the output of described two digital register is respectively D
Out1And D
Out2
7. change-over circuit according to claim 1 is characterized in that, also comprises:
Latch module is for the D in each cycle of pinning described time window signal
InFirst negative edge, carry out timing with the opening time window.
8. change-over circuit according to claim 1 is characterized in that, described generation module comprise one or, a phase inverter and a chronotron.
9. a conversion method that comprises the serial line interface of each described change-over circuit of claim 1 to 8 is characterized in that, may further comprise the steps:
From D
InFirst negative edge to begin described time window signal effective, when described time window signal was effective, described counting module was to D
InThe number of rising edge count;
When described schedule time arrives, the count results of described counting module is sent to described storage output module, by the D of described storage output module
Out1And D
Out2The described count results of uniting the output storage, and the described counting module that resets.
10. the change-over circuit of a serial line interface is characterized in that, comprising:
The second generation module, be used for producing periodic time window signal according to the pin Din of the single wire serial interface of inputting, wherein, within each cycle of described time window signal, described time window signal was designated as effectively within the schedule time that first rising edge of Din begins, and it is invalid to be designated as when described schedule time arrives, described time window signal be designated as invalid after, begin to enter the next cycle of described time window signal from the next rising edge of Din;
The second counting module is used for when described time window signal is effective, and the number of the negative edge of Din is counted; And when described time window invalidating signal, described the second counting module resets; And
The second storage output module for the count results of storing described the second counting module according to the sequential of described time window signal before described the second counting module resets, and uses output pin Dout1 and Dout2 to unite the described count results of output storage.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103605626A (en) * | 2013-10-17 | 2014-02-26 | 陕西万达信息工程有限公司 | Single line serial bus protocol and switching circuit |
| CN109471750A (en) * | 2018-11-07 | 2019-03-15 | 紫光测控有限公司 | A kind of SOE disappears fluttering method and the system of trembling that disappears |
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2011
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103605626A (en) * | 2013-10-17 | 2014-02-26 | 陕西万达信息工程有限公司 | Single line serial bus protocol and switching circuit |
| CN103605626B (en) * | 2013-10-17 | 2016-08-10 | 陕西万达信息工程有限公司 | A kind of Single wire Serial Bus agreement and change-over circuit |
| CN109471750A (en) * | 2018-11-07 | 2019-03-15 | 紫光测控有限公司 | A kind of SOE disappears fluttering method and the system of trembling that disappears |
| CN109471750B (en) * | 2018-11-07 | 2022-03-22 | 清能华控科技有限公司 | SOE jitter elimination method and system |
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Application publication date: 20130327 |