CN109470378A - A kind of method, AD detection circuit and electronic equipment preventing failure erroneous detection - Google Patents

A kind of method, AD detection circuit and electronic equipment preventing failure erroneous detection Download PDF

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Publication number
CN109470378A
CN109470378A CN201811180116.2A CN201811180116A CN109470378A CN 109470378 A CN109470378 A CN 109470378A CN 201811180116 A CN201811180116 A CN 201811180116A CN 109470378 A CN109470378 A CN 109470378A
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CN
China
Prior art keywords
resistor
port
state
charging capacitor
detection circuit
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Granted
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CN201811180116.2A
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Chinese (zh)
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CN109470378B (en
Inventor
石鸾
彭原
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Shenzhen Heertai Intelligent Technology Co Ltd Small Appliances
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Shenzhen Heertai Intelligent Technology Co Ltd Small Appliances
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01KMEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/16Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
    • G01K7/22Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a non-linear resistance, e.g. thermistor
    • G01K7/24Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a non-linear resistance, e.g. thermistor in a specially-adapted circuit, e.g. bridge circuit
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01DMEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D3/00Indicating or recording apparatus with provision for the special purposes referred to in the subgroups
    • G01D3/028Indicating or recording apparatus with provision for the special purposes referred to in the subgroups mitigating undesired influences, e.g. temperature, pressure
    • G01D3/036Indicating or recording apparatus with provision for the special purposes referred to in the subgroups mitigating undesired influences, e.g. temperature, pressure on measuring arrangements themselves

Abstract

The present invention relates to AD detection field, in particular to a kind of method, AD detection circuit and electronic equipment for preventing failure erroneous detection.AD detection circuit includes processing unit comprising first port and internal pull-up resistor, first port include I/O state and AD detecting state, and for connecting to power supply, the other end of internal pull-up resistor is connect with the first port for one end of internal pull-up resistor.Based on this, the method for preventing failure erroneous detection includes: the state of first port to be placed in I/O state, power supply is charging capacitor charging by internal pull-up resistor after powering on;When the both end voltage of charging capacitor is equal to supply voltage, the state of first port is placed in AD detecting state, acquires AD voltage value;Obtain the AD voltage value at least one period;Judge whether AD voltage value is equal to supply voltage;If so, detecting the work of AD detection circuit in abnormality;If it is not, detecting the work of AD detection circuit in normal condition.The present invention can prevent AD detection circuit failure erroneous detection, promote safety.

Description

A kind of method, AD detection circuit and electronic equipment preventing failure erroneous detection
Technical field
The present invention relates to AD detection technique fields, more particularly to a kind of method, AD detection circuit for preventing failure erroneous detection And electronic equipment.
Background technique
Currently, major part AD detection circuit is by electric resistance partial pressure come collection voltages, since AD acquisition port is highly prone to Interference, when failure state occurs in circuit, AD acquires port state labile, and detection data mistake, especially temperature is caused to be examined Survey aspect, in some instances it may even be possible to cause serious consequence.
Referring to Fig. 1, Fig. 1 is that the prior art provides a kind of electrical block diagram of AD detection circuit.As shown in Figure 1, The voltage value that port processing resistance R2 and resistance R3 forms bleeder circuit is acquired by the AD of MCU, since circuit is unstable, easily By noise jamming, lead to the data inaccuracy of acquisition, so, increase the anti-jamming circuit of resistance R1 and capacitor C1 composition, filters out High-frequency anomaly signal improves the Stability and veracity of acquisition data.
Inventor in the implementation of the present invention, it is found that traditional technology the prior art has at least the following problems: in Fig. 1, works as electricity When resistance R1 failure open circuit, i.e., when anti-jamming circuit failure is opened a way, at this point, the voltage on capacitor C1 causes at random and vulnerable to interference AD detection circuit failure erroneous detection.For example, when R1, which fails, to open a way, detection temperature is possible to continuing when detecting load temperature It is changed in low temperature range, but actual loading temperature is possible to out of control because of detection mistake at this time, or even causes safety accident.
Summary of the invention
The embodiment of the present invention is intended to provide a kind of method, AD detection circuit and electronic equipment for preventing failure erroneous detection, solution The technical issues of AD detection circuit of having determined failure erroneous detection.
In order to solve the above technical problems, the embodiment of the present invention the following technical schemes are provided:
In a first aspect, the embodiment of the present invention provides a kind of method for preventing failure erroneous detection, applied to AD detection circuit, institute Stating AD detection circuit includes processing unit, charging capacitor, first resistor, second resistance and 3rd resistor, the processing unit packet Include first port, the first port includes I/O state and AD detecting state, one end of the charging capacitor and the first end Mouth connection, the other end of the charging capacitor are connect with ground terminal, one end of one end of the first resistor and the charging capacitor Connection, the other end of the first resistor are connect with one end of one end of the second resistance and the 3rd resistor respectively, institute The other end of second resistance is stated for connecting to power supply, one end of the 3rd resistor is connect with the ground terminal, which is characterized in that The processing unit further includes internal pull-up resistor, and one end of the internal pull-up resistor is for connecting to power supply, the inside The other end of pull-up resistor is connect with the first port, which comprises
After powering on, the state of the first port is placed in the I/O state, the power supply passes through the internal pull-up electricity Resistance is that the charging capacitor charges;
If the both end voltage of the charging capacitor is equal to supply voltage, the state of the first port is placed in the AD Detecting state acquires AD voltage value;
Obtain the AD voltage value at least one period;
Judge whether the AD voltage value at least one period is equal to the supply voltage;
If so, determining the AD detection circuit work in abnormality;
If it is not, then determining the AD detection circuit work in normal condition.
Optionally, the state by the first port is placed in after the I/O state, the method also includes:
Open the internal pull-up resistor.
Optionally, described when the both end voltage of the charging capacitor is equal to supply voltage, by the state of the first port It is placed in the AD detecting state, acquisition AD voltage value includes:
Judge whether the both end voltage of the charging capacitor is equal to supply voltage;
If so, closing the internal pull-up resistor, the state of the first port is placed in the AD detecting state, is adopted Collect AD voltage value;
If it is not, continuing through the internal pull-up resistor then as charging capacitor charging.
Optionally, when the first resistor works normally, the charging capacitor passes through the first resistor and described the Three resistance discharge, and the second resistance and the 3rd resistor carry out clamper to the voltage of the charging capacitor.
Optionally, when the first resistor is opened a way, the AD voltage value of the first port acquisition is equal to power supply electricity Pressure.
Optionally, detect AD detection circuit work after abnormality, the method also includes: generation mentions Show information.
In second aspect, the embodiment of the present invention provides a kind of device for preventing failure erroneous detection, is applied to AD detection circuit, institute Stating AD detection circuit includes processing unit, charging capacitor, first resistor, second resistance and 3rd resistor, the processing unit packet Include first port, the first port includes I/O state and AD detecting state, one end of the charging capacitor and the first end Mouth connection, the other end of the charging capacitor are connect with ground terminal, one end of one end of the first resistor and the charging capacitor Connection, the other end of the first resistor are connect with one end of one end of the second resistance and the 3rd resistor respectively, institute The other end of second resistance is stated for connecting to power supply, one end of the 3rd resistor is connect with the ground terminal, which is characterized in that The processing unit further includes internal pull-up resistor, and one end of the internal pull-up resistor is for connecting to power supply, the inside The other end of pull-up resistor is connect with the first port, and described device includes:
The state of the first port is placed in the I/O state, the power supply passes through after powering on by charging module The internal pull-up resistor is charging capacitor charging;
Acquisition module is equal to supply voltage for the both end voltage when the charging capacitor, by the shape of the first port State is placed in the AD detecting state, acquires AD voltage value;
Module is obtained, for obtaining the AD voltage value at least one period;
Judgment module, for judging whether the AD voltage value is equal to the supply voltage;If so, detecting the AD Detection circuit works in abnormality;If it is not, detecting the AD detection circuit work in normal condition.
Optionally, the charging module specifically includes:
The state of the first port is placed in the I/O state after powering on by state set unit;
Opening unit, for opening the internal pull-up resistor;
Charhing unit, being used for the power supply by the internal pull-up resistor is charging capacitor charging.
Optionally, the acquisition module is specifically used for: judging whether the both end voltage of the charging capacitor is equal to power supply electricity Pressure;
If so, closing the internal pull-up resistor, the state of the first port is placed in the AD detecting state, is acquired AD voltage value;
If it is not, continuing through the internal pull-up resistor as charging capacitor charging.
Optionally, described device further includes cue module, for detecting the AD detection circuit work in abnormal shape After state, prompt information is generated.
In the third aspect, the embodiment of the present invention provides a kind of AD detection circuit, including processing unit, charging capacitor, first Resistance, second resistance and 3rd resistor, the processing unit include first port, and the first port includes I/O state and AD Detecting state, one end of the charging capacitor are connect with the first port, and the other end of the charging capacitor is connect with ground terminal, One end of the first resistor is connect with one end of the charging capacitor, and the other end of the first resistor is respectively with described second One end of resistance is connected with one end of the 3rd resistor, and the other end of the second resistance is for connecting to power supply, and described the One end of three resistance is connect with the ground terminal, which is characterized in that the processing unit includes internal pull-up resistor, on the inside For connecting to power supply, the other end of the internal pull-up resistor is connect with the first port for one end of pull-up resistor;
Wherein, the processing unit further include:
Analog-digital converter;
At least one processor is connect with the analog-digital converter;And
The memory being connect at least one described processor;Wherein,
The memory is stored with the instruction repertorie that can be executed by least one described processor, and described instruction program is by institute The execution of at least one processor is stated, so that at least one described processor is able to carry out the side for preventing failure erroneous detection as described above Method.
Optionally, when the first resistor works normally, the charging capacitor passes through the first resistor and described the Three resistance discharge, and the second resistance and the 3rd resistor carry out clamper to the voltage of the charging capacitor;
When first resistor open circuit, the AD voltage value of the first port acquisition is equal to supply voltage.
Optionally, the 3rd resistor is NTC resistance.
In fourth aspect, the embodiment of the present invention provides a kind of electronic equipment, including AD detection circuit as described above.
At the 5th aspect, the embodiment of the present invention provides a kind of non-transient computer readable storage medium, the non-transient meter Calculation machine readable storage medium storing program for executing is stored with computer executable instructions, and the computer executable instructions are for executing electronic equipment As above described in any item methods for preventing failure erroneous detection.
The beneficial effects of the present invention are: compared with prior art, the embodiment of the invention provides one kind to prevent failure from missing Method, AD detection circuit and the electronic equipment of inspection.Wherein, the method for preventing failure erroneous detection is applied to AD detection circuit, leads to The internal pull-up resistor for crossing processing unit charges to charging capacitor, can detecte out whether AD detection circuit works in exception State, therefore, the present invention can prevent AD detection circuit failure erroneous detection, improve the safety of AD detection circuit.
Detailed description of the invention
One or more embodiments are illustrated by the picture in corresponding attached drawing, these exemplary theorys The bright restriction not constituted to embodiment, the element in attached drawing with same reference numbers label are expressed as similar element, remove Non- to have special statement, composition does not limit the figure in attached drawing.
Fig. 1 is a kind of electrical block diagram for AD detection circuit that the prior art provides;
Fig. 2 is a kind of electrical block diagram of AD detection circuit provided in an embodiment of the present invention;
Fig. 3 is a kind of structural schematic diagram of processing unit provided in an embodiment of the present invention;
Fig. 4 is a kind of structural schematic diagram of device for preventing failure erroneous detection provided in an embodiment of the present invention;
Fig. 5 is the structural schematic diagram of charging module as shown in Figure 4 provided in an embodiment of the present invention;
Fig. 6 be another embodiment of the present invention provides it is a kind of prevent failure erroneous detection device structural schematic diagram;
Fig. 7 is a kind of AD detection waveform signal of AD detection circuit work provided in an embodiment of the present invention in normal state Figure;
Fig. 8 is a kind of AD detection waveform signal of the AD detection circuit work provided in an embodiment of the present invention under abnormality Figure;
Fig. 9 is a kind of method flow diagram for preventing failure erroneous detection provided in an embodiment of the present invention;
Figure 10 is the method flow diagram of S12 shown in Fig. 9;
Figure 11 be another embodiment of the present invention provides it is a kind of prevent failure erroneous detection method flow diagram.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right The present invention is further elaborated.It should be appreciated that described herein, specific examples are only used to explain the present invention, not For limiting the present invention.
The purpose of embodiment to facilitate the understanding of the present invention, the embodiment of the present invention work to the capacitor charge/discharge being related to former Reason makes detailed elaboration, it should be understood that is not intended to restrict the invention the protection scope of embodiment in lower made elaboration.
Referring to Fig. 2, Fig. 2 is a kind of electrical block diagram of AD detection circuit provided in an embodiment of the present invention.It is described AD detection circuit 100 includes processing unit 10, charging capacitor C1, first resistor R1, second resistance R2 and 3rd resistor R3.
In the present embodiment, the processing unit 10 includes first port 11 and internal pull-up resistor R4, wherein described the Single port 11 includes I/O state and AD detecting state, and one end of the internal pull-up resistor R4 is described interior for connecting to power supply The other end of portion pull-up resistor R4 is connect with the first port 11.
It is appreciated that the processing unit 10 includes microprocessor, DSP, single-chip microcontroller etc., such as when the processing unit 10 When for single-chip microcontroller, the single-chip microcontroller is internally integrated AD detection module (including AD sample circuit and A/D converter circuit), corresponding, There is the single-chip microcontroller AD data collection terminal mouth (i.e. first port 11) to be used for collection voltages signal, and by the analog voltage of acquisition Signal, which is converted to the single-chip microcontroller, can recognize the digital signal of processing.In some embodiments, the processing unit 10 and AD is examined Survey module connection.
The first port 11 has the function of time-division processing, i.e., the described processing unit 10 can be examined for I/O state and AD The different working time section of state assignment is surveyed, it is corresponding that it can be executed when the first port 11 is in different working conditions Function.For example, the work of first port 11 is t1, institute in the time of I/O state in time T (wherein, T=t1+t2) It is t2 that the work of processing unit 10, which is stated, in the time of AD detecting state, and the first port 11 repeats above procedure, until described the Single port 11 receives the new program instruction of the processing unit 10.
One end of the charging capacitor C1 is connect with the first port 11, the other end and ground terminal of the charging capacitor C1 Connection, one end of the first resistor R1 are connect with one end of the charging capacitor C1, the other end point of the first resistor R1 It is not connect with one end of one end of the second resistance R2 and the 3rd resistor R3, the other end of the second resistance R2 is used for It connects to power supply, one end of the 3rd resistor R3 is connect with the ground terminal.
In the present embodiment, the second resistance R2 and 3rd resistor R3 forms bleeder circuit, in order to improve acquisition Precision, generally, the resistance accuracy of the second resistance R2 use 1%.The present embodiment is applied to temperature with the AD detection circuit 100 It spends for detection field, at this point, the 3rd resistor R3 uses NTC resistance.
NTC resistance belongs to semiconductor devices, and for NTC resistance when locating environment is higher, resistance is lower, the place AD voltage value collected can be converted to corresponding temperature value by reason unit 10.So making if open circuit fails It obtains 11 test point of first port and is continuously in high-impedance state, the corresponding environment temperature of high-impedance state is lower temperature, real On border, what the first port 11 detected is not true environment temperature, when environment temperature increases to a certain extent, if lacking Weary others protection mechanism, may cause circuit burnout, or even cause the security risks such as fire.
As the another aspect of the embodiment of the present invention, the embodiment of the present invention provides a kind of electronic equipment, the electronic equipment Including the AD detection circuit, the electronic equipment includes but is not limited to intelligent appliance product.
In some embodiments, as shown in figure 3, the processing unit 10 includes: analog-digital converter 101, at least one processing Device 102 and memory 103.At least one processor 102 is connect with analog-digital converter 101, memory 103 and at least one processing Device 102 connects.Wherein, in Fig. 3 by taking a processor 102 as an example.Processor 102 and memory 103 can by bus or Other modes connect, in Fig. 3 for being connected by bus.
Wherein, memory 103 is stored with the instruction that can be executed by least one described processor 102, and described instruction is by institute The execution of at least one processor 102 is stated, so that at least one described processor 102 can be used in executing above-mentioned AD detection circuit 100 control logic.
As the another aspect of the embodiment of the present invention, the embodiment of the present invention provides a kind of device 200 for preventing failure erroneous detection. Wherein, this prevents the device 200 of failure erroneous detection as software systems, is stored in the processing unit 10 that Fig. 3 is illustrated.This is anti- Only the device 200 of failure erroneous detection includes some instructions, which is stored in memory 103, and processor 102 is accessible The memory 103, call instruction is executed, to complete the control logic of above-mentioned AD detection circuit 100.
In the present embodiment, prevent failure erroneous detection device 200 be applied to AD detection circuit 100, including processing unit 10, Charging capacitor C1, first resistor R1, second resistance R2 and 3rd resistor R3.
The processing unit 10 includes first port 11, and the first port includes I/O state and AD detecting state, described One end of charging capacitor C1 is connect with the first port 11, and the other end of the charging capacitor C1 is connect with ground terminal, and described One end of one resistance R1 is connect with one end of the charging capacitor C1, and the other end of the first resistor R1 is respectively with described second One end of resistance R2 is connected with one end of the 3rd resistor R3, and the other end of the second resistance R2 is used to connect to power supply, One end of the 3rd resistor R3 is connect with the ground terminal.The processing unit 10 further includes internal pull-up resistor R4, described interior For connecting to power supply, the other end of the internal pull-up resistor R4 and the first port connect for one end of portion pull-up resistor R4 It connects.
Referring to Fig. 5, Fig. 5 is a kind of structural schematic diagram of device for preventing failure erroneous detection provided in an embodiment of the present invention. As shown in figure 5, preventing the device 200 of failure erroneous detection from including: charging module 21, acquisition module 22, obtaining module 23 and judge mould Block 24.
In the present embodiment, the charging module 21 is for the state of the first port 11 being placed in described after powering on I/O state, the power supply are charging capacitor C1 charging by the internal pull-up resistor R4.
Wherein, the charging module 21 specifically includes state set unit 211, opening unit 212 and charhing unit 213.
In the present embodiment, Unit 211 are arranged for after powering on, the state of the first port 11 to be placed in the state The I/O state.The opening unit 212 is for opening the internal pull-up resistor R4.The charhing unit 213 is for described Power supply is charging capacitor C1 charging by the internal pull-up resistor R4.
The acquisition module 22 is used to be equal to supply voltage when the both end voltage of the charging capacitor C1, by the first end The state of mouth 11 is placed in the AD detecting state, acquires AD voltage value.
In the present embodiment, the acquisition module 22 be specifically used for judge the charging capacitor C1 both end voltage whether etc. In supply voltage;If so, closing the internal pull-up resistor R4, the state of the first port 11 is placed in the AD and detects shape State acquires AD voltage value;If it is not, continuing through the internal pull-up resistor R4 as charging capacitor C1 charging.
Please refer to Fig. 6 and Fig. 7, the AD voltage value for obtaining module 23 and being used to obtain at least one period.
Specifically, passing through 11 (i.e. the corresponding AD of the processing unit 10 acquires the port I/O) the acquisition AD of first port Voltage value obtains the corresponding waveform timing chart of acquired AD voltage value by the processing of the processing unit 10, i.e., by the AD Voltage value is converted to the digital quantity in time domain.As shown in fig. 6, the period of t3-t5 is a cycle, continuous multiple weeks are obtained The AD voltage value of phase can therefrom obtain the rule of characterization voltage signal (or the physical quantitys such as temperature, pressure, deformation quantity) variation Rule.
The judgment module 24 is for judging whether the AD voltage value is equal to the supply voltage;If so, detecting The work of AD detection circuit 100 is in abnormality;If it is not, detecting the work of AD detection circuit 100 in normal condition.
It is appreciated that as shown in fig. 6, the period of t3-t4 it is corresponding be charging capacitor C1 charge and discharge process, i.e., in t3 Internal pull-up resistor R4 described in moment starts to charge the charging capacitor C1, and the state of the corresponding first port 11 is I/ O state;The charging capacitor C1 terminates to discharge at the t4 moment, and the state of the corresponding first port 11 is AD detecting state, AD voltage value is acquired within the period of t4-t5, proceeds immediately to next cycle, repeats above procedure.
Since the capacitance of the charging capacitor C1 and the resistance value of the first resistor R1 are very small, so, it is described to fill The charging process and discharge process of capacitor C1 be it is very fast, therefore, the charging capacitor C1 charge corresponding rising edge and 90 degree of the slope infinite approach of failing edge.Terminate when the charging capacitor C1 charges, the voltage etc. at the both ends the charging capacitor C1 In supply voltage, i.e., V1 shown in figure is equal to supply voltage VCC.
During charging capacitor C1 electric discharge, the voltage at the both ends of the charging capacitor C1 constantly declines, when When dropping to certain voltage value, the bleeder circuit of the second resistance R2 and 3rd resistor R3 composition is to the charging capacitor The voltage at the both ends C1 carries out clamper, and clamp voltage (voltage V0 as shown in the figure) is equal to the sampled voltage of the first port 11 Value.
Further, when the first resistor R1 is worked normally, the charging capacitor C1 passes through the first resistor R1 It discharges with the 3rd resistor R3, the voltage of the second resistance R2 and the 3rd resistor R3 to the charging capacitor C1 Carry out clamper.At this point, the AD voltage value unevenness at least one period be equal to the supply voltage (including clamp voltage V0 and Supply voltage V1), it can be determined that the first resistor R1 is worked normally, and then it can be concluded that the AD detection circuit 100 works In normal condition.
As shown in fig. 7, the AD voltage value that the first port 11 acquires is equal to when first resistor R1 open circuit Supply voltage, i.e., at any time, any one time cycle (assuming that the time cycle is equal to t5-t3), the AD voltage value is equal Persistently it is equal to supply voltage VCC equal to supply voltage VCC (V2 as illustrated in the drawing) namely the AD voltage value.At this point it is possible to Derive the first resistor R1 open circuit, and then it can be concluded that the AD detection circuit 100 work avoids and works as in abnormality In abnormality, the AD voltage value that the first port 11 acquires can not react true for the work of AD detection circuit 100 The actual state of sample objects (local temperature or bulk temperature of the circuit that resistance R3 is acquired in such as the present embodiment).
In some embodiments, described device 200 further includes cue module 25, for detecting the AD detection circuit 100 work generate prompt information after abnormality.
In the present embodiment, in order to reduce power consumption, the cue module 25 can generate warning information only with buzzer, Or the prompt user such as different colouring information or flicker information are generated only with light emitting diode, or using buzzer and shine two Pole pipe combines prompt user.In some embodiments, the cue module 25 is connect with the processing unit 10, it will be understood that Cue module 25 can be set on the display screen, and the prompt information generated after the processing unit 10 processing is with different sides Formula prompts user, such as figure, number, table etc..
Since Installation practice and above-mentioned each embodiment are based on same design, in the not mutual conflicting premise of content Under, the content of Installation practice can quote the content of above-mentioned each embodiment, and this will not be repeated here.
As the embodiment of the present invention in another aspect, the embodiment of the present invention provides a kind of method for preventing failure erroneous detection.This The function of the method for preventing failure erroneous detection of inventive embodiments can be executed by the hardware platform with software systems.Example Such as: the method for preventing failure erroneous detection can execute in electronic equipment of the suitable type with the processor of operational capability, such as: Single-chip microcontroller, digital processing unit (Digital Signal Processing, DSP), arm processor etc..
The corresponding function of method of preventing failure erroneous detection of following each embodiments is that electronics is stored in the form of instruction On the memory of equipment, when the corresponding function of the method for preventing failure erroneous detection that execute following each embodiments, electronics is set Standby processor accesses memory, transfers and execute corresponding instruction, prevents failure erroneous detection with realize following each embodiments The corresponding function of method.
Memory as a kind of non-volatile computer readable storage medium storing program for executing, can be used for storing non-volatile software program, Non-volatile computer executable program and module, as the device 200 for preventing failure erroneous detection in above-described embodiment is corresponding Program instruction/module (for example, modules described in Fig. 4, Fig. 5 and Fig. 8 and unit) or following embodiments prevent failure from missing Step corresponding to the method for inspection.Processor is by running non-volatile software program, instruction and mould stored in memory Block realizes that following embodiments are anti-thereby executing the various function application and data processing of the device 200 for preventing failure erroneous detection Only the modules of device 200 of failure erroneous detection and the function of unit or following embodiments prevent the method pair of failure erroneous detection The function for the step of answering.
Memory may include high-speed random access memory, can also include nonvolatile memory, for example, at least one A disk memory, flush memory device or other non-volatile solid state memory parts.In some embodiments, memory is optional Including the memory remotely located relative to processor, these remote memories can pass through network connection to processor.It is above-mentioned The example of network includes but is not limited to internet, intranet, local area network, mobile radio communication and combinations thereof.
Described program instruction/module stores in the memory, when being executed by one or more of processors, The method for preventing failure erroneous detection in above-mentioned any means embodiment is executed, for example, the Fig. 9 for executing following embodiment descriptions extremely schemes Each step shown in 11;It can also realize the function of modules and unit described in attached drawing 4, Fig. 5 and Fig. 8.
In the present embodiment, which is applied to.As shown in figure 9, this prevents the side of failure erroneous detection Method is applied to AD detection circuit, and the AD detection circuit includes processing unit, charging capacitor, first resistor, second resistance and the Three resistance, the processing unit include first port, and the first port includes I/O state and AD detecting state, the charging One end of capacitor is connect with the first port, and the other end of the charging capacitor is connect with ground terminal, and the one of the first resistor End is connect with one end of the charging capacitor, the other end of the first resistor respectively with one end of the second resistance and described One end of 3rd resistor connects, and the other end of the second resistance is for connecting to power supply, one end of the 3rd resistor and institute State ground terminal connection, which is characterized in that the processing unit further includes internal pull-up resistor, and one end of the internal pull-up resistor is used In connecting to power supply, the other end of the internal pull-up resistor is connect with the first port, which comprises
S11: after powering on, the state of the first port is placed in the I/O state, the power supply passes through on the inside Pull-up resistor is charging capacitor charging.
Wherein, the state by the first port is placed in after the I/O state, the method also includes: it opens The internal pull-up resistor.
S12: when the both end voltage of the charging capacitor is equal to supply voltage, the state of the first port is placed in described AD detecting state acquires AD voltage value.
In the present embodiment, referring to Fig. 10, step S12 is specifically included:
S20: judge whether the both end voltage of the charging capacitor is equal to supply voltage.
S201: if so, closing the internal pull-up resistor, the state of the first port is placed in the AD and detects shape State acquires AD voltage value.
S202: if it is not, continuing through the internal pull-up resistor as charging capacitor charging.
S13: the AD voltage value at least one period is obtained.
S14: judge whether the AD voltage value is equal to the supply voltage.
S141: if so, detecting the AD detection circuit work in abnormality.
Wherein, when the first resistor is opened a way, the AD voltage value of the first port acquisition is equal to supply voltage.
S142: if it is not, detecting the AD detection circuit work in normal condition.
Wherein, when the first resistor works normally, the charging capacitor passes through the first resistor and the third Resistance discharges, and the second resistance and the 3rd resistor carry out clamper to the voltage of the charging capacitor.
In some embodiments, please refer to Figure 11, detect AD detection circuit work after abnormality, institute State method further include:
S15: prompt information is generated.
The embodiment of the invention provides a kind of method, AD detection circuit and electronic equipments for preventing failure erroneous detection.Wherein, institute The method that stating prevents failure erroneous detection is applied to AD detection circuit, and internal pull-up resistor through the processing unit carries out charging capacitor Charging, can detecte out whether AD detection circuit works in abnormality, and therefore, the present invention can prevent AD detection circuit from failing Erroneous detection improves the safety of AD detection circuit.
Since Installation practice and embodiment of the method are to be based on same design, under the premise of content does not conflict mutually, side The content of method embodiment can quote the content of Installation practice, and this will not be repeated here.
As the another aspect of the embodiment of the present invention, the embodiment of the present invention provides a kind of non-transient computer readable storage Medium, the non-transient computer readable storage medium are stored with computer executable instructions, the computer executable instructions For making electronic equipment execute the method for preventing failure erroneous detection of above-mentioned each embodiment.
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations;At this Under the thinking of invention, it can also be combined between the technical characteristic in above embodiments or different embodiments, and exist such as Many other variations of the upper different aspect of the invention, for simplicity, they are not provided in details;Although reference Invention is explained in detail for previous embodiment, those skilled in the art should understand that: it still can be right Technical solution documented by foregoing embodiments is modified or equivalent replacement of some of the technical features;And this It modifies or replaces, the range of each embodiment technical solution of the application that it does not separate the essence of the corresponding technical solution.

Claims (10)

1. a kind of method for preventing failure erroneous detection, is applied to AD detection circuit, the AD detection circuit includes processing unit, charging Capacitor, first resistor, second resistance and 3rd resistor, the processing unit include first port, and the first port includes I/O State and AD detecting state, one end of the charging capacitor are connect with the first port, the other end of the charging capacitor with Ground terminal connection, one end of the first resistor are connect with one end of the charging capacitor, the other end difference of the first resistor It is connect with one end of one end of the second resistance and the 3rd resistor, the other end of the second resistance is used to connect with power supply It connects, one end of the 3rd resistor is connect with the ground terminal, which is characterized in that the processing unit further includes internal pull-up electricity Resistance, one end of the internal pull-up resistor is for connecting to power supply, the other end of the internal pull-up resistor and the first end Mouth connection, which comprises
After powering on, the state of the first port is placed in the I/O state, the power supply is by the internal pull-up resistor The charging capacitor charging;
If the both end voltage of the charging capacitor is equal to supply voltage, the state of the first port is placed in the AD and is detected State acquires AD voltage value;
Obtain the AD voltage value at least one period;
Judge whether the AD voltage value at least one period is equal to the supply voltage;
If so, determining the AD detection circuit work in abnormality;
If not, it is determined that the AD detection circuit work is in normal condition.
2. the method according to claim 1, wherein the state by the first port is placed in the I/O After state, the method also includes:
Open the internal pull-up resistor.
3. the method according to claim 1, wherein described when the both end voltage of the charging capacitor is equal to power supply The state of the first port is placed in the AD detecting state by voltage, and acquisition AD voltage value includes:
Judge whether the both end voltage of the charging capacitor is equal to supply voltage;
If so, closing the internal pull-up resistor, the state of the first port is placed in the AD detecting state, acquires AD Voltage value;
If it is not, continuing through the internal pull-up resistor then as charging capacitor charging.
4. the method according to claim 1, wherein the charging is electric when the first resistor works normally Appearance is discharged by the first resistor and the 3rd resistor, and the second resistance and the 3rd resistor are to the charging The voltage of capacitor carries out clamper.
5. the method according to claim 1, wherein the first port is adopted when first resistor open circuit The AD voltage value of collection is equal to supply voltage.
6. method according to any one of claims 1 to 5, which is characterized in that detecting the AD detection circuit work After abnormality, the method also includes: generate prompt information.
7. a kind of AD detection circuit, which is characterized in that including processing unit, charging capacitor, first resistor, second resistance and third Resistance, the processing unit include first port, and the first port includes I/O state and AD detecting state, the charging electricity One end of appearance is connect with the first port, and the other end of the charging capacitor is connect with ground terminal, one end of the first resistor Connect with one end of the charging capacitor, the other end of the first resistor respectively with one end of the second resistance and described One end of three resistance connects, the other end of the second resistance for connecting to power supply, one end of the 3rd resistor with it is described Ground terminal connection, which is characterized in that the processing unit further includes internal pull-up resistor, and one end of the internal pull-up resistor is used for It connects to power supply, the other end of the internal pull-up resistor is connect with the first port;
Wherein, the processing unit further include:
Analog-digital converter;
At least one processor is connect with the analog-digital converter;And
The memory being connect at least one described processor;Wherein,
The memory be stored with can by least one described processor execute instruction repertorie, described instruction program by it is described extremely A few processor executes, so that at least one described processor is able to carry out as claimed in any one of claims 1 to 6 prevent The method of failure erroneous detection.
8. AD detection circuit according to claim 7, which is characterized in that
When the first resistor works normally, the charging capacitor is put by the first resistor and the 3rd resistor Electricity, the second resistance and the 3rd resistor carry out clamper to the voltage of the charging capacitor;
When first resistor open circuit, the AD voltage value of the first port acquisition is equal to supply voltage.
9. AD detection circuit according to claim 7, which is characterized in that the 3rd resistor is NTC resistance.
10. a kind of electronic equipment, which is characterized in that including the described in any item AD detection circuits of such as claim 7 to 9.
CN201811180116.2A 2018-10-10 2018-10-10 Method for preventing failure false detection, AD detection circuit and electronic equipment Active CN109470378B (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202404157U (en) * 2011-10-27 2012-08-29 苏州路之遥科技股份有限公司 Circuit for detecting variable resistance value based on I/O port
CN103091636A (en) * 2011-10-28 2013-05-08 三洋电机株式会社 Abnormity determining method for battery pack and battery pack thereof
CN103913668A (en) * 2014-03-21 2014-07-09 东风商用车有限公司 Circuit for processing and diagnosis of AD signals or switching signals
CN204925298U (en) * 2015-08-21 2015-12-30 深圳市振邦智能科技有限公司 Ntc thermistor's failure detector circuit and temperature measurement circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202404157U (en) * 2011-10-27 2012-08-29 苏州路之遥科技股份有限公司 Circuit for detecting variable resistance value based on I/O port
CN103091636A (en) * 2011-10-28 2013-05-08 三洋电机株式会社 Abnormity determining method for battery pack and battery pack thereof
CN103913668A (en) * 2014-03-21 2014-07-09 东风商用车有限公司 Circuit for processing and diagnosis of AD signals or switching signals
CN204925298U (en) * 2015-08-21 2015-12-30 深圳市振邦智能科技有限公司 Ntc thermistor's failure detector circuit and temperature measurement circuit

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