CN206114872U - False load circuit - Google Patents

False load circuit Download PDF

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Publication number
CN206114872U
CN206114872U CN201621132580.0U CN201621132580U CN206114872U CN 206114872 U CN206114872 U CN 206114872U CN 201621132580 U CN201621132580 U CN 201621132580U CN 206114872 U CN206114872 U CN 206114872U
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CN
China
Prior art keywords
amplifier
gate
controlled switch
load circuit
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn - After Issue
Application number
CN201621132580.0U
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Chinese (zh)
Inventor
蒋承武
管邦伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Chiffo Electronics Instruments Co Ltd
Original Assignee
Chengdu Chiffo Electronics Instruments Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Priority to CN201621132580.0U priority Critical patent/CN206114872U/en
Application granted granted Critical
Publication of CN206114872U publication Critical patent/CN206114872U/en
Withdrawn - After Issue legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model relates to a power supply circuit field, especially a false load circuit. The utility model provides a during the little voltage output of false load circuit, refer to control by discharging by the internal discharge electric current, after output voltage increase or outside access load, current sampling controls jointly by the voltage sample circuit that is used for voltage analysis appearance voltage module.after the load is increased to the certain degree, the internal load stop work. Can let power steady voltage in the time of the empty load export like this, not influence the output when being fully loaded with again, when effectively having solved the power empty load, if the PWM duty cycle drops to the minimum, the CCM mode leads to because the energy storage inductance can not be worked PWM's is discontinuous to the problem of unstability, ripple grow is vibrate in the output that causes.

Description

A kind of dummy load circuit
Technical field
This utility model is related to power supply test field, particularly a kind of dummy load circuit.
Background technology
Generally, when the test related to DC source is carried out, engineer must collect and configure multiple stage instrument, could be complete Into direct current supply and measuring task.When these complex tasks are performed, multiple stage test instrunment may be simultaneously connected to, so as to increase The risk of error;For this purpose, engineer may select the automatic test complicated more than manual test, although automatic test task Manual errors can be reduced, but the research and development engineer write with debugging routine to having worked overloadingly further increases work Amount.And the appearance of DC source analyser avoids engineer and uses the debugging that complexity is carried out before multiple devices and test.Electricity The electric current that source analyser passes through the measurable inflow DUT of its built-in electric current kinetic measurement ability, without such as current probe With this kind of sensor of diverter;, without the need for exploitation control and process of measurement, institute is functional and measures all integrated for DC source analyser In same equipment, without PC, driver and software, equivalent to the workload related to setting more than 90% is reduced; Direct current supply and measurement test assignment that user then just can be completed using independent test equipment with 2 day time, using unidirectional current Source analyser just be able to can be completed in 5 minutes.And it is usual, circuit tester module, oscillograph mould are integrated with DC source analyser There is module, data recordin module and multiple DC power suppliers in block, random waveform, wherein, it is multiple with different output works The DC power supplier of rate is undoubtedly one of most crucial device of power analysis instrument, and DC power supplier is in small voltage output When, because PWM duty cycle drops to minimum, now power supply is exported if zero load, because energy storage inductor can not work to CCM Pattern, can cause that PWM's is discontinuous, cause output concussion unstable, and ripple becomes big.
Utility model content
When goal of the invention of the present utility model is to be directed to each power module small voltage output in DC source analyser, Output concussion is unstable, and ripple becomes big problem.A kind of fictitious load that can prevent power module from carrying out Light Condition electricity is provided Road.
To achieve these goals, the technical solution adopted in the utility model is:
A kind of dummy load circuit, it is characterised in that the first sub- dummy load circuit that the dummy load circuit includes and connects and Second sub- dummy load circuit;The first sub- dummy load circuit and the second sub- dummy load circuit are arranged on power in power module and turn The outfan of mold changing block;
The first sub- dummy load circuit includes the first gate-controlled switch, the second amplifier and concatenate with the first gate-controlled switch the One resistance;
The source electrode of first gate-controlled switch is connected with the first resistor, and the source electrode of first gate-controlled switch also passes through 5th resistance is connected with the reversed-phase output of second amplifier;
The normal phase input end of second amplifier and electric discharge reference input, voltage sampling input and current sample input End connects simultaneously;
The output of second amplifier connects the control end of first gate-controlled switch by the 4th resistance;
The outfan of second amplifier also passes sequentially through 3rd resistor, the first electric capacity and is connected with itself inverting input; The 3rd resistor, the first electric capacity also with the first diode and connect;The positive pole and the first capacitance connection of first diode, bears Pole is connected with 3rd resistor;
The second sub- dummy load circuit includes the second gate-controlled switch, the 3rd amplifier and concatenate with the second gate-controlled switch the Two resistance;
The source electrode of second gate-controlled switch is connected with the second resistance, and the source electrode of second gate-controlled switch also passes through 9th resistance is connected with the reversed-phase output of the 3rd amplifier;
The normal phase input end of the 3rd amplifier and normal phase input end and electric discharge reference input, voltage sampling input and Current sample input connects simultaneously;
The output of the 3rd amplifier connects the control end of second gate-controlled switch by first resistor;
The outfan of the 3rd amplifier also passes sequentially through the tenth resistance, the second electric capacity and is connected with itself inverting input; Tenth resistance, the second electric capacity also with the second diode and connect;The positive pole and the second capacitance connection of second diode, bears Pole is connected with the tenth resistance.
In sum, as a result of above-mentioned technical proposal, the beneficial effects of the utility model are:
This utility model provide for voltage analysis instrument voltage module dummy load circuit small voltage output when, by inside Discharge current refers to control by discharging, and after output voltage increases or outside access is loaded, is total to by voltage sampling and current sampling With control.After load increases to a certain extent, internal load quits work.Can so allow power supply voltage stabilizing in zero load defeated Output when going out, and do not affect fully loaded;When efficiently solving power supply zero load, if PWM duty cycle drops to minimum, Because energy storage inductor can not work to caused by CCM patterns the discontinuous of PWM, so as to unstable, ripple is shaken in the output for causing Become big problem.
Description of the drawings
Fig. 1 is the dummy load circuit circuit diagram that this utility model is provided.
Fig. 2 is the power conversion module exemplary plot that the dummy load circuit that this utility model is provided is applied.
Specific embodiment
Below in conjunction with the accompanying drawings, this utility model is described in detail.
In order that the purpose of this utility model, technical scheme and advantage become more apparent, below in conjunction with accompanying drawing and enforcement Example, is further elaborated to this utility model.It should be appreciated that specific embodiment described herein is only to explain this Utility model, is not used to limit this utility model.
Embodiment 1:As shown in figure 1, the present embodiment provides a kind of dummy load circuit, what the dummy load circuit included and connect First sub- dummy load circuit and the second sub- dummy load circuit;The first sub- dummy load circuit and the second sub- dummy load circuit are arranged In power module as shown in Figure 2 between the outfan VOUT+ and VOUT- of power conversion module;
The first sub- dummy load circuit include the first gate-controlled switch Q1, the second amplifier U1 and with a Q1 gate-controlled switch strings First resistor R1 for connecing;The source electrode of the first gate-controlled switch Q1 is connected with first resistor R1, first gate-controlled switch The source electrode of Q1 is also connected by the 5th resistance R5 with the reversed-phase output of second amplifier U1;The positive of second amplifier U1 Input is connected simultaneously with normal phase input end with electric discharge reference input, voltage sampling input and current sample input;Institute The output for stating the second amplifier U1 connects the control end of the first gate-controlled switch Q1 by the 4th resistance R4;Second amplifier U1 Outfan also pass sequentially through 3rd resistor R3, the first electric capacity C1 and be connected with itself inverting input;3rd resistor R3, One electric capacity C1 also with the first diode D1 and connects;The positive pole of the first diode D1 is connected with the first electric capacity C1, negative pole and Three resistance R3 connect.
The second sub- dummy load circuit includes the second gate-controlled switch U2, the 3rd amplifier U2 and goes here and there with the second gate-controlled switch U2 Second resistance R2 for connecing;The source electrode of the second gate-controlled switch U2 is connected with second resistance R2, second gate-controlled switch The source electrode of U2 is also connected by the 9th circuit R9 with the reversed-phase output of the 3rd amplifier U2;The positive of the 3rd amplifier U2 Input is connected simultaneously with normal phase input end with electric discharge reference input, voltage sampling input and current sample input;Institute The output for stating the 3rd amplifier U2 connects the control end of the second gate-controlled switch U2 by the first circuit R11;3rd amplifier The outfan of U2 also passes sequentially through the tenth resistance R10, the second electric capacity C2 and is connected with itself inverting input;Tenth resistance R10, the second electric capacity C2 also with the second diode D2 and connect;The positive pole of the second diode D2 is connected with the second electric capacity C2, bears Pole is connected with the tenth resistance R10.During work, the dummy load circuit is controlled jointly by electric discharge reference, voltage sampling, current sampling System, this is because, during small voltage output, because PWM duty cycle drops to minimum, now power supply is exported if zero load, by Can not work to CCM patterns in energy storage inductor, can cause that PWM's is discontinuous, cause output concussion unstable, ripple becomes big.It is logical Cross and dummy load circuit is set in power source internal, the constant-current discharge circuit being made up of amplifier makes power supply in unloaded output, by inside Fictitious load guarantees that PWM controls are continuous.The size of discharge current is by reference of discharging, voltage sampling, current sampling co- controlling.It is unloaded When, mainly control is referred to by discharging by internal discharge electric current, after output voltage increases or outside access is loaded, by voltage sampling With current sampling co- controlling.After load increases to a certain extent, internal load quits work.Power supply can so be allowed in sky Voltage stabilizing output when load, and output when not affecting fully loaded.
Preferred embodiment of the present utility model is the foregoing is only, it is all at this not to limit this utility model Any modification, equivalent and improvement made within the spirit and principle of utility model etc., should be included in this utility model Protection domain within.

Claims (1)

1. a kind of dummy load circuit, it is characterised in that the first sub- dummy load circuit and that the dummy load circuit includes and connects Two sub- dummy load circuits;The first sub- dummy load circuit and the second sub- dummy load circuit are arranged on power conversion in power module The outfan of module;
The first sub- dummy load circuit include the first gate-controlled switch, the second amplifier and concatenate with the first gate-controlled switch it is first electric Resistance;
The source electrode of first gate-controlled switch is connected with the first resistor, and the source electrode of first gate-controlled switch also passes through the 5th Resistance is connected with the reversed-phase output of second amplifier;
The normal phase input end of second amplifier is same with electric discharge reference input, voltage sampling input and current sample input When connect;
The output of second amplifier connects the control end of first gate-controlled switch by the 4th resistance;
The outfan of second amplifier also passes sequentially through 3rd resistor, the first electric capacity and is connected with itself inverting input;It is described 3rd resistor, the first electric capacity also with the first diode and connect;The positive pole and the first capacitance connection of first diode, negative pole with 3rd resistor connects;
The second sub- dummy load circuit include the second gate-controlled switch, the 3rd amplifier and concatenate with the second gate-controlled switch it is second electric Resistance;
The source electrode of second gate-controlled switch is connected with the second resistance, and the source electrode of second gate-controlled switch also passes through the 9th Resistance is connected with the reversed-phase output of the 3rd amplifier;
The normal phase input end of the 3rd amplifier and normal phase input end and electric discharge reference input, voltage sampling input and electric current Sampling input connects simultaneously;
The output of the 3rd amplifier connects the control end of second gate-controlled switch by first resistor;
The outfan of the 3rd amplifier also passes sequentially through the tenth resistance, the second electric capacity and is connected with itself inverting input;It is described Tenth resistance, the second electric capacity also with the second diode and connect;The positive pole and the second capacitance connection of second diode, negative pole with Tenth resistance connects.
CN201621132580.0U 2016-10-18 2016-10-18 False load circuit Withdrawn - After Issue CN206114872U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621132580.0U CN206114872U (en) 2016-10-18 2016-10-18 False load circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621132580.0U CN206114872U (en) 2016-10-18 2016-10-18 False load circuit

Publications (1)

Publication Number Publication Date
CN206114872U true CN206114872U (en) 2017-04-19

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621132580.0U Withdrawn - After Issue CN206114872U (en) 2016-10-18 2016-10-18 False load circuit

Country Status (1)

Country Link
CN (1) CN206114872U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106338699A (en) * 2016-10-18 2017-01-18 成都前锋电子仪器有限责任公司 Dummy load circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106338699A (en) * 2016-10-18 2017-01-18 成都前锋电子仪器有限责任公司 Dummy load circuit
CN106338699B (en) * 2016-10-18 2023-04-18 成都前锋电子仪器有限责任公司 Dummy load circuit

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Granted publication date: 20170419

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AV01 Patent right actively abandoned
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