CN109462395B - Interface multiplexing conversion circuit and multiplexing conversion method - Google Patents

Interface multiplexing conversion circuit and multiplexing conversion method Download PDF

Info

Publication number
CN109462395B
CN109462395B CN201811619934.8A CN201811619934A CN109462395B CN 109462395 B CN109462395 B CN 109462395B CN 201811619934 A CN201811619934 A CN 201811619934A CN 109462395 B CN109462395 B CN 109462395B
Authority
CN
China
Prior art keywords
conversion circuit
signal
interface
multiplexing
gear
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201811619934.8A
Other languages
Chinese (zh)
Other versions
CN109462395A (en
Inventor
张俊强
王飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Changzhou Lekva Electronics Co ltd
Original Assignee
Changzhou Lekva Electronics Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Changzhou Lekva Electronics Co ltd filed Critical Changzhou Lekva Electronics Co ltd
Priority to CN201811619934.8A priority Critical patent/CN109462395B/en
Publication of CN109462395A publication Critical patent/CN109462395A/en
Application granted granted Critical
Publication of CN109462395B publication Critical patent/CN109462395B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/017509Interface arrangements
    • H03K19/017536Interface arrangements using opto-electronic devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Control Of Electric Motors In General (AREA)

Abstract

The application relates to an interface multiplexing conversion circuit and a working method thereof, wherein the interface multiplexing conversion circuit comprises: a multiplexing interface and a control and communication multiplexing circuit electrically connected with the multiplexing interface; wherein the multiplexing interface comprises: a plurality of interfaces for controlling speed gear control signals of the alternating current/direct current motor; the control and communication multiplexing circuit is suitable for converting input signals of the speed gear control signal interface of the corresponding alternating current/direct current motor into corresponding gear signals to be input to the processor module. The application realizes the conversion of the speed gear control signal, the communication signal, the direct current speed regulation voltage, the FG feedback signal, the external PWM signal, the digital signal and the analog signal of the alternating current/direct current motor to the receiving signal of the processor module through the multiplexing interface, the matched control and communication multiplexing circuit, the communication circuit and the PWM conversion circuit, thereby simplifying the circuit structure and saving the circuit cost.

Description

Interface multiplexing conversion circuit and multiplexing conversion method
Technical Field
The application relates to the field of motor control, in particular to an interface multiplexing conversion circuit and a multiplexing conversion method.
Background
The motor rotates and is not separated from motor control, the motor control depends on a motor control circuit, the function of the current motor control circuit is quite single, interface circuits such as direct current control, alternating current control and communication are uniformly divided into corresponding independent circuits, and in practical application, the combination of the independent circuits increases the volume of a circuit board and also increases the production cost.
Therefore, in order to solve the above technical problems, an interface multiplexing conversion circuit and a multiplexing conversion method are required to be designed.
Disclosure of Invention
The application aims to provide an interface multiplexing conversion circuit and a multiplexing conversion method.
In order to solve the above technical problems, the present application provides an interface multiplexing conversion circuit, comprising:
a multiplexing interface and a control and communication multiplexing circuit electrically connected with the multiplexing interface; wherein the method comprises the steps of
The multiplexing interface includes: a plurality of interfaces for controlling speed gear control signals of the alternating current/direct current motor;
the control and communication multiplexing circuit is suitable for converting input signals of the speed gear control signal interface of the corresponding alternating current/direct current motor into corresponding gear signals to be input to the processor module.
Further, the interface multiplexing conversion circuit further includes: a communication circuit; wherein the method comprises the steps of
The multiplexing interface further comprises: a communication signal interface;
the communication circuit is suitable for converting the communication signal accessed by the communication signal interface into a corresponding serial signal, and the corresponding serial signal is input to the processor module through the control and communication multiplexing circuit.
Further, the control and communication multiplexing circuit includes: first, second and third gear signal conversion circuits; wherein the method comprises the steps of
The first gear signal conversion circuit comprises a plurality of input ends and a first optical coupler module; wherein the method comprises the steps of
The first input end, the second input end and the third input end in the first gear signal conversion circuit respectively correspond to pins 1, 4 and 5 of an alternating current/direct current motor speed gear control signal interface;
the first input end of the first gear signal conversion circuit is connected with an input resistor R94, the second input end of the first gear signal conversion circuit is connected with a forward bias diode D26 and an input resistor R98, and the third input end of the first gear signal conversion circuit is connected in parallel after being connected with the forward bias diode D29 and the input resistor R101 and is connected to the anode of the luminous body in the first optocoupler module through a resistor R95;
the output end of the first optocoupler module is connected to the gear control end of the processor module through a pull-up resistor R91;
the second gear signal conversion circuit comprises a plurality of input ends and a second optical coupler module; wherein the method comprises the steps of
The first input end and the second input end in the second gear signal conversion circuit correspond to pins 2 and 4 of an alternating current/direct current motor speed gear control signal interface respectively;
the first input end of the second gear signal conversion circuit is connected with an input resistor R105, the second input end of the second gear signal conversion circuit is connected in parallel after being connected with a forward bias diode D30 and an input resistor R108, and the second input end of the second gear signal conversion circuit is connected to the anode of a luminous body in the second optocoupler module through the resistor R106;
the output end of the second optocoupler module is connected to the gear control end of the processor module through a pull-up resistor R103;
the third gear signal conversion circuit comprises a plurality of input ends and a third optical coupler module; wherein the method comprises the steps of
The first input end and the second input end in the third gear signal conversion circuit respectively correspond to 3 pins and 5 pins of an alternating current/direct current motor speed gear control signal interface;
the first input end of the third gear signal conversion circuit is connected with an input resistor R111, the second input end of the third gear signal conversion circuit is connected in parallel after being connected with a forward bias diode D32 and the input resistor R113, and the third gear signal conversion circuit is connected to the anode of a luminous body in the third optocoupler module through the resistor R112;
the output end of the third optocoupler module is connected to the gear control end of the processor module through a pull-up resistor R110;
when a second input end in the first gear signal conversion circuit and the second gear signal conversion circuit is simultaneously connected with an input alternating current/direct current motor speed gear control signal, the first gear signal conversion circuit and the second gear signal conversion circuit generate corresponding gear control signals to corresponding gear control ends of the processor module;
when a third input end in the first gear signal conversion circuit and a second input end in the third gear signal conversion circuit are simultaneously connected with an input alternating current/direct current motor speed gear control signal, the first gear signal conversion circuit and the third gear signal conversion circuit generate corresponding gear control signals to corresponding gear control ends of the processor module.
Further, the serial signal includes: serial port read signal, serial port write signal, serial port enable signal, serial port write pull-up signal; wherein the method comprises the steps of
The serial port writing pull-up signal is connected to the anode of the illuminant in the first optocoupler module, the cathode of the illuminant in the first optocoupler module is connected to the serial port reading signal, and the output end of the first optocoupler module is also connected to the serial port data receiving end of the processor module;
the communication interface circuit includes: fourth and fifth optocoupler modules;
the anode of the illuminant in the fourth optocoupler module is connected with a high level, and the cathode of the illuminant is connected to the serial port enabling output end of the processor module;
the output end of the fourth optocoupler module is connected to the 3 pin of the speed gear control signal interface of the alternating current/direct current motor through a reverse bias diode D34;
the anode of a luminous body in the fifth optocoupler module is connected with a high level, and the cathode of the luminous body is connected to the serial data transmitting end of the processor module; and the output end of the fifth optocoupler module is connected to the 3 pin through a reverse bias diode D41;
when the 3-pin is connected with the FG feedback signal, the output end of the fourth optical coupler module is suitable for outputting a serial port enabling signal to be connected with a communication circuit; and the output end of the fifth optocoupler module is suitable for outputting serial port write signals to be accessed to the communication circuit.
Further, the multiplexing interface further includes: a direct current speed regulation voltage interface;
the interface multiplexing conversion circuit further comprises a PWM conversion circuit;
the PWM conversion circuit is suitable for being connected with a direct current speed regulation voltage interface to convert the direct current speed regulation voltage into corresponding PWM signals;
the PWM conversion circuit includes: a comparison circuit, a charge-discharge circuit and a driving circuit; wherein the method comprises the steps of
The charging and discharging circuit is suitable for generating charging and discharging signals and comparing the charging and discharging signals with the direct current speed regulation voltage through the comparison circuit so as to output PWM signals.
Further, the 1 pin in the multiplexing interface is also used as a digital signal access end, and the first gear signal conversion circuit is suitable for inputting digital signals to the processor module through the first optocoupler module;
the 2 pins in the multiplexing interface are also used as an external PWM signal access end and an analog signal input end, and when the 2 pins are used as the analog signal input end, analog signals are input to the processor module through the linear interval of the second optical coupler module; and
and a 3 pin in the multiplexing interface is also used as an FG feedback signal access end, and FG feedback signals are input to the processor module through a third gear signal conversion circuit.
In yet another aspect, the present application further provides a multiplexing conversion method, including:
a multiplexing interface is provided to receive a plurality of AC/DC motor speed gear control signals, and/or communication signals, and/or DC speed regulation voltages, and/or FG feedback signals, and/or external PWM signals, and/or digital signals, and/or analog signals, and to convert the signals to processor module receiving signals.
Further, the multiplexing conversion method is adapted to convert the above signals to the processor module receiving signals using the interface multiplexing conversion circuit.
The interface multiplexing conversion circuit and the multiplexing conversion method have the beneficial effects that the multiplexing interface, the matched control and communication multiplexing circuit, the communication circuit and the PWM conversion circuit are used for converting the speed gear control signal, the communication signal, the direct current speed regulation voltage, the FG feedback signal, the external PWM signal, the digital signal and the analog signal of the alternating current/direct current motor into the receiving signal of the processor module, so that the circuit structure is simplified, and the circuit cost is saved.
Drawings
The application will be further described with reference to the drawings and examples.
FIG. 1 is a pin schematic diagram of a multiplexing interface of the present application;
FIG. 2 is a schematic block diagram of an interface multiplexing conversion circuit of the present application;
FIG. 3 is a circuit diagram of a communication circuit of the present application;
FIG. 4 is a first gear signal conversion circuit of the present application;
FIG. 5 is a second gear signal conversion circuit of the present application;
FIG. 6 is a third gear signal conversion circuit of the present application;
fig. 7 is a communication interface circuit of the present application.
In the figure: the first optical coupler module U14, the second optical coupler module U17, the third optical coupler module U18, the fourth optical coupler module U20 and the fifth optical coupler module U21.
Detailed Description
The application will now be described in further detail with reference to the accompanying drawings. The drawings are simplified schematic representations which merely illustrate the basic structure of the application and therefore show only the structures which are relevant to the application.
FIG. 1 is a pin schematic diagram of a multiplexing interface of the present application;
FIG. 2 is a schematic block diagram of an interface multiplexing conversion circuit of the present application;
as shown in fig. 1 and 2, the present embodiment provides an interface multiplexing conversion circuit, including: a multiplexing interface and a control and communication multiplexing circuit electrically connected with the multiplexing interface; wherein the multiplexing interface comprises: a plurality of interfaces for controlling speed gear control signals of the alternating current/direct current motor; the control and communication multiplexing circuit is suitable for converting input signals of the speed gear control signal interface of the corresponding alternating current/direct current motor into corresponding gear signals to be input to the processor module.
The pin definition of the multiplexing interface is shown in fig. 1, and is only illustrated in the present embodiment, and the pin distribution is not limited to the above.
FIG. 3 is a circuit diagram of a communication circuit of the present application;
the interface multiplexing conversion circuit further includes: a communication circuit; wherein the multiplexing interface further comprises: a communication signal interface; the communication circuit is suitable for converting the communication signal accessed by the communication signal interface into a corresponding serial signal, and the corresponding serial signal is input to the processor module through the control and communication multiplexing circuit.
The communication circuit comprises a 485 signal conversion chip U19, and 485 signals can be accessed from a 10 pin and a 11 pin of the multiplexing interface.
In this embodiment, the pin numbers of the speed gear control signal interfaces of the ac/dc motors are consistent with the pin numbers of the multiplexing interfaces.
FIG. 4 is a first gear signal conversion circuit of the present application;
FIG. 5 is a second gear signal conversion circuit of the present application;
FIG. 6 is a third gear signal conversion circuit of the present application;
as shown in fig. 4 to 6, the control and communication multiplexing circuit includes: first, second and third gear signal conversion circuits; the first gear signal conversion circuit comprises a plurality of input ends and a first optical coupler module U14; the first input end, the second input end and the third input end in the first gear signal conversion circuit respectively correspond to pins 1, 4 and 5 of an alternating current/direct current motor speed gear control signal interface;
the first input end of the first gear signal conversion circuit is connected with an input resistor R94, the second input end of the first gear signal conversion circuit is connected with a forward bias diode D26 and an input resistor R98, and the third input end of the first gear signal conversion circuit is connected in parallel after being connected with the forward bias diode D29 and the input resistor R101 and is connected to the anode of the illuminant in the first optocoupler module U14 through a resistor R95;
the output end of the first optocoupler module U14 is connected to the gear control end of the processor module through a pull-up resistor R91; the second gear signal conversion circuit comprises a plurality of input ends and a second optical coupler module U17; the first input end and the second input end of the second gear signal conversion circuit correspond to pins 2 and 4 of an alternating current/direct current motor speed gear control signal interface respectively; the first input end of the second gear signal conversion circuit is connected with an input resistor R105, the second input end of the second gear signal conversion circuit is connected in parallel after being connected with a forward bias diode D30 and an input resistor R108, and the second input end of the second gear signal conversion circuit is connected to the anode of a luminous body in a second optocoupler module U17 through the resistor R106; the output end of the second optocoupler module U17 is connected to the gear control end of the processor module through a pull-up resistor R103; the third gear signal conversion circuit comprises a plurality of input ends and a third optocoupler module U18; the first input end and the second input end in the third gear signal conversion circuit respectively correspond to 3 pins and 5 pins of an alternating current/direct current motor speed gear control signal interface; the first input end of the third gear signal conversion circuit is connected with an input resistor R111, the second input end of the third gear signal conversion circuit is connected in parallel after being connected with a forward bias diode D32 and the input resistor R113, and the third gear signal conversion circuit is connected to the anode of a luminous body in a third optocoupler module U18 through the resistor R112; the output end of the third optocoupler module U18 is connected to the gear control end of the processor module through a pull-up resistor R110; when a second input end in the first gear signal conversion circuit and the second gear signal conversion circuit is simultaneously connected with an input alternating current/direct current motor speed gear control signal, the first gear signal conversion circuit and the second gear signal conversion circuit generate corresponding gear control signals to corresponding gear control ends of the processor module; when a third input end in the first gear signal conversion circuit and a second input end in the third gear signal conversion circuit are simultaneously connected with an input alternating current/direct current motor speed gear control signal, the first gear signal conversion circuit and the third gear signal conversion circuit generate corresponding gear control signals to corresponding gear control ends of the processor module.
The 1, 2 and 3 pins corresponding to the speed gear control signal interface of the alternating current/direct current motor can receive the speed regulation signals of 1, 2 and 3 gears, the motor is controlled to regulate the speed, the 4 pins (the speed regulation signals of 4 th gear) can be simultaneously connected to the second input ends of the first and second gear signal conversion circuits, the first and second gear signal conversion circuits can simultaneously generate corresponding control levels, and the processor module can judge the speed regulation gear according to the levels; similarly, the first and third gear signal conversion circuits can be connected with 5 feet (speed regulating signals of 5 th gear) at the same time, the first and third gear signal conversion circuits can generate corresponding control levels at the same time, and the processor module can judge the speed regulating gears according to the levels.
Referring back to fig. 3 and 4, the serial signal includes: a serial port read signal RS485_R, a serial port write signal RS485_D, a serial port enable signal RS485_EN and a serial port write pull-Up signal RS485_R_Up; the serial port write pull-Up signal RS485_R_Up is connected to an anode of a light emitting body in the first optocoupler module U14, a cathode of the light emitting body in the first optocoupler module U14 is connected to the serial port read signal RS485_R, and an output end of the first optocoupler module U14 is also connected to a serial port data receiving end Usart_Rx of the processor module.
FIG. 7 is a communication interface circuit of the present application;
as shown in fig. 7, the communication interface circuit includes: fourth and fifth optocoupler modules;
the anode of the illuminant in the fourth optocoupler module U20 is connected with a high level, and the cathode of the illuminant is connected to the serial port enabling output end of the processor module; the output end of the fourth optocoupler module U20 is connected to the 3 pin of the speed gear control signal interface of the alternating current/direct current motor through a reverse bias diode D34; the anode of a luminous body in the fifth optocoupler module U21 is connected with a high level, and the cathode of the luminous body is connected to the serial data transmitting end of the processor module; and the output end of the fifth optocoupler module U21 is connected to the 3 pin through a reverse bias diode D41; when the 3-pin is connected with an FG feedback signal (FG_ReadFromMoter), the output end of the fourth optical coupling module U20 is suitable for outputting a serial port enabling signal to be connected with a communication circuit; and the output end of the fifth optocoupler module U21 is adapted to output a serial write signal usart_tx to be connected to the communication circuit.
As shown in fig. 1, the multiplexing interface further includes: a direct current speed regulation voltage interface; the interface multiplexing conversion circuit further comprises a PWM conversion circuit; the PWM conversion circuit is adapted to connect to a dc regulated voltage interface (i.e., 7 pins of the multiplexed interface) to convert the dc regulated voltage to a corresponding PWM signal.
The PWM conversion circuit mentioned in this embodiment has been disclosed in various documents of the prior art, and the present application is not concerned with making improvements to the PWM conversion circuit itself.
In this embodiment, as shown in fig. 1, pin 1 in the multiplexing interface is also used as a digital signal access terminal, the digital signal may be a writeto, and the first gear signal conversion circuit is adapted to input the digital signal to the processor module through the first optocoupler module U14; the 2 pin in the multiplexing interface is also used as an external PWM signal access end and an analog signal input end, and when the 2 pin is used as an analog signal input end, an analog signal is input to the processor module through a linear section of the second optical coupler module U17; and 3 pins in the multiplexing interface are also used as FG feedback signal access ends, and FG feedback signals are input to the processor module through the third gear signal conversion circuit.
Therefore, the interface multiplexing conversion circuit can meet the requirements that a plurality of alternating current/direct current motor speed gear control signals, communication signals, direct current speed regulation voltages, FG feedback signals, external PWM signals, digital signals and analog signals are converted into signals received by the processor module.
The embodiment also provides a multiplexing conversion method, which includes: a multiplexing interface is provided to receive a plurality of AC/DC motor speed gear control signals, and/or communication signals, and/or DC speed regulation voltages, and/or FG feedback signals, and/or external PWM signals, and/or digital signals, and/or analog signals, and to convert the signals to processor module receiving signals.
In this embodiment, the multiplexing conversion method is adapted to convert the above signals to the processor module receiving signals through the interface multiplexing conversion circuit.
In summary, the interface multiplexing conversion circuit and the multiplexing conversion method of the application realize conversion of the speed gear control signal, the communication signal, the direct current speed regulation voltage, the FG feedback signal, the external PWM signal, the digital signal and the analog signal of the alternating current/direct current motor to the receiving signal of the processor module through the multiplexing interface, the matched control and communication multiplexing circuit, the communication circuit and the PWM conversion circuit, thereby simplifying the circuit structure and saving the circuit cost.
With the above-described preferred embodiments according to the present application as an illustration, the above-described descriptions can be used by persons skilled in the relevant art to make various changes and modifications without departing from the scope of the technical idea of the present application. The technical scope of the present application is not limited to the description, but must be determined according to the scope of claims.

Claims (5)

1. An interface multiplexing conversion circuit, comprising:
a multiplexing interface and a control and communication multiplexing circuit electrically connected with the multiplexing interface; wherein the method comprises the steps of
The multiplexing interface includes: a plurality of interfaces for controlling speed gear control signals of the alternating current/direct current motor;
the control and communication multiplexing circuit is suitable for converting input signals of the speed gear control signal interface of the corresponding alternating current/direct current motor into corresponding gear signals to be input to the processor module;
the interface multiplexing conversion circuit further includes: a communication circuit; wherein the method comprises the steps of
The multiplexing interface further comprises: a communication signal interface;
the communication circuit is suitable for converting the communication signal accessed by the communication signal interface into a corresponding serial signal and inputting the serial signal to the processor module through the control and communication multiplexing circuit;
the control and communication multiplexing circuit comprises: first, second and third gear signal conversion circuits; wherein the method comprises the steps of
The first gear signal conversion circuit comprises a plurality of input ends and a first optical coupler module; wherein the method comprises the steps of
The first input end, the second input end and the third input end in the first gear signal conversion circuit respectively correspond to pins 1, 4 and 5 of an alternating current/direct current motor speed gear control signal interface;
the first input end of the first gear signal conversion circuit is connected with an input resistor R94, the second input end of the first gear signal conversion circuit is connected with a forward bias diode D26 and an input resistor R98, and the third input end of the first gear signal conversion circuit is connected in parallel after being connected with the forward bias diode D29 and the input resistor R101 and is connected to the anode of the luminous body in the first optocoupler module through a resistor R95;
the output end of the first optocoupler module is connected to the gear control end of the processor module through a pull-up resistor R91;
the second gear signal conversion circuit comprises a plurality of input ends and a second optical coupler module; wherein the method comprises the steps of
The first input end and the second input end in the second gear signal conversion circuit correspond to pins 2 and 4 of an alternating current/direct current motor speed gear control signal interface respectively;
the first input end of the second gear signal conversion circuit is connected with an input resistor R105, the second input end of the second gear signal conversion circuit is connected in parallel after being connected with a forward bias diode D30 and an input resistor R108, and the second input end of the second gear signal conversion circuit is connected to the anode of a luminous body in the second optocoupler module through the resistor R106;
the output end of the second optocoupler module is connected to the gear control end of the processor module through a pull-up resistor R103;
the third gear signal conversion circuit comprises a plurality of input ends and a third optical coupler module; wherein the method comprises the steps of
The first input end and the second input end in the third gear signal conversion circuit respectively correspond to 3 pins and 5 pins of an alternating current/direct current motor speed gear control signal interface;
the first input end of the third gear signal conversion circuit is connected with an input resistor R111, the second input end of the third gear signal conversion circuit is connected in parallel after being connected with a forward bias diode D32 and the input resistor R113, and the third gear signal conversion circuit is connected to the anode of a luminous body in the third optocoupler module through the resistor R112;
the output end of the third optocoupler module is connected to the gear control end of the processor module through a pull-up resistor R110;
when a second input end in the first gear signal conversion circuit and the second gear signal conversion circuit is simultaneously connected with an input alternating current/direct current motor speed gear control signal, the first gear signal conversion circuit and the second gear signal conversion circuit generate corresponding gear control signals to corresponding gear control ends of the processor module;
when a third input end in the first gear signal conversion circuit and a second input end in the third gear signal conversion circuit are simultaneously connected with an input alternating current/direct current motor speed gear control signal, the first gear signal conversion circuit and the third gear signal conversion circuit generate corresponding gear control signals to corresponding gear control ends of the processor module; and
the 1 pin in the multiplexing interface is also used as a digital signal access end, and the first gear signal conversion circuit is suitable for inputting digital signals to the processor module through the first optocoupler module.
2. The interface multiplexing switching circuit of claim 1 wherein,
the serial signal includes: serial port read signal, serial port write signal, serial port enable signal, serial port write pull-up signal; wherein the method comprises the steps of
The serial port writing pull-up signal is connected to the anode of the illuminant in the first optocoupler module, the cathode of the illuminant in the first optocoupler module is connected to the serial port reading signal, and the output end of the first optocoupler module is also connected to the serial port data receiving end of the processor module;
the control and communication multiplexing circuit comprises: fourth and fifth optocoupler modules;
the anode of the illuminant in the fourth optocoupler module is connected with a high level, and the cathode of the illuminant is connected to the serial port enabling output end of the processor module;
the output end of the fourth optocoupler module is connected to the 3 pin of the speed gear control signal interface of the alternating current/direct current motor through a reverse bias diode D34;
the anode of a luminous body in the fifth optocoupler module is connected with a high level, and the cathode of the luminous body is connected to the serial data transmitting end of the processor module; and the output end of the fifth optocoupler module is connected to the 3 pin through a reverse bias diode D41;
when the 3-pin is connected with the FG feedback signal, the output end of the fourth optical coupler module is suitable for outputting a serial port enabling signal to be connected with a communication circuit; and the output end of the fifth optocoupler module is suitable for outputting serial port write signals to be accessed to the communication circuit.
3. The interface multiplexing switching circuit of claim 1 wherein,
the multiplexing interface further comprises: a direct current speed regulation voltage interface;
the interface multiplexing conversion circuit further comprises a PWM conversion circuit;
the PWM conversion circuit is suitable for being connected with a direct current speed regulation voltage interface to convert the direct current speed regulation voltage into corresponding PWM signals.
4. The interface multiplexing switching circuit of claim 1 wherein,
the 2 pins in the multiplexing interface are also used as an external PWM signal access end and an analog signal input end, and when the 2 pins are used as the analog signal input end, analog signals are input to the processor module through the linear interval of the second optical coupler module; and
and a 3 pin in the multiplexing interface is also used as an FG feedback signal access end, and FG feedback signals are input to the processor module through a third gear signal conversion circuit.
5. A multiplexing conversion method, comprising:
setting a multiplexing interface to receive a plurality of alternating current/direct current motor speed gear control signals, and/or communication signals, and/or direct current speed regulation voltage, and/or FG feedback signals, and/or external PWM signals, and/or digital signals, and/or analog signals, and converting the signals to a processor module receiving signal;
the multiplexing conversion method is adapted to convert the above signals to processor module received signals using the interface multiplexing conversion circuit according to any one of claims 1-4.
CN201811619934.8A 2018-12-28 2018-12-28 Interface multiplexing conversion circuit and multiplexing conversion method Active CN109462395B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811619934.8A CN109462395B (en) 2018-12-28 2018-12-28 Interface multiplexing conversion circuit and multiplexing conversion method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811619934.8A CN109462395B (en) 2018-12-28 2018-12-28 Interface multiplexing conversion circuit and multiplexing conversion method

Publications (2)

Publication Number Publication Date
CN109462395A CN109462395A (en) 2019-03-12
CN109462395B true CN109462395B (en) 2023-08-15

Family

ID=65615288

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811619934.8A Active CN109462395B (en) 2018-12-28 2018-12-28 Interface multiplexing conversion circuit and multiplexing conversion method

Country Status (1)

Country Link
CN (1) CN109462395B (en)

Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5452307A (en) * 1993-10-20 1995-09-19 Hitachi, Ltd. Data multiplexing system having at least one low-speed interface circuit connected to a bus
CN201331569Y (en) * 2008-11-28 2009-10-21 郑州春泉暖通节能设备有限公司 Novel multi-level motor shift-level detecting device
EP2375868A2 (en) * 2010-04-09 2011-10-12 BAG electronics GmbH Electronic pre-switching device with interface device
CN102223120A (en) * 2010-04-15 2011-10-19 山东欧锴空调科技有限公司 Method for controlling permanent magnet brushless direct-current motor and driver
JP2012209663A (en) * 2011-03-29 2012-10-25 Oki Electric Ind Co Ltd Coupler in optical code division multiplex communication system
CN103105214A (en) * 2013-01-21 2013-05-15 河南理工大学 Detecting device of coal bunker material level
CN103954924A (en) * 2014-05-04 2014-07-30 国家电网公司 Measuring device and method for measurement errors of electric measurement meter in frequency fluctuation process
CN204116516U (en) * 2014-09-19 2015-01-21 郑州春泉节能股份有限公司 The hardware configuration of multi-speed motor gear wrong pick-up unit
CN104579109A (en) * 2013-10-28 2015-04-29 中山大洋电机股份有限公司 Electronic commutation motor, control method thereof, and HVAC debugging system applied by electronic commutation motor
CN205158342U (en) * 2015-10-19 2016-04-13 深圳微步信息股份有限公司 HDMI interface multiplex circuit
CN205178853U (en) * 2015-10-09 2016-04-20 常州里戈勃劳伊特新亚电机有限公司 Third gear speed governing detection circuitry
CN106444905A (en) * 2016-09-19 2017-02-22 中国科学院合肥物质科学研究院 High-temperature superconducting welding temperature synchronous measurement controller
CN107273320A (en) * 2016-04-08 2017-10-20 中兴通讯股份有限公司 A kind of adaptive multiplexer of communication interface hardware and method
CN206594471U (en) * 2016-09-28 2017-10-27 哈尔滨理工大学 A kind of composite power source pure electric vehicle controller
CN207007962U (en) * 2017-07-11 2018-02-13 Tcl空调器(中山)有限公司 The performance test circuit and device of a kind of photoelectrical coupler
CN207650614U (en) * 2017-12-29 2018-07-24 郑州豪威尔电子科技股份有限公司 A kind of polymorphic controller of agricultural equipment
CN209283207U (en) * 2018-12-28 2019-08-20 常州朗奇威电器有限公司 Interface multiplexes conversion circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9870337B2 (en) * 2013-02-28 2018-01-16 E3 Embedded Systems, Llc Method and apparatus for the processor independent embedded platform

Patent Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5452307A (en) * 1993-10-20 1995-09-19 Hitachi, Ltd. Data multiplexing system having at least one low-speed interface circuit connected to a bus
CN201331569Y (en) * 2008-11-28 2009-10-21 郑州春泉暖通节能设备有限公司 Novel multi-level motor shift-level detecting device
EP2375868A2 (en) * 2010-04-09 2011-10-12 BAG electronics GmbH Electronic pre-switching device with interface device
CN102223120A (en) * 2010-04-15 2011-10-19 山东欧锴空调科技有限公司 Method for controlling permanent magnet brushless direct-current motor and driver
JP2012209663A (en) * 2011-03-29 2012-10-25 Oki Electric Ind Co Ltd Coupler in optical code division multiplex communication system
CN103105214A (en) * 2013-01-21 2013-05-15 河南理工大学 Detecting device of coal bunker material level
CN104579109A (en) * 2013-10-28 2015-04-29 中山大洋电机股份有限公司 Electronic commutation motor, control method thereof, and HVAC debugging system applied by electronic commutation motor
CN103954924A (en) * 2014-05-04 2014-07-30 国家电网公司 Measuring device and method for measurement errors of electric measurement meter in frequency fluctuation process
CN204116516U (en) * 2014-09-19 2015-01-21 郑州春泉节能股份有限公司 The hardware configuration of multi-speed motor gear wrong pick-up unit
CN205178853U (en) * 2015-10-09 2016-04-20 常州里戈勃劳伊特新亚电机有限公司 Third gear speed governing detection circuitry
CN205158342U (en) * 2015-10-19 2016-04-13 深圳微步信息股份有限公司 HDMI interface multiplex circuit
CN107273320A (en) * 2016-04-08 2017-10-20 中兴通讯股份有限公司 A kind of adaptive multiplexer of communication interface hardware and method
CN106444905A (en) * 2016-09-19 2017-02-22 中国科学院合肥物质科学研究院 High-temperature superconducting welding temperature synchronous measurement controller
CN206594471U (en) * 2016-09-28 2017-10-27 哈尔滨理工大学 A kind of composite power source pure electric vehicle controller
CN207007962U (en) * 2017-07-11 2018-02-13 Tcl空调器(中山)有限公司 The performance test circuit and device of a kind of photoelectrical coupler
CN207650614U (en) * 2017-12-29 2018-07-24 郑州豪威尔电子科技股份有限公司 A kind of polymorphic controller of agricultural equipment
CN209283207U (en) * 2018-12-28 2019-08-20 常州朗奇威电器有限公司 Interface multiplexes conversion circuit

Also Published As

Publication number Publication date
CN109462395A (en) 2019-03-12

Similar Documents

Publication Publication Date Title
CN101770151B (en) Luminance regulating system for miniature projector
AU2013369771B2 (en) Multipath current source switching device
CN104218951B (en) The operating method of semiconductor devices and semiconductor devices
CN209283207U (en) Interface multiplexes conversion circuit
CN101674007A (en) Power supply device
CN106992777B (en) Photoelectric isolation type transceiver based on integrated packaging
CN109462395B (en) Interface multiplexing conversion circuit and multiplexing conversion method
CN101859117B (en) Analogue quantity output circuit
CN108512397B (en) Power supply module, power supply system composed of power supply module and control method of power supply system
CN216697026U (en) PLC analog output isolation circuit
CN101131809B (en) LCD device and method for conveying gamma voltage signal
CN102063177A (en) Power management device and host computer
CN213602560U (en) Circuit for compensating according to load
CN114207698B (en) Power management device and display device
CN107733226B (en) Two-wire system laminated power supply and transmitter with same
CN103560575A (en) Power supply device and electronic equipment
CN102122186B (en) High-power negative pressure numerical control constant current module
CN112099397A (en) APD bias circuit with overcurrent protection
CN216248840U (en) Control card system for laser welding
CN1983781A (en) Dc-dc conveter and organiclight emitting display using the same
KR101503684B1 (en) Timing controller, liquid crystal display comprising the same and driving method of the liquid crystal display
CN218633951U (en) Power supply communication system
CN212208277U (en) Converter of two types-C terminal commentaries on classics two HDMI interfaces
TWI757769B (en) Signal detector, signal transmitter, power controller, and signal transmitting method thereof
CN214544884U (en) Intelligent lighting controller

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant