CN109427308A - The display panel drive device and method of compensation pixel voltage - Google Patents
The display panel drive device and method of compensation pixel voltage Download PDFInfo
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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Abstract
A kind of display panel drive device and method.Display panel drive device includes sequential control circuit, memory, compensation circuit and data drive circuit.Memory is provided in the current pixel in display panel and at least one coupled capacitor information between at least one adjacent pixels.By using the coupled capacitor information, compensation circuit compensation current pixel data and obtain compensated pixel data, with compensate current pixel because the adjacent pixels coupled voltages caused by variation.Data drive circuit removes driving current pixel according to compensated pixel data.
Description
Technical field
The present invention relates to a kind of display devices, and in particular to a kind of display panel drive device of compensation pixel voltage with
Method.
Background technique
When liquid crystal on silicon (liquiid crystal on silicon, hereinafter referred to as LCoS) is for generally showing purposes,
In shown picture, the uniformity of same gray level is compared with being paid attention to, and the voltage error of pixel can be tolerated.When LCoS is used
In phase-modulation (phase modulation) in application, the voltage error of pixel compared with being paid attention to because the voltage of pixel misses
Difference can substantially influence image quality.Anyway, because the coupled capacitor between adjacent pixel there will necessarily be.This coupling
Capacitor will cause the voltage error of pixel.Coupling when the distance between adjacent pixel/gap is smaller, between adjacent pixel
It is bigger to close capacitor.Pixel voltage will receive the influence of neighborhood pixels coupled capacitor, so that the voltage error of pixel is all the more serious.For
The voltage error of pixel caused by coupled capacitor between adjacent pixel, there are no solutions appropriate for the prior art.
Summary of the invention
The present invention provides a kind of display panel drive device and method, can compensate current pixel because of the coupling of adjacent pixels
Close variation caused by voltage.
The embodiment of the present invention provides a kind of display panel drive device.Display panel drive device includes timing control electricity
Road, memory, compensation circuit and data drive circuit.Sequential control circuit is to provide the current pixel in display panel
Current pixel data.Memory to provide the current pixel in display panel and between at least one adjacent pixels extremely
Few coupled capacitor information.Compensation circuit is coupled to sequential control circuit, to receive current pixel data.Compensation circuit coupling
To memory, to receive coupled capacitor information.By using the coupled capacitor information, compensation circuit is to compensate current pixel
Data and obtain compensated pixel data, with compensate current pixel because the adjacent pixels coupled voltages caused by voltage it is inclined
It moves.Data drive circuit is coupled to the current pixel of display panel.Data drive circuit is coupled to compensation circuit, to receive through mending
Repay pixel data.Data drive circuit is to remove driving current pixel according to compensated pixel data.
The embodiment of the present invention provides a kind of displaying panel driving method.The displaying panel driving method include: by when
Sequence control circuit provides the current pixel data of the current pixel in display panel；It is provided in display panel by memory
At least one coupled capacitor information between current pixel and at least one adjacent pixels；Believed by using the coupled capacitor
Breath compensates current pixel data by compensation circuit and obtains compensated pixel data, to compensate current pixel because of the adjacent picture
Variation caused by the coupled voltages of element；And it is gone to drive current picture according to compensated pixel data by data drive circuit
Element.
Based on above-mentioned, display panel drive device and method described in all embodiments of the present invention can be provided by memory
In the current pixel in display panel and at least one coupled capacitor information between at least one adjacent pixels.By using institute
Coupled capacitor information is stated, compensation circuit can compensate current pixel data and obtain compensated pixel data.Therefore, display panel
Driving device can compensate current pixel because adjacent pixels coupled voltages caused by variation.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and cooperate specification attached
Figure is described in detail below.
Detailed description of the invention
Fig. 1 is the circuit box (circuit according to a kind of display panel drive device of one embodiment of the invention
Block) schematic diagram.
Fig. 2 is the flow diagram according to a kind of displaying panel driving method of one embodiment of the invention.
Fig. 3 is the schematic diagram of the partial pixel of display panel shown in Fig. 1 according to one embodiment of the invention.
Fig. 4 is the schematic diagram of the dipole inversion of the signal of display panel shown in Fig. 1 according to one embodiment of the invention.
Fig. 5 is according to process the step of obtaining the compensated pixel data shown in one embodiment of the invention explanatory diagram 2
Schematic diagram.
Description of symbols:
10: display panel
100: display panel drive device
110: sequential control circuit
120: memory
130: compensation circuit
140: data drive circuit
CP2P5、CP4P5、CP6P5、CP8P5: coupled capacitor
FN-1、FN、FN+1: frame
P1, P2, P3, P4, P5, P6, P7, P8, P9: pixel
S210~S240, S510~S530: step
VCOM: common voltage
VGMA (0), VGMA (128), VGMA (255): gray scale voltage
VGR: pixel voltage maximum magnitude
Specific embodiment
" coupling (or connection) " word used in present disclosure specification full text (including claim) can refer to any
Direct or indirect connection means.For example, if it is described herein that first device coupling (or connection) then should in second device
Be construed as the first device can be directly connected to the second device or the first device can by other devices or certain
It plants connection means and is coupled indirectly to the second device.In addition, all possible places, in the drawings and embodiments using identical
Element/component/step of label represents same or like part.Identical label is used in different embodiments or uses identical term
Element/component/step can be with cross-referenced related description.
Fig. 1 is the circuit box (circuit according to a kind of display panel drive device 100 of one embodiment of the invention
Block) schematic diagram.Display panel drive device 100 can drive display panel 10.According to design requirement, display panel 10 can
To be existing LCoS display panel, liquid crystal display panel or other display panels.When display panel drive device 100 includes
Sequence control circuit 110, memory 120, compensation circuit 130 and data drive circuit 140.
Fig. 2 is the flow diagram according to a kind of displaying panel driving method of one embodiment of the invention.Please refer to Fig. 1
With Fig. 2.In step S210, the data that sequential control circuit 110 can provide multiple pixels of display panel 10 give compensation electricity
Road 130.For example, sequential control circuit 110 can be in step S210 by some current pixel in display panel 10
Current pixel data be supplied to compensation circuit 130.According to design requirement, sequential control circuit 110 can be existing timing
Controller or other pixel-data processing circuit/elements.In step S220, memory 120 can be provided in display panel
At least one coupled capacitor information between current pixel and at least one adjacent pixels in 10 is to compensation circuit 130.
Fig. 3 is the schematic diagram of the partial pixel of display panel 10 shown in Fig. 1 according to one embodiment of the invention.Display surface
Plate 10 include multiple pixels, such as pixel P1 shown in Fig. 3, pixel P2, pixel P3, pixel P4, pixel P5, pixel P6, pixel P7,
Pixel P8 and pixel P9.The distance between two adjacent pixels/gap shown in Fig. 3 has been exaggerated.It is needed according to actual design
It asks, the distance between two adjacent pixels/gap is usually very small.There are coupled capacitors between two adjacent pixels
(parasitic capacitance).For example, there are coupled capacitor C between pixel P2 and pixel P5P2P5, exist between pixel P4 and pixel P5
Coupled capacitor CP4P5, there are coupled capacitor C between pixel P6 and pixel P5P6P5, and exist between pixel P8 and pixel P5 and couple electricity
Hold CP8P5, as shown in Figure 3.When pixel P5 is current pixel, memory 120 can provide in step S220 corresponds to coupling
Capacitor CP2P5、CP4P5、CP6P5With CP8P5Coupled capacitor information to compensation circuit 130.
Compensation circuit 130 is coupled to sequential control circuit 110, to receive the current pixel data of current pixel P5.Compensation
Circuit 130 is coupled to memory 120, to receive the coupled capacitor information.By using the coupled capacitor information, compensation electricity
Road 130 can compensate the current pixel data of current pixel P5 in step S230 and obtain compensated pixel data, to mend
Repay the variation because of current pixel P5 caused by the coupled voltages of adjacent pixels P2, P4, P6 and P8.
Data drive circuit 140 be coupled to display panel 10 multiple pixels (such as current pixel P5 shown in Fig. 3 and other
Pixel).Data drive circuit 140 is coupled to compensation circuit 130, to receive the compensated pixel data.In step S240,
Data drive circuit 140 can remove the current pixel P5 of driving display panel 10 according to compensated pixel data.It is needed according to design
It asks, data drive circuit 140 can be existing data driver, existing source electrode driver or other driving circuit/members
Part.By considering that the voltage change of adjacent pixels, compensation circuit 130 can change the pixel data (example of current pixel P5 in advance
Such as grayscale value).By way of pre-compensation, display panel drive device 100 can effectively reduce the voltage error of pixel.
For example, in some embodiments, by using the coupled capacitor information, and by using current pixel
Grey scale between (such as pixel P5 shown in Fig. 3) and adjacent pixels (such as pixel P2, P4, P6 or P8 shown in Fig. 3), compensation electricity
Road 130 can compensate current pixel data and obtain compensated pixel data.For convenience of explanation, white with normality herein
Illustrative example of the LCoS display panel of (Normally white) as display panel 10, but the embodiment of display panel 10
It is not limited to this.
Fig. 4 is the schematic diagram of the dipole inversion of the signal of display panel 10 shown in Fig. 1 according to one embodiment of the invention.
Horizontal axis shown in Fig. 4 indicates the time, and the longitudinal axis indicates voltage.In embodiment illustrated in fig. 4, the common voltage VCOM of display panel 10 can
To be alternating voltage.For example, common voltage VCOM is in previous frame FN-1In can be low-voltage (such as 0V), therefore previously
Frame FN-1It is positive polarity.Present frame F is arrivedNIn, common voltage VCOM can be changed into high voltage (such as 6V), therefore present frame FN
It is negative polarity.Remaining frame is referred to previous frame FN-1With present frame FNRelated description analogize, so it will not be repeated.
In embodiment illustrated in fig. 4, it is 8 bit Datas that pixel data, which is assumed, therefore the grey-scale range of pixel data is 0
~255.If the grayscale of pixel data is 0, corresponding gray scale voltage is VGMA (0).If the grayscale of pixel data is 128,
Then corresponding gray scale voltage is VGMA (128).If the grayscale of pixel data is 255, corresponding gray scale voltage is VGMA
(255).Voltage difference (that is, pixel voltage maximum magnitude) between gray scale voltage VGMA (0) and gray scale voltage VGMA (255) is
VGR, as shown in Figure 4.
Referring to figure 3. with Fig. 4.Assuming that the grayscale of current pixel P5 is M, then current pixel P5 is from frame FN-1To frame FNElectricity
Buckling is dynamic about VGR* (M-128)/128, and from frame FNTo frame FN+1Variation in voltage be about VGR* (128-M)/128.Assuming that adjacent
The grayscale for meeting pixel P2 is the pixel of Q, then adjacent pixels P2 is from frame FN-1To frame FNVariation in voltage be about VGR* (Q-128)/
128, and from frame FNTo frame FN+1Variation in voltage be about VGR* (128-Q)/128.Other adjacent pixels P4, P6 and P8 can join
Analogize according to the related description of adjacent pixels P2, so it will not be repeated.
Explanation is directed to the application examples of tableaux herein.Please refer to Fig. 1, Fig. 3 and Fig. 4.Compensation circuit 130 can calculate down
Equation 1 is stated, to obtain offset ERRP5.By using offset ERRP5, compensation circuit 130 can compensate current pixel P5
Current pixel data MP5And obtain compensated pixel data COMPP5, as shown in equation 2.In equation 1, PAR2It indicates
Coupled capacitor information between current pixel P5 and the first adjacent pixels P2, PAR4Indicate current pixel P5 and the second adjacent pixels
Coupled capacitor information between P4, PAR6Indicate the coupled capacitor information between current pixel P5 and third adjacent pixels P6, PAR8
Indicate the coupled capacitor information between current pixel P5 and the 4th adjacent pixels P8, QP2Indicate the pixel number of the first adjacent pixels P2
According to QP4Indicate a pixel data of the second adjacent pixels P4, QP6Indicate the pixel data of third adjacent pixels P6, QP8Indicate the
The pixel data of four adjacent pixels P8, and PAR52、PAR54、PAR56、PAR58With PAR5For real number.PAR52、PAR54、PAR56、
PAR58With PAR5Value can be determined according to design requirement.
ERRP5=PAR2*(MP5–QP2)+PAR52+
PAR4*(MP5–QP4)+PAR54+
PAR6*(MP5–QP6)+PAR56+
PAR8*(MP5–QP8)+PAR58+
PAR5Equation 1
COMPP5=MP5+ERRP5Equation 2
In equation 1, coupled capacitor information PAR2、PAR4、PAR6With PAR8It can come according to the characteristic of display panel 10
It determines, and/or is determined according to pixel voltage maximum magnitude VGR.For example, in some embodiments, in equation 1
Coupled capacitor information PAR2For (CP2P5*VGR*P)/(RG*CP5), coupled capacitor information PAR4For (CP4P5*VGR*P)/(RG*
CP5), coupled capacitor information PAR6For (CP6P5*VGR*P)/(RG*CP5), coupled capacitor information PAR8For (CP8P5*VGR*P)/(RG*
CP5), wherein CP5Indicate the storage capacitors value of current pixel P5, CP2P5It indicates between current pixel P5 and the first adjacent pixels P2
Coupling capacitance, CP4P5Indicate the coupling capacitance between current pixel P5 and the second adjacent pixels P4, CP6P5Indicate current pixel
Coupling capacitance between P5 and third adjacent pixels P6, CP8P5Indicate the coupling between current pixel P5 and the 4th adjacent pixels P8
Capacitance is closed, P indicates that reversal coefficient, RG indicate to refer to grayscale value.Reversal FACTOR P is 1 or -1.It is drawn when by positive polarity
Face (frame FN-1) change to negative polarity picture (frame FN) when, reversal FACTOR P is 1.When drawing (frame F by negative polarityN) change to positive polarity picture
Face (frame FN+1) when, reversal FACTOR P is -1.If being 128 with reference to grayscale value RG for the application conditions shown in Fig. 4.
Assuming that the storage capacitors value C of current pixel P5P5=20fF, coupling capacitance CP2P5、CP4P5、CP6P5With CP8P5It is
0.5fF, and pixel voltage maximum magnitude VGR is 4V.Assuming that grayscale (the current pixel data M of current pixel P5P5) it is 128, and
The grayscale of adjacent pixels P2, P4, P6 and P8 are 0.When by positive polarity picture (frame FN-1) change to negative polarity picture (frame FN) when, it is adjacent
It is (VGR/128) (Q-M) * P=(VGR/128) (0-128) * 1=- that pixel P2, which is met, relative to the voltage variety of current pixel P5
VGR.The rest may be inferred, other adjacent pixels (P4, P6 or P8) are also-VGR relative to the voltage variety of current pixel P5.Assuming that
Pixel P1, pixel P3, pixel P7, pixel P9 are negligible relative to the coupled capacitor of pixel P5.It is calculated with capacitance equation,
CP5*ΔVP5=CP2P5*ΔVP2P5+CP4P5*ΔVP4P5+CP6P5*ΔVP6P5+CP8P5*ΔVP8P5, wherein Δ VP2P5It is opposite for pixel P2
In the variation in voltage amount of pixel P5, Δ VP4P5Variation in voltage amount for pixel P4 relative to pixel P5, Δ VP6P5It is opposite for pixel P6
In the variation in voltage amount of pixel P5, and Δ VP8P5Variation in voltage amount for pixel P8 relative to pixel P5.ΔVP2P5=Δ VP4P5=
ΔVP6P5=Δ VP8P5=(VGR/128) (Q-M) * P=(4/128) (0-128) * 1=-4.Therefore, because of picture caused by coupled capacitor
The variation in voltage Δ V of plain P5P5=(0.5/20) * (- 4)+(0.5/20) * (- 4)+(0.5/20) * (- 4)+(0.5/20) * (- 4)
=-0.4V.Unit gray scale voltage VGRAY is VGR/255=4/255=15.7mV.Voltage error caused by coupling effect
(ERRP5) it is Δ VP5/ VGRAY=-0.4V/15.7mV ≈ -25.Also that is, adjacent pixels P2, P4, P6 and P8 are to current pixel P5
The coupled capacitor voltage error that current pixel P5 will be caused to have -25 grayscale.Therefore, compensated pixel data COMPP5For MP5+
25=128+25, to compensate error caused by coupling effect.
In another embodiment, compensation circuit 130 can calculate current pixel P5 in present frame FNWith previous frame FN-1Between
Current pixel variation.Compensation circuit 130 also calculates adjacent pixels (such as pixel P2, P4, P6 and P8 shown in Fig. 3) in present frame
FNWith previous frame FN-1Between adjacent pixels variation.By using the coupled capacitor information, and by using described current
Pixel variation changes with the adjacent pixels, and compensation circuit 130 can compensate the current pixel data M of current pixel P5P5And it obtains
Obtain compensated pixel data COMPP5。
Explanation is directed to the application examples of dynamic menu herein.Please refer to Fig. 1, Fig. 3 and Fig. 4.Compensation circuit 130 can calculate down
Equation 3 is stated, to obtain offset ERRP5.By using offset ERRP5, compensation circuit 130 can compensate current pixel P5
Current pixel data MP5And obtain compensated pixel data COMPP5, as shown in Equation 2.In equation 3, C2Indicate mesh
Coupled capacitor information between preceding pixel P5 and the first adjacent pixels P2, C4Indicate current pixel P5 and the second adjacent pixels P4 it
Between coupled capacitor information, C6Indicate the coupled capacitor information between current pixel P5 and third adjacent pixels P6, C8Indicate current
Coupled capacitor information between pixel P5 and the 4th adjacent pixels P8, PV5Indicate current pixel P5 in present frame FNWith previous frame
FN-1Between current pixel variation, PV2Indicate the first adjacent pixels P2 in present frame FNWith previous frame FN-1Between adjacent pixels
Variation, PV4Indicate the second adjacent pixels P4 in present frame FNWith previous frame FN-1Between adjacent pixels variation, PV6Indicate third
Adjacent pixels P6 is in present frame FNWith previous frame FN-1Between adjacent pixels variation, PV8Indicate the 4th adjacent pixels P8 in current
Frame FNWith previous frame FN-1Between adjacent pixels variation, and PAR5For real number.PAR5Value can be determined according to design requirement.
ERRP5=C2*(PV2–PV5)+
C4*(PV4–PV5)+
C6*(PV6–PV5)+
C8*(PV8–PV5)+
PAR5Equation 3
In equation 3, coupled capacitor information C2、C4、C6With C8It can be determined according to the characteristic of display panel 10, with
It and/or is determined according to pixel voltage maximum magnitude VGR.For example, in some embodiments, the coupling in equation 3
Capacitance information C2For (GT/VGR) * (CP2P5/CP5), coupled capacitor information C4For (GT/VGR) * (CP4P5/CP5), coupled capacitor information
C6For (GT/VGR) * (CP6P5/CP5), coupled capacitor information C8For (GT/VGR) * (CP8P5/CP5).Wherein, GT indicates maximum gray
It is worth range, VGR indicates pixel voltage maximum magnitude, CP5Indicate the storage capacitors value of current pixel P5.If with application bar shown in Fig. 4
For part, then maximum gray value range GT is 256, and pixel voltage maximum magnitude VGR is 4V.
In positive polarity picture (such as frame F shown in Fig. 4N-1) in, the voltage of current pixel P5 is VGMA (128)+(VGR/2) *
[(GT/2-MP5(N-1))/(GT/2)] * P, wherein reversal FACTOR P is 1.MP5(N-1)Indicate current pixel P5 in frame FN-1Mesh
Preceding pixel data.In frame with negative polarity (such as frame F shown in Fig. 4N) in, the voltage of current pixel P5 is VGMA (128)+(VGR/
2)*[(GT/2-MP5(N))/(GT/2)] * P, wherein reversal FACTOR P is -1.MP5(N)Indicate current pixel P5 in frame FNMesh
Preceding pixel data.Therefore, the current pixel of current pixel P5 changes PV5={ VGMA (128)+(VGR/2) * [(GT/2-MP5(N))/
(GT/2)]*(-1)}–{VGMA(128)+(VGR/2)*[(GT/2-MP5(N-1))/(GT/2)] }=(VGR/GT) * (MP5(N)+
MP5(N-1))–VGR。
In positive polarity picture (such as frame F shown in Fig. 4N-1) in, the voltage of the first adjacent pixels P2 be VGMA (128)+
(VGR/2)*[(GT/2-QP2(N-1))/(GT/2)] * P, wherein reversal FACTOR P is 1.QP2(N-1)Indicate the first adjacent pixels P2
In frame FN-1Pixel data.In frame with negative polarity (such as frame F shown in Fig. 4N) in, the voltage of current pixel P5 is VGMA (128)
+(VGR/2)*[(GT/2-QP2(N))/(GT/2)] * P, wherein reversal FACTOR P is -1.QP2(N)Indicate the first adjacent pixels P2
In frame FNPixel data.Therefore, the adjacent pixels of the first adjacent pixels P2 change PV2={ VGMA (128)+(VGR/2) *
[(GT/2-QP2(N))/(GT/2)]*(-1)}–{VGMA(128)+(VGR/2)*[(GT/2-QP2(N-1))/(GT/2)] }=(VGR/
GT)*(QP2(N)+QP2(N-1))–VGR.Remaining adjacent pixels can be with the rest may be inferred.The adjacent pixels of second adjacent pixels P4 change
PV4For (VGR/GT) * (QP4(N)+QP4(N-1))-VGR, the adjacent pixels variation PV of third adjacent pixels P66For (VGR/GT) *
(QP6(N)+QP6(N-1))-VGR, the adjacent pixels variation PV of the 4th adjacent pixels P88For (VGR/GT) * (QP8(N)+QP8(N-1))–
VGR.Wherein, QP4(N)Indicate the second adjacent pixels P4 in frame FNPixel data, QP4(N-1)Indicate the second adjacent pixels P4 in frame
FN-1Pixel data, QP6(N)Indicate third adjacent pixels P6 in frame FNPixel data, QP6(N-1)Indicate third adjacent pixels P6
In frame FN-1Pixel data, QP8(N)Indicate the 4th adjacent pixels P8 in frame FNPixel data, QP8(N-1)Indicate the 4th adjacent picture
Plain P8 is in frame FN-1Pixel data.
Fig. 5 is according to the step S230 for obtaining the compensated pixel data shown in one embodiment of the invention explanatory diagram 2
Flow diagram.In embodiment illustrated in fig. 5, step S230 includes step S510, step S520 and step S530.In step
In S510, the current pixel data of current pixel P5 can be converted to corresponding gray scale voltage value by compensation circuit 130.According to some
Look-up table (lookup table), transfer equation sequence or algorithm can be used in design requirement, compensation circuit 130, so as to by mesh
Preceding pixel data are converted to corresponding gray scale voltage value.In step S520, compensation circuit 130 can be by using the coupling electricity
Hold information to compensate corresponding gray scale voltage value, and then obtains compensated gray scale voltage value.The compensation way that step S520 is carried out,
The related description of Fig. 3, Fig. 4, equation 1, equation 2 and/or equation 3 is referred to analogize, so it will not be repeated.In step
In S530, compensated gray scale voltage value can be converted into compensation pixel data com P by compensation circuit 130P5, so as to will be through mending
Repay pixel data COMPP5It is supplied to data drive circuit 140.According to some design requirements, lookup is can be used in compensation circuit 130
Table, transfer equation sequence or algorithm, so that compensated gray scale voltage value is converted into compensation pixel data com PP5。
It is worth noting that, in some embodiments, compensation circuit 130 can be an independent integrated circuit, and deposit
Reservoir 120 can be an additional integrated circuit.In further embodiments, memory 120 can be embedded in compensation electricity
In road 130.According to design requirement, sequential control circuit 110 and data drive circuit 140 can be two independent integrated electricity
Road, and compensation circuit 130 can be embedded in sequential control circuit 110 or compensation circuit 130 can be embedded in data
In driving circuit 140.In other embodiments, sequential control circuit 110, compensation circuit 130 and data drive circuit 140 can
To be implemented as the same integrated circuit.
In different application situations, sequential control circuit 110, memory 120, compensation circuit 130 and/or data-driven
The correlation function of circuit 140 can use general programming language (programming languages, such as C or C++), hard
Part description language (hardware description languages, such as Verilog HDL or VHDL) or other are suitable
Programming language is embodied as software, firmware or hardware.Can be performed the correlation function programming language can be arranged to it is any
Known computer can access media (computer-accessible medias), such as tape (magnetic tapes),
Semiconductor (semiconductors) memory, disk (magnetic disks) or CD (compact disks, such as CD-
ROM or DVD-ROM), or internet (Internet), wire communication (wired communication), channel radio can be passed through
Believe that (wireless communication) or other communication medias transmit the programming language.The programming language can be deposited
It is placed on accessing in media for computer, in order to which the software (or firmware) is accessed/executed by the processor of computer
It programs code (programming codes).It is one or more controllers, microcontroller, microprocessor, special for hardware realization
Application integrated circuit (Application-specific integrated circuit, ASIC), digital signal processor
(digital signal processor, DSP), field can programmed logic lock array (Field Programmable Gate
Array, FPGA) and/or other processing units in various logic region, module and circuit can be used to realize or execute sheet
Function described in literary embodiment.In addition, apparatus and method of the present invention can be realized by the combination of hardware and software.
In conclusion display panel drive device 100 and driving method described in all embodiments of the present invention, it can be by storing
Device 120 provides the coupled capacitor between the current pixel P5 in display panel 10 and adjacent pixels (P2, P4, P6 and/or P8)
Information.By using the coupled capacitor information, compensation circuit 130 can compensate the current pixel data of current pixel P5, and
Obtain the compensated pixel data of current pixel P5.Therefore, display panel drive device 100 can compensate current pixel P5 because of neighbour
Connect variation caused by the coupled voltages of pixel.
Although the present invention is disclosed as above with embodiment, however, it is not to limit the invention, any technical field
Middle technical staff, without departing from the spirit and scope of the invention, when can make a little variation and retouching, therefore protection of the invention
Range is subject to view appended claims institute defender.
Claims (16)
1. a kind of display panel drive device, comprising:
One sequential control circuit, to provide a current pixel data of the current pixel in a display panel；
One memory, to provide at least coupling between the current pixel in the display panel and at least an adjacent pixels
Close capacitance information；
One compensation circuit is coupled to the sequential control circuit to receive the current pixel data, is coupled to the memory to receive
The coupled capacitor information, to obtain one by using an at least coupled capacitor information to compensate the current pixel data
Compensated pixel data, to compensate the current pixel because the voltage caused by at least coupled voltages of an adjacent pixels is inclined
It moves；And
One data drive circuit is coupled to the current pixel of the display panel, is coupled to the compensation circuit to receive this through mending
Pixel data is repaid, to go to drive the current pixel according to the compensated pixel data.
2. display panel drive device as described in claim 1, wherein the compensation circuit is by using at least one coupling
Capacitance information and this is compensated by using at least one grey scale between an at least adjacent pixels and the current pixel
Current pixel data and obtain the compensated pixel data.
3. display panel drive device as described in claim 1, wherein an at least adjacent pixels include one first adjacent
Pixel, one second adjacent pixels, a third adjacent pixels and one the 4th adjacent pixels, compensation circuit calculation equation ERRP5
=PAR2*(MP5–QP2)+PAR52+PAR4*(MP5–QP4)+PAR54+PAR6*(MP5–QP6)+PAR56+PAR8*(MP5–QP8)+PAR58+
PAR5To obtain an offset ERRP5, and use offset ERRP5To compensate current pixel data MP5And obtain the warp
Compensation pixel data, wherein PAR2Indicate the coupled capacitor information between the current pixel and first adjacent pixels, PAR4Table
Show the coupled capacitor information between the current pixel and second adjacent pixels, PAR6Indicate that the current pixel and the third are adjacent
Meet the coupled capacitor information between pixel, PAR8Indicate the coupled capacitor between the current pixel and the 4th adjacent pixels
Information, QP2Indicate a pixel data of first adjacent pixels, QP4Indicate a pixel data of second adjacent pixels, QP6Table
Show a pixel data of the third adjacent pixels, QP8Indicate a pixel data of the 4th adjacent pixels, and PAR52、PAR54、
PAR56、PAR58With PAR5For real number.
4. display panel drive device as claimed in claim 3, wherein
PAR2=(CP2P5*VGR*P)/(RG*CP5)；
PAR4=(CP4P5*VGR*P)/(RG*CP5)；
PAR6=(CP6P5*VGR*P)/(RG*CP5)；
PAR8=(CP8P5*VGR*P)/(RG*CP5)；
Wherein CP5Indicate a storage capacitors value of the current pixel, CP2P5It indicates between the current pixel and first adjacent pixels
A coupling capacitance, CP4P5Indicate the coupling capacitance between the current pixel and second adjacent pixels, CP6P5Indicating should
A coupling capacitance between current pixel and the third adjacent pixels, CP8P5Indicate the current pixel and the 4th adjacent pixels
Between a coupling capacitance, VGR indicate a pixel voltage maximum magnitude, P indicate a reversal coefficient, RG indicate one reference
Grayscale value.
5. display panel drive device as described in claim 1, wherein it is current in one to calculate the current pixel for the compensation circuit
Current pixel variation between frame and a previous frame, the compensation circuit calculate an at least adjacent pixels in the present frame with
The variation of an at least adjacent pixels and the compensation circuit between the previous frame is by using an at least coupled capacitor information
And the current pixel data are compensated at least adjacent pixels variation by using current pixel variation and are obtained
The compensated pixel data.
6. display panel drive device as described in claim 1, wherein an at least adjacent pixels include one first adjacent
Pixel, one second adjacent pixels, a third adjacent pixels and one the 4th adjacent pixels, compensation circuit calculation equation ERRP5
=C2*(PV2–PV5)+C4*(PV4–PV5)+C6*(PV6–PV5)+C8*(PV8–PV5)+PAR5To obtain an offset ERRP5, and
Use offset ERRP5To compensate the current pixel in the current pixel data M of a present frameP5(N)And it is compensated to obtain this
Pixel data, wherein C2Indicate the coupled capacitor information between the current pixel and first adjacent pixels, C4Indicate this at present
The coupled capacitor information between pixel and second adjacent pixels, C6It indicates between the current pixel and the third adjacent pixels
The coupled capacitor information, C8Indicate the coupled capacitor information between the current pixel and the 4th adjacent pixels, PV5It indicates
Current pixel variation of the current pixel between the present frame and a previous frame, PV2Indicate first adjacent pixels in this
Adjacent pixels variation between present frame and the previous frame, PV4Indicate that second adjacent pixels are previous with this in the present frame
Adjacent pixels variation between frame, PV6Indicate an adjoining of the third adjacent pixels between the present frame and the previous frame
Pixel variation, PV8Indicate that an adjacent pixels of the 4th adjacent pixels between the present frame and the previous frame change, and PAR5
For real number.
7. display panel drive device as claimed in claim 6, wherein
C2=(GT/VGR) * (CP2P5/CP5), C4=(GT/VGR) * (CP4P5/CP5)；
C6=(GT/VGR) * (CP6P5/CP5), C8=(GT/VGR) * (CP8P5/CP5)；
PV5=(VGR/GT) * (MP5(N)+MP5(N-1))-VGR；
PV2=(VGR/GT) * (QP2(N)+QP2(N-1))-VGR；
PV4=(VGR/GT) * (QP4(N)+QP4(N-1))-VGR；
PV6=(VGR/GT) * (QP6(N)+QP6(N-1))-VGR；
PV8=(VGR/GT) * (QP8(N)+QP8(N-1))-VGR；
Wherein GT indicates a maximum gray value range, and VGR indicates a pixel voltage maximum magnitude, CP5Indicate the one of the current pixel
Storage capacitors value, CP2P5Indicate the coupling capacitance between the current pixel and first adjacent pixels, CP4P5Indicate this at present
A coupling capacitance between pixel and second adjacent pixels, CP6P5It indicates between the current pixel and the third adjacent pixels
A coupling capacitance, CP8P5Indicate the coupling capacitance between the current pixel and the 4th adjacent pixels, MP5(N-1)It indicates
The current pixel is in the current pixel data of a previous frame, QP2(N)Indicate first adjacent pixels in a pixel of the present frame
Data, QP2(N-1)Indicate first adjacent pixels in a pixel data of the previous frame, QP4(N)Indicate second adjacent pixels in
One pixel data of the present frame, QP4(N-1)Indicate second adjacent pixels in a pixel data of the previous frame, QP6(N)It indicates
The third adjacent pixels are in a pixel data of the present frame, QP6(N-1)Indicate the third adjacent pixels in a picture of the previous frame
Prime number evidence, QP8(N)Indicate the 4th adjacent pixels in a pixel data of the present frame, QP8(N-1)Indicate the 4th adjacent pixels
In a pixel data of the previous frame.
8. display panel drive device as described in claim 1, wherein the compensation circuit is converted to the current pixel data
One corresponding gray scale voltage value, the compensation circuit compensate the correspondence gray scale voltage by using an at least coupled capacitor information
It is worth and obtains a compensated gray scale voltage value and the compensation circuit and the compensated gray scale voltage value is converted into the compensated picture
Prime number evidence.
9. a kind of displaying panel driving method, comprising:
A current pixel data of the current pixel in a display panel are provided by a sequential control circuit；
It is provided by a memory and is coupled in the current pixel in the display panel at least one between an at least adjacent pixels
Capacitance information；
By using an at least coupled capacitor information, the current pixel data are compensated by a compensation circuit and are obtained once benefit
Pixel data is repaid, to compensate the current pixel because of the variation caused by at least coupled voltages of an adjacent pixels；
And
It goes to drive the current pixel according to the compensated pixel data by a data drive circuit.
10. displaying panel driving method as claimed in claim 9, wherein the step of described compensation current pixel data are wrapped
It includes:
By using an at least coupled capacitor information, and by using an at least adjacent pixels and the current pixel
Between at least one grey scale, which is compensated by the compensation circuit and obtains the compensated pixel data.
11. displaying panel driving method as claimed in claim 9, wherein an at least adjacent pixels include one first adjacent
Pixel, one second adjacent pixels, a third adjacent pixels and one the 4th adjacent pixels and described compensation current pixel number
According to step include:
By compensation circuit calculation equation ERRP5=PAR2*(MP5–QP2)+PAR52+PAR4*(MP5–QP4)+PAR54+PAR6*
(MP5–QP6)+PAR56+PAR8*(MP5–QP8)+PAR58+PAR5To obtain an offset ERRP5, wherein PAR2Indicate the current pixel
The coupled capacitor information between first adjacent pixels, PAR4It indicates between the current pixel and second adjacent pixels
The coupled capacitor information, PAR6Indicate the coupled capacitor information between the current pixel and the third adjacent pixels, PAR8It indicates
The coupled capacitor information between the current pixel and the 4th adjacent pixels, MP5Indicate the current pixel data, QP2Indicating should
One pixel data of the first adjacent pixels, QP4Indicate a pixel data of second adjacent pixels, QP6Indicate the adjacent picture of the third
One pixel data of element, QP8Indicate a pixel data of the 4th adjacent pixels, and PAR52、PAR54、PAR56、PAR58With PAR5
For real number；And
Use offset ERRP5To compensate current pixel data MP5And obtain the compensated pixel data.
12. displaying panel driving method as claimed in claim 11, wherein
PAR2=(CP2P5*VGR*P)/(RG*CP5), PAR4=(CP4P5*VGR*P)/(RG*CP5)；
PAR6=(CP6P5*VGR*P)/(RG*CP5), PAR8=(CP8P5*VGR*P)/(RG*CP5)；
Wherein CP5Indicate a storage capacitors value of the current pixel, CP2P5It indicates between the current pixel and first adjacent pixels
A coupling capacitance, CP4P5Indicate the coupling capacitance between the current pixel and second adjacent pixels, CP6P5Indicating should
A coupling capacitance between current pixel and the third adjacent pixels, CP8P5Indicate the current pixel and the 4th adjacent pixels
Between a coupling capacitance, VGR indicate a pixel voltage maximum magnitude, P indicate a reversal coefficient, RG indicate one reference
Grayscale value.
13. displaying panel driving method as claimed in claim 9, wherein the step of described compensation current pixel data are wrapped
It includes:
Current pixel variation of the current pixel between a present frame and a previous frame is calculated by the compensation circuit；
At least one adjacent picture of at least adjacent pixels between the present frame and the previous frame is calculated by the compensation circuit
Element variation；And
It is adjacent by using an at least coupled capacitor information, and by using current pixel variation and described at least one
Pixel variation, compensates the current pixel data by the compensation circuit and obtains the compensated pixel data.
14. displaying panel driving method as claimed in claim 9, wherein an at least adjacent pixels include one first adjacent
Pixel, one second adjacent pixels, a third adjacent pixels and one the 4th adjacent pixels and described compensation current pixel number
According to the step of include:
By compensation circuit calculation equation ERRP5=C2*(PV2–PV5)+C4*(PV4–PV5)+C6*(PV6–PV5)+C8*(PV8–
PV5)+PAR5To obtain an offset ERRP5, wherein C2This for indicating between the current pixel and first adjacent pixels couples electricity
Hold information, C4Indicate the coupled capacitor information between the current pixel and second adjacent pixels, C6Indicate the current pixel with
The coupled capacitor information between the third adjacent pixels, C8Indicate the coupling between the current pixel and the 4th adjacent pixels
Close capacitance information, PV5Indicate current pixel variation of the current pixel between a present frame and a previous frame, PV2Indicating should
Adjacent pixels variation of first adjacent pixels between the present frame and the previous frame, PV4Indicate second adjacent pixels in
Adjacent pixels variation between the present frame and the previous frame, PV6Indicate the third adjacent pixels in the present frame and the elder generation
Adjacent pixels variation between previous frame, PV8Indicate a neighbour of the 4th adjacent pixels between the present frame and the previous frame
Pixel is connect to change, and PAR5For real number；And
Offset ERR is used by the compensation circuitP5To compensate the current pixel in the current pixel data of the present frame
MP5(N)And obtain the compensated pixel data.
15. displaying panel driving method as claimed in claim 14, wherein
C2=(GT/VGR) * (CP2P5/CP5), C4=(GT/VGR) * (CP4P5/CP5)；
C6=(GT/VGR) * (CP6P5/CP5), C8=(GT/VGR) * (CP8P5/CP5)；
PV5=(VGR/GT) * (MP5(N)+MP5(N-1))-VGR, PV2=(VGR/GT) * (QP2(N)+QP2(N-1))-VGR, PV4=(VGR/
GT)*(QP4(N)+QP4(N-1))-VGR；
PV6=(VGR/GT) * (QP6(N)+QP6(N-1))-VGR, PV8=(VGR/GT) * (QP8(N)+QP8(N-1))-VGR；
Wherein GT indicates a maximum gray value range, and VGR indicates a pixel voltage maximum magnitude, CP5Indicate the one of the current pixel
Storage capacitors value, CP2P5Indicate the coupling capacitance between the current pixel and first adjacent pixels, CP4P5Indicate this at present
A coupling capacitance between pixel and second adjacent pixels, CP6P5It indicates between the current pixel and the third adjacent pixels
A coupling capacitance, CP8P5Indicate the coupling capacitance between the current pixel and the 4th adjacent pixels, MP5(N-1)It indicates
The current pixel is in the current pixel data of a previous frame, QP2(N)Indicate first adjacent pixels in a pixel of the present frame
Data, QP2(N-1)Indicate first adjacent pixels in a pixel data of the previous frame, QP4(N)Indicate second adjacent pixels in
One pixel data of the present frame, QP4(N-1)Indicate second adjacent pixels in a pixel data of the previous frame, QP6(N)It indicates
The third adjacent pixels are in a pixel data of the present frame, QP6(N-1)Indicate the third adjacent pixels in a picture of the previous frame
Prime number evidence, QP8(N)Indicate the 4th adjacent pixels in a pixel data of the present frame, QP8(N-1)Indicate the 4th adjacent pixels
In a pixel data of the previous frame.
16. displaying panel driving method as claimed in claim 9, wherein the step of described acquisition compensated pixel data wraps
It includes:
The current pixel data are converted into a corresponding gray scale voltage value by the compensation circuit；
One is obtained to compensate the correspondence gray scale voltage value by using an at least coupled capacitor information by the compensation circuit
Compensated gray scale voltage value；And
The compensated gray scale voltage value is converted into the compensated pixel data by the compensation circuit.
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