CN109412563A - Two-way taking turn pulse duration frequency can be changed trigger signal generator controller - Google Patents
Two-way taking turn pulse duration frequency can be changed trigger signal generator controller Download PDFInfo
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- CN109412563A CN109412563A CN201811472634.1A CN201811472634A CN109412563A CN 109412563 A CN109412563 A CN 109412563A CN 201811472634 A CN201811472634 A CN 201811472634A CN 109412563 A CN109412563 A CN 109412563A
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The present invention provides a kind of variable trigger signal generator controller of two-way taking turn pulse duration frequency, comprising: circuit occurs for power circuit, clock generating circuit, adjustable pulse-width limiting circuit, adjustable pulse frequency limit circuit, trigger signal and enable signal, two-way drives output circuit；Adjustable pulse frequency limit circuit is according to the clock signal clk of input, and adjusts setting and the frequency limit signal TEN of adjusting can be set by generating a frequency；The input that circuit occurs for trigger signal and enable signal is that prime exports trigger signal, for generating an a start pulse signal TRP and taking turn enable signal FPW corresponding with prime output trigger signal；Adjustable pulse-width limiting circuit is according to the start pulse signal TRP of input, and adjusts setting, and trigger signal DRV enters after generating pulsewidth and can setting the pulsewidth limitation of adjusting；Two-way drives the subsequent equipment trigger signal of output circuit taking turn output two-way frequency and adjustable pulse width.The controller reliable operation.
Description
Technical field
The present invention relates to a kind of intelligent traffic signal controllers, are especially suitable for use in light compensating lamp control aspect, such as bayonet
Light compensating lamp, electronic police light compensating lamp etc., specifically a kind of two-way taking turn pulse duration frequency can be changed trigger signal generator controller.
Background technique
Country's development of the intelligent transportation through in a few years high speed at present, application range and using depth achieve it is considerable into
Step.It is steady for the orderly development and harmony of society in terms of from single commander's vehicle road approach mouth function development to public security control
Surely strong means are brought.For example just there are camera candid photograph and Important Sections bayonet also to have in the crossing management aspect that makes a dash across the red light
Camera is captured, and the picture of candid photograph is in order to the identification people of removing or license plate, it is desirable to have effective light compensating apparatus, generally
One camera will sometimes monitor more than two lanes, or capture multiple photographs, so needing to connect two light compensating apparatus；
And general camera only one delivery outlet can not correspond to more than two light compensating apparatus, there are also the light compensating apparatus pair of different manufacturers
The width of trigger signal requires, light compensating apparatus in trigger signal interference and lightning protection anti electrostatic require it is also relatively stringent,
So needing an effective controller between camera and light compensating apparatus to complete these demands, meet various different scenes
Demand.Connection type at the scene is that camera first connects controller, then connects one to two light compensating apparatus by controller.It is such
One controller substantially one is captured mutually confidential outfit one, domestic at present that the phase used is captured in electronic police and bayonet
Machine high number, so the market demand of this kind of product at home is also very big.
Summary of the invention
The purpose of the invention is to overcome the problems, such as that it is upper that existing camera and light compensating apparatus use at the scene, one kind two is provided
Taking turn pulse duration frequency in road can be changed trigger signal generator controller, and the controller is at low cost, easy to use, securely and reliably.The present invention
The technical solution adopted is that:
A kind of variable trigger signal generator controller of two-way taking turn pulse duration frequency, comprising:
Power circuit, clock generating circuit, adjustable pulse-width limiting circuit, adjustable pulse frequency limit circuit, triggering
Circuit occurs for signal and enable signal, two-way drives output circuit；
The power circuit be clock generating circuit, adjustable pulse-width limiting circuit, adjustable pulse frequency limit circuit,
Circuit occurs for trigger signal and enable signal, two-way driving output circuit provides respectively required DC voltage；
The clock generating circuit is used to generate a clock signal clk, and as adjustable pulse frequency limit circuit
Clock input；
The adjustable pulse frequency limit circuit is used for the clock signal clk according to input, and adjusts setting and generate one
Frequency can set the frequency limit signal TEN of adjusting, a letter of the frequency limit signal TEN as two-way driving output circuit
Number input；
The input that circuit occurs for the trigger signal and enable signal is that prime exports trigger signal, for generating one and prime
Export a corresponding start pulse signal TRP and taking turn enable signal FPW of trigger signal；The start pulse signal TRP
Signal as adjustable pulse-width limiting circuit inputs, and the taking turn enable signal FPW is as two-way driving output circuit
Taking turn control input；
The adjustable pulse-width limiting circuit is according to the start pulse signal TRP of input, and adjusts setting, and generating pulsewidth can
Trigger signal DRV after the pulsewidth limitation that setting is adjusted, trigger signal DRV is as two-way driving output circuit after pulsewidth limitation
The input of another signal；
The two-way drives output circuit, according to trigger signal DRV after the frequency limit signal TEN of input, pulsewidth limitation, and
Taking turn enable signal FPW, taking turn export the subsequent equipment trigger signal of two-way frequency and adjustable pulse width.
Further, power circuit include rectifier bridge, fuse F1, inductance L1, Transient Suppression Diode TV1, capacitor C1,
C2, C3, C4, DC/DC chip U1, Light-emitting diode LED 1 and resistance R1；Two input terminals of rectifier bridge distinguish joint chair J1 in succession
Two terminals, the positive output of rectifier bridge terminates the one end fuse F1, and another one end termination inductance L1 fuse F1 and transient state press down
Diode TV1 cathode processed, rectifier bridge negative output terminal and Transient Suppression Diode TV1 plus earth；Another termination electricity of inductance L1
Hold the input terminal of C1 anode, one end of capacitor C2 and DC/DC chip U1, capacitor C1 cathode, the capacitor C2 other end and DC/DC chip
The ground terminal of U1 is grounded；1 sun of output termination capacitor C3 anode, the one end capacitor C4 and Light-emitting diode LED of DC/DC chip U1
Pole, and output voltage VCC；Capacitor C3 cathode, capacitor C4 other end ground connection, the cathode of Light-emitting diode LED 1 are connect by resistance R1
Ground.
Further, clock generating circuit includes resistance R21, R22, R23, R24, timer chip U21 and door
U22, capacitor C21, C22, C23；Wherein timer chip U21 uses ICM7555；The 7th foot connecting resistance of timer chip U21
The one end R21 and the one end R22, the one end another terminating resistor R23 of resistance R22, another termination timer chip U21 second of resistance R23
Foot and the 6th foot, and be grounded by capacitor C22；The resistance R21 other end, the 4th foot of timer chip U21, octal, capacitor C21
Mono- termination voltage VCC of one end and resistance R24；Capacitor C21 other end ground connection；The first foot of timer chip U21 is grounded, the 5th foot
It is grounded by capacitor C23；The third foot connecting resistance R24 other end of timer chip U21, and two input terminals with door U22,
Clock signal clk is exported with the output end of door U22.
Further, adjustable pulse frequency limit circuit include tetrad counter U41, NAND gate U42, U43, with
Door U44, wire jumper JP5, JP6, JP7, JP8, capacitor C41；
The first foot of tetrad counter U41 connects the output end with door U44, resets letter with two inputs termination of door U44
Number CLR；The crus secunda of counter U41 connects clock signal clk, and third foot meets voltage VCC by resistance R42, and the 4th foot passes through electricity
Resistance R43 meets voltage VCC, and the 5th foot meets voltage VCC by resistance R44, and the 6th foot connects voltage VCC, counter by resistance R45
The 7th foot of U41 connects the output end of NAND gate U42 and two input terminals of NAND gate U43；The 9th foot of counter U41 and the tenth
Foot connects voltage VCC, the octal ground connection of counter U41 by resistance R41；The 11st foot of counter U41 meets wire jumper JP8 mono-
End, the 12nd foot connect the one end wire jumper JP7, and the 13rd foot connects the one end wire jumper JP6, and the 14th foot connects the one end wire jumper JP5；Wire jumper JP5
Another terminating resistor R47 one end and NAND gate U42 an input terminal, another terminating resistor of wire jumper JP6, JP7, JP8
One end of R46 and another input terminal of NAND gate U42；Another termination voltage VCC of resistance R46 and R47, the anode of capacitor C41
Connect voltage VCC, cathode ground connection；The output end of NAND gate U43, which generates frequency, can set the frequency limit signal TEN of adjusting.
Further, the frequency of frequency limit signal TEN is several hertz.
Further, it includes voltage comparator U51, the triggering of NAND gate U52, D that circuit, which occurs, for trigger signal and enable signal
Device U53, resistance R51, R52, R53, R54, R55, capacitor C51, C52, C53, Transient Suppression Diode TV51, magnetic bead FB1, FB2；
Prime output trigger signal TR+ and TR- connect the cathode and anode of Transient Suppression Diode TV51 respectively；The one end magnetic bead FB1
Transient Suppression Diode TV51 cathode is terminated with capacitor C51 mono-, the one end magnetic bead FB2 and another termination transient state of capacitor C8 inhibit two poles
Pipe TV51 anode；The same phase of one end of another terminating resistor R51 of magnetic bead FB1, one end of capacitor C52 and voltage comparator U51
Input terminal, the other end of magnetic bead FB2 and the other end ground connection of capacitor C52；Another termination voltage VCC and resistance of resistance R51
The reverse phase of one end of R52, one end of another terminating resistor R53 of resistance R52, one end of capacitor C53 and voltage comparator U51 is defeated
Enter end, the other end of resistance R53 and the other end ground connection of capacitor C53；The output termination NAND gate U52's of voltage comparator U51
The clock end of two input terminals and d type flip flop U53；The output end of NAND gate U52 exports start pulse signal TRP；D triggering
The non-output of the Q of device U53 terminates the end D, and the end R of d type flip flop U53 meets voltage VCC by resistance R55, and the end S of d type flip flop U53 passes through
Resistance R54 meets voltage VCC, and the Q output of d type flip flop U53 exports taking turn enable signal FPW.
Further, adjustable pulse-width limiting circuit includes voltage comparator U31, NAND gate U32 and door U33, resistance
R31, R32, R33, capacitor C31, C32, C33, C34, C35；
One end termination voltage VCC, another terminating resistor R32 of resistance R31, the one end capacitor C31 and voltage comparator U31 it is anti-
Phase input terminal；The other end of resistance R32 and the other end ground connection of capacitor C31；The end thereof contacts of resistance R33 send out pulse signal TRP,
And one end with door U33；One end of another termination capacitor C32, C33, C34, C35 of resistance R33 and voltage comparator U31's
Non-inverting input terminal；Another one end termination wire jumper JP4 of capacitor C32, wire jumper JP4 other end ground connection；Another termination of capacitor C33 is jumped
The one end line JP3, wire jumper JP3 other end ground connection；Another one end termination wire jumper JP2 of capacitor C34, wire jumper JP2 other end ground connection；Electricity
Hold another one end termination wire jumper JP1 of C35, the other end ground connection of wire jumper JP1；The output of voltage comparator U31 terminates NAND gate
The output end of two input terminals of U32, NAND gate U32 generates reset signal CLR；The output termination of NAND gate U32 is with door U33's
Another input terminal generates trigger signal DRV after pulsewidth limits with the output end of door U33.
Further, two-way driving output circuit includes and door U61 and two-way isolation drive output circuit；Taking turn makes
Energy signal FPW makes two-way isolation drive output circuit alternate conduction work；Frequency limit is connect respectively with two input terminals of door U61
Trigger signal DRV after signal TEN processed and pulsewidth limit, it is respective with the output termination two-way isolation drive output circuit of door U61
Input terminal.
Further, first via isolation drive output circuit includes resistance R61, R62, R63, R64, R65, R66, NPN
Triode Q61, Q62, optocoupler OP1, Light-emitting diode LED 61, capacitor C61, Transient Suppression Diode TV61, fuse F61；
One end cock wheel of resistance R63 and R64 patrol enable signal FPW, another termination voltage VCC's and triode Q61 of resistance R63
Collector, the base stage of another termination triode Q61 of resistance R64, the emitter of triode Q61 connect the input Dragon Boat Festival of optocoupler OP1
Pole；The anode of the input terminal cathode sending and receiving optical diode LED61 of optocoupler OP1, the cathode of Light-emitting diode LED 61 pass through resistance
R65 connects the collector of triode Q62, and the emitter of triode Q62 is grounded, one end of the base stage connecting resistance R62 of triode Q62,
Another termination of resistance R62 and the output end of door U61, and voltage VCC is connect by resistance R61；The output end collector of optocoupler OP1
One end of connecting resistance R66, the cathode of Transient Suppression Diode TV61 and fuse F61 one end, resistance R66 another termination electricity
The anode of appearance one end C61, the capacitor C61 other end and Transient Suppression Diode TV61 connect optocoupler OP1 output end emitter；Optocoupler
Two output ends of OP1 export first via subsequent equipment trigger signal；
Second tunnel isolation drive output circuit includes resistance R71, R72, R73, R74, R75, R76, PNP triode Q71, NPN tri-
Pole pipe Q72, optocoupler OP2, Light-emitting diode LED 71, capacitor C71, Transient Suppression Diode TV71, fuse F71；
One end cock wheel of resistance R73 and R74 patrol enable signal FPW, another termination voltage VCC's and triode Q71 of resistance R73
Emitter, the base stage of another termination triode Q71 of resistance R74, the collector of triode Q71 connect the input Dragon Boat Festival of optocoupler OP2
Pole；The anode of the input terminal cathode sending and receiving optical diode LED71 of optocoupler OP2, the cathode of Light-emitting diode LED 71 pass through resistance
R75 connects the collector of triode Q72, and the emitter of triode Q72 is grounded, one end of the base stage connecting resistance R72 of triode Q72,
Another termination of resistance R72 and the output end of door U61, and voltage VCC is connect by resistance R71；The output end collector of optocoupler OP2
One end of connecting resistance R76, the cathode of Transient Suppression Diode TV71 and fuse F71 one end, resistance R76 another termination electricity
The anode of appearance one end C71, the capacitor C71 other end and Transient Suppression Diode TV71 connect optocoupler OP2 output end emitter；Optocoupler
Two output ends of OP2 export the second tunnel subsequent equipment trigger signal.
The present invention has the advantages that a variety of flexible settings are able to satisfy the demand of a variety of Different fields, circuit devices at full hardware structure
The case where at being not in crash, stable and reliable operation, environment adaptation range are wide.Circuit devcie type selecting is general at low cost, is easy to
Maintenance.The multiple functions of product are able to satisfy the number of drawbacks that scene uses, and this product realization principle is skillfully constructed, and flexibly complete
Full up foot scene needs.Circuit has multiple filter circuit and protection circuit, is able to satisfy the electromagnetic environment of Various Complex.
Detailed description of the invention
Fig. 1 is the principle of the present invention block diagram.
Fig. 2 is power circuit principle figure of the invention.
Fig. 3 is clock generating circuit schematic diagram of the invention.
Fig. 4 is adjustable pulse-width limiting circuit schematic diagram of the invention.
Fig. 5 is adjustable pulse frequency limit circuit diagram of the invention.
Fig. 6 is that circuit diagram occurs for trigger signal of the invention and enable signal.
Fig. 7 is that two-way of the invention drives output circuit schematic diagram.
Specific embodiment
Below with reference to specific drawings and examples, the invention will be further described.
As shown in Figure 1, a kind of two-way taking turn pulse duration frequency proposed by the present invention can be changed trigger signal generator controller, packet
It includes: power circuit 10, clock generating circuit 20, adjustable pulse-width limiting circuit 30, adjustable pulse frequency limit circuit
40, circuit 50 occurs for trigger signal and enable signal, two-way drives output circuit 60；
The power circuit 10 is clock generating circuit 20, adjustable pulse-width limiting circuit 30, adjustable pulse frequency limit
Circuit 50 occurs for circuit 40, trigger signal and enable signal processed, two-way driving output circuit 60 provides respectively required direct current
Pressure；
As shown in Fig. 2, power circuit 10 includes rectifier bridge, fuse F1, the inductance L1, transient state inhibition that diode D1~D4 is constituted
Diode TV1, capacitor C1, C2, C3, C4, DC/DC chip U1, Light-emitting diode LED 1 and resistance R1；Two inputs of rectifier bridge
Two terminals of joint chair J1, the positive output of rectifier bridge terminate the one end fuse F1, another termination electricity of fuse F1 in succession respectively at end
Feel the one end L1 and Transient Suppression Diode TV1 cathode, rectifier bridge negative output terminal and Transient Suppression Diode TV1 plus earth；Electricity
Feel another termination capacitor C1 anode of L1, the input terminal of one end of capacitor C2 and DC/DC chip U1, capacitor C1 cathode, capacitor C2
The ground terminal of the other end and DC/DC chip U1 ground connection；The output termination capacitor C3 anode of DC/DC chip U1, the one end capacitor C4 with
And 1 anode of Light-emitting diode LED, and output voltage VCC；Capacitor C3 cathode, capacitor C4 other end ground connection, Light-emitting diode LED 1
Cathode be grounded by resistance R1；Wherein capacitor C1 and C3 uses electrolytic capacitor, and capacitor C2 and C4 are monolithic capacitor；In this example
VCC is+5v；
The clock generating circuit 20 is used to generate a clock signal clk, and as adjustable pulse frequency limit circuit
40 clock input；The frequency of the clock signal clk is 20Hz；
As shown in figure 3, clock generating circuit 20 includes resistance R21, R22, R23, R24, timer chip U21 and door
U22, capacitor C21, C22, C23；Wherein timer chip U21 uses ICM7555；The 7th foot connecting resistance of timer chip U21
The one end R21 and the one end R22, the one end another terminating resistor R23 of resistance R22, another termination timer chip U21 second of resistance R23
Foot and the 6th foot, and be grounded by capacitor C22；The resistance R21 other end, the 4th foot of timer chip U21, octal, capacitor C21
Mono- termination voltage VCC of one end and resistance R24；Capacitor C21 other end ground connection；The first foot of timer chip U21 is grounded, the 5th foot
It is grounded by capacitor C23；The third foot connecting resistance R24 other end of timer chip U21, and two input terminals with door U22,
Clock signal clk is exported with the output end of door U22；
The adjustable pulse frequency limit circuit 40 is used for the clock signal clk according to input, and adjusts setting and generate one
A frequency can set the frequency limit signal TEN of adjusting, which drives the one of output circuit 60 as two-way
A signal input；The frequency of frequency limit signal TEN is typically set at several hertz；
As shown in figure 5, adjustable pulse frequency limit circuit 40 include tetrad counter U41, NAND gate U42, U43, with
Door U44, wire jumper JP5, JP6, JP7, JP8, capacitor C41；It, can by wire jumper JP5, JP6, JP7, JP8 come the frequency of selectional restriction
To there is 15 kinds of selections；
The first foot of tetrad counter U41 connects the output end with door U44, resets letter with two inputs termination of door U44
Number CLR；The crus secunda of counter U41 connects clock signal clk, and third foot meets voltage VCC by resistance R42, and the 4th foot passes through electricity
Resistance R43 meets voltage VCC, and the 5th foot meets voltage VCC by resistance R44, and the 6th foot connects voltage VCC, counter by resistance R45
The 7th foot of U41 connects the output end of NAND gate U42 and two input terminals of NAND gate U43；The 9th foot of counter U41 and the tenth
Foot connects voltage VCC, the octal ground connection of counter U41 by resistance R41；The 11st foot of counter U41 meets wire jumper JP8 mono-
End, the 12nd foot connect the one end wire jumper JP7, and the 13rd foot connects the one end wire jumper JP6, and the 14th foot connects the one end wire jumper JP5；Wire jumper JP5
Another terminating resistor R47 one end and NAND gate U42 an input terminal, another terminating resistor of wire jumper JP6, JP7, JP8
One end of R46 and another input terminal of NAND gate U42；Another termination voltage VCC of resistance R46 and R47, the anode of capacitor C41
Connect voltage VCC, cathode ground connection；The output end of NAND gate U43, which generates frequency, can set the frequency limit signal TEN of adjusting；
The input that circuit 50 occurs for the trigger signal and enable signal is that prime exports trigger signal, for generating one with before
A grade output corresponding start pulse signal TRP and taking turn enable signal FPW of trigger signal；The start pulse signal
TRP is inputted as the signal of adjustable pulse-width limiting circuit 30, and the taking turn enable signal FPW drives output electricity as two-way
The taking turn on road 60 controls input；Prime exports trigger signal from the output trigger signal of camera；
As shown in fig. 6, it includes voltage comparator U51, NAND gate U52, d type flip flop that circuit 50, which occurs, for trigger signal and enable signal
U53, resistance R51, R52, R53, R54, R55, capacitor C51, C52, C53, Transient Suppression Diode TV51, magnetic bead FB1, FB2；
Prime output trigger signal TR+ and TR- connect the cathode and anode of Transient Suppression Diode TV51 respectively；The one end magnetic bead FB1
Transient Suppression Diode TV51 cathode is terminated with capacitor C51 mono-, the one end magnetic bead FB2 and another termination transient state of capacitor C8 inhibit two poles
Pipe TV51 anode；The same phase of one end of another terminating resistor R51 of magnetic bead FB1, one end of capacitor C52 and voltage comparator U51
Input terminal, the other end of magnetic bead FB2 and the other end ground connection of capacitor C52；Another termination voltage VCC and resistance of resistance R51
The reverse phase of one end of R52, one end of another terminating resistor R53 of resistance R52, one end of capacitor C53 and voltage comparator U51 is defeated
Enter end, the other end of resistance R53 and the other end ground connection of capacitor C53；The output termination NAND gate U52's of voltage comparator U51
The clock end of two input terminals and d type flip flop U53；The output end of NAND gate U52 exports start pulse signal TRP；D triggering
The non-output of the Q of device U53 terminates the end D, and the end R of d type flip flop U53 meets voltage VCC by resistance R55, and the end S of d type flip flop U53 passes through
Resistance R54 meets voltage VCC, and the Q output of d type flip flop U53 exports taking turn enable signal FPW；Taking turn enable signal FPW is one
A 1,0 alternate square-wave signal can control the alternate conduction work of two-way output circuit in two-way driving output circuit 60；
The adjustable pulse-width limiting circuit 30 is according to the start pulse signal TRP of input, and adjusts setting, generates pulsewidth
Can set adjusting pulsewidth limitation after trigger signal DRV, the pulsewidth limitation after trigger signal DRV as two-way driving output circuit
60 another signal input；
As shown in figure 4, adjustable pulse-width limiting circuit 30 includes voltage comparator U31, NAND gate U32 and door U33, resistance
R31, R32, R33, capacitor C31, C32, C33, C34, C35；
One end termination voltage VCC, another terminating resistor R32 of resistance R31, the one end capacitor C31 and voltage comparator U31 it is anti-
Phase input terminal；The other end of resistance R32 and the other end ground connection of capacitor C31；The end thereof contacts of resistance R33 send out pulse signal TRP,
And one end with door U33；One end of another termination capacitor C32, C33, C34, C35 of resistance R33 and voltage comparator U31's
Non-inverting input terminal；Another one end termination wire jumper JP4 of capacitor C32, wire jumper JP4 other end ground connection；Another termination of capacitor C33 is jumped
The one end line JP3, wire jumper JP3 other end ground connection；Another one end termination wire jumper JP2 of capacitor C34, wire jumper JP2 other end ground connection；Electricity
Hold another one end termination wire jumper JP1 of C35, the other end ground connection of wire jumper JP1；The output of voltage comparator U31 terminates NAND gate
Two input terminals of U32, another input terminal of the output termination and door U33 of NAND gate U32, the output end of NAND gate U32 generate
Reset signal CLR；Trigger signal DRV after pulsewidth limits is generated with the output end of door U33；Can by wire jumper JP1, JP2, JP3,
The DRV pulse width that JP4 selection needs to limit, has 15 kinds of pulsewidths may be selected；So that the subsequent equipment trigger signal finally exported
Pulse width be limited in light compensating apparatus need in the range of；
The two-way drives output circuit 60, trigger signal DRV after being limited according to the frequency limit signal TEN of input, pulsewidth, with
And taking turn enable signal FPW, taking turn export the subsequent equipment trigger signal of two-way frequency and adjustable pulse width；Two-way rear class in this example
Equipment trigger signal is exactly the trigger signal for triggering two light compensating apparatus；
As shown in fig. 7, two-way driving output circuit 60 includes and door U61 and two-way isolation drive output circuit；Taking turn is enabled
Signal FPW makes two-way isolation drive output circuit alternate conduction work；Frequency limit is connect respectively with two input terminals of door U61
Trigger signal DRV after signal TEN and pulsewidth limit, it is respective defeated with the output termination two-way isolation drive output circuit of door U61
Enter end；
First via isolation drive output circuit includes resistance R61, R62, R63, R64, R65, R66, NPN triode Q61, Q62, light
Coupling OP1, Light-emitting diode LED 61, capacitor C61, Transient Suppression Diode TV61, fuse F61；
One end cock wheel of resistance R63 and R64 patrol enable signal FPW, another termination voltage VCC's and triode Q61 of resistance R63
Collector, the base stage of another termination triode Q61 of resistance R64, the emitter of triode Q61 connect the input Dragon Boat Festival of optocoupler OP1
Pole；The anode of the input terminal cathode sending and receiving optical diode LED61 of optocoupler OP1, the cathode of Light-emitting diode LED 61 pass through resistance
R65 connects the collector of triode Q62, and the emitter of triode Q62 is grounded, one end of the base stage connecting resistance R62 of triode Q62,
Another termination of resistance R62 and the output end of door U61, and voltage VCC is connect by resistance R61；The output end collector of optocoupler OP1
One end of connecting resistance R66, the cathode of Transient Suppression Diode TV61 and fuse F61 one end, resistance R66 another termination electricity
The anode of appearance one end C61, the capacitor C61 other end and Transient Suppression Diode TV61 connect optocoupler OP1 output end emitter；Optocoupler
Two output ends of OP1 export first via subsequent equipment trigger signal；
Second tunnel isolation drive output circuit includes resistance R71, R72, R73, R74, R75, R76, PNP triode Q71, NPN tri-
Pole pipe Q72, optocoupler OP2, Light-emitting diode LED 71, capacitor C71, Transient Suppression Diode TV71, fuse F71；
One end cock wheel of resistance R73 and R74 patrol enable signal FPW, another termination voltage VCC's and triode Q71 of resistance R73
Emitter, the base stage of another termination triode Q71 of resistance R74, the collector of triode Q71 connect the input Dragon Boat Festival of optocoupler OP2
Pole；The anode of the input terminal cathode sending and receiving optical diode LED71 of optocoupler OP2, the cathode of Light-emitting diode LED 71 pass through resistance
R75 connects the collector of triode Q72, and the emitter of triode Q72 is grounded, one end of the base stage connecting resistance R72 of triode Q72,
Another termination of resistance R72 and the output end of door U61, and voltage VCC is connect by resistance R71；The output end collector of optocoupler OP2
One end of connecting resistance R76, the cathode of Transient Suppression Diode TV71 and fuse F71 one end, resistance R76 another termination electricity
The anode of appearance one end C71, the capacitor C71 other end and Transient Suppression Diode TV71 connect optocoupler OP2 output end emitter；Optocoupler
Two output ends of OP2 export the second tunnel subsequent equipment trigger signal.
It should be noted last that the above specific embodiment is only used to illustrate the technical scheme of the present invention and not to limit it,
Although being described the invention in detail referring to example, those skilled in the art should understand that, it can be to the present invention
Technical solution be modified or replaced equivalently, without departing from the spirit and scope of the technical solution of the present invention, should all cover
In the scope of the claims of the present invention.
Claims (9)
1. a kind of two-way taking turn pulse duration frequency can be changed trigger signal generator controller characterized by comprising
Power circuit (10), clock generating circuit (20), adjustable pulse-width limiting circuit (30), adjustable pulse frequency limit
Circuit (50), two-way driving output circuit (60) occur for circuit (40), trigger signal and enable signal processed；
The power circuit (10) is clock generating circuit (20), adjustable pulse-width limiting circuit (30), adjustable pulse
Circuit (50) occur for frequency limit circuit (40), trigger signal and enable signal, two-way driving output circuit (60) provides respectively
Required DC voltage；
The clock generating circuit (20) is used to generate a clock signal clk, and as adjustable pulse frequency limit electricity
The clock on road (40) inputs；
The adjustable pulse frequency limit circuit (40) is used for the clock signal clk according to input, and adjusts setting and generate
One frequency can set the frequency limit signal TEN of adjusting, which drives output circuit (60) as two-way
A signal input；
The input that circuit (50) occur for the trigger signal and enable signal is that prime exports trigger signal, for generate one with
Prime exports a corresponding start pulse signal TRP and taking turn enable signal FPW of trigger signal；The trigger pulse letter
Number TRP is inputted as the signal of adjustable pulse-width limiting circuit (30), and the taking turn enable signal FPW is defeated as two-way driving
The taking turn of circuit (60) controls input out；
The adjustable pulse-width limiting circuit (30) is according to the start pulse signal TRP of input, and adjusts setting, generates arteries and veins
Trigger signal DRV after the pulsewidth that width can set adjusting limits, trigger signal DRV drives output electricity as two-way after pulsewidth limitation
Another signal on road (60) inputs；
The two-way drives output circuit (60), trigger signal DRV after being limited according to the frequency limit signal TEN of input, pulsewidth,
And taking turn enable signal FPW, taking turn export the subsequent equipment trigger signal of two-way frequency and adjustable pulse width.
2. two-way taking turn pulse duration frequency as described in claim 1 can be changed trigger signal generator controller, which is characterized in that
Power circuit (10) include rectifier bridge, fuse F1, inductance L1, Transient Suppression Diode TV1, capacitor C1, C2, C3, C4,
DC/DC chip U1, Light-emitting diode LED 1 and resistance R1；Two of joint chair J1 hold two input terminals of rectifier bridge in succession respectively
The positive output of son, rectifier bridge terminates the one end fuse F1, another one end termination inductance L1 fuse F1 and Transient Suppression Diode
TV1 cathode, rectifier bridge negative output terminal and Transient Suppression Diode TV1 plus earth；Another termination capacitor C1 anode of inductance L1,
One end of capacitor C2 and the input terminal of DC/DC chip U1, the ground connection of capacitor C1 cathode, the capacitor C2 other end and DC/DC chip U1
End ground connection；Output termination capacitor C3 anode, 1 anode of the one end capacitor C4 and Light-emitting diode LED of DC/DC chip U1, and it is defeated
Voltage VCC out；Capacitor C3 cathode, capacitor C4 other end ground connection, the cathode of Light-emitting diode LED 1 are grounded by resistance R1.
3. two-way taking turn pulse duration frequency as described in claim 1 can be changed trigger signal generator controller, which is characterized in that
Clock generating circuit (20) includes resistance R21, R22, R23, R24, timer chip U21 and door U22, capacitor
C21,C22,C23；Wherein timer chip U21 uses ICM7555；The 7th foot one end connecting resistance R21 of timer chip U21 and
The one end R22, the one end another terminating resistor R23 of resistance R22, another termination timer chip U21 crus secunda of resistance R23 and the 6th
Foot, and be grounded by capacitor C22；The resistance R21 other end, the 4th foot of timer chip U21, octal, the one end capacitor C21 and electricity
Hinder mono- termination voltage VCC of R24；Capacitor C21 other end ground connection；The first foot of timer chip U21 is grounded, and the 5th foot passes through capacitor
C23 ground connection；The third foot connecting resistance R24 other end of timer chip U21, and two input terminals with door U22, with door U22
Output end export clock signal clk.
4. two-way taking turn pulse duration frequency as described in claim 1 can be changed trigger signal generator controller, which is characterized in that
Adjustable pulse frequency limit circuit (40) includes tetrad counter U41, NAND gate U42, U43 and door U44, jumps
Line JP5, JP6, JP7, JP8, capacitor C41；
The first foot of tetrad counter U41 connects the output end with door U44, resets letter with two inputs termination of door U44
Number CLR；The crus secunda of counter U41 connects clock signal clk, and third foot meets voltage VCC by resistance R42, and the 4th foot passes through electricity
Resistance R43 meets voltage VCC, and the 5th foot meets voltage VCC by resistance R44, and the 6th foot connects voltage VCC, counter by resistance R45
The 7th foot of U41 connects the output end of NAND gate U42 and two input terminals of NAND gate U43；The 9th foot of counter U41 and the tenth
Foot connects voltage VCC, the octal ground connection of counter U41 by resistance R41；The 11st foot of counter U41 meets wire jumper JP8 mono-
End, the 12nd foot connect the one end wire jumper JP7, and the 13rd foot connects the one end wire jumper JP6, and the 14th foot connects the one end wire jumper JP5；Wire jumper JP5
Another terminating resistor R47 one end and NAND gate U42 an input terminal, another terminating resistor of wire jumper JP6, JP7, JP8
One end of R46 and another input terminal of NAND gate U42；Another termination voltage VCC of resistance R46 and R47, the anode of capacitor C41
Connect voltage VCC, cathode ground connection；The output end of NAND gate U43, which generates frequency, can set the frequency limit signal TEN of adjusting.
5. two-way taking turn pulse duration frequency as described in claim 1 can be changed trigger signal generator controller, which is characterized in that
The frequency of frequency limit signal TEN is several hertz.
6. two-way taking turn pulse duration frequency as described in claim 1 can be changed trigger signal generator controller, which is characterized in that
It includes voltage comparator U51, NAND gate U52, d type flip flop U53, resistance that circuit (50), which occur, for trigger signal and enable signal
R51, R52, R53, R54, R55, capacitor C51, C52, C53, Transient Suppression Diode TV51, magnetic bead FB1, FB2；
Prime output trigger signal TR+ and TR- connect the cathode and anode of Transient Suppression Diode TV51 respectively；The one end magnetic bead FB1
Transient Suppression Diode TV51 cathode is terminated with capacitor C51 mono-, the one end magnetic bead FB2 and another termination transient state of capacitor C8 inhibit two poles
Pipe TV51 anode；The same phase of one end of another terminating resistor R51 of magnetic bead FB1, one end of capacitor C52 and voltage comparator U51
Input terminal, the other end of magnetic bead FB2 and the other end ground connection of capacitor C52；Another termination voltage VCC and resistance of resistance R51
The reverse phase of one end of R52, one end of another terminating resistor R53 of resistance R52, one end of capacitor C53 and voltage comparator U51 is defeated
Enter end, the other end of resistance R53 and the other end ground connection of capacitor C53；The output termination NAND gate U52's of voltage comparator U51
The clock end of two input terminals and d type flip flop U53；The output end of NAND gate U52 exports start pulse signal TRP；D triggering
The non-output of the Q of device U53 terminates the end D, and the end R of d type flip flop U53 meets voltage VCC by resistance R55, and the end S of d type flip flop U53 passes through
Resistance R54 meets voltage VCC, and the Q output of d type flip flop U53 exports taking turn enable signal FPW.
7. two-way taking turn pulse duration frequency as described in claim 1 can be changed trigger signal generator controller, which is characterized in that
Adjustable pulse-width limiting circuit (30) include voltage comparator U31, NAND gate U32, with door U33, resistance R31, R32,
R33, capacitor C31, C32, C33, C34, C35；
One end termination voltage VCC, another terminating resistor R32 of resistance R31, the one end capacitor C31 and voltage comparator U31 it is anti-
Phase input terminal；The other end of resistance R32 and the other end ground connection of capacitor C31；The end thereof contacts of resistance R33 send out pulse signal TRP,
And one end with door U33；One end of another termination capacitor C32, C33, C34, C35 of resistance R33 and voltage comparator U31's
Non-inverting input terminal；Another one end termination wire jumper JP4 of capacitor C32, wire jumper JP4 other end ground connection；Another termination of capacitor C33 is jumped
The one end line JP3, wire jumper JP3 other end ground connection；Another one end termination wire jumper JP2 of capacitor C34, wire jumper JP2 other end ground connection；Electricity
Hold another one end termination wire jumper JP1 of C35, the other end ground connection of wire jumper JP1；The output of voltage comparator U31 terminates NAND gate
Two input terminals of U32, another input terminal of the output termination and door U33 of NAND gate U32, the output end of NAND gate U32 generate
Reset signal CLR generates trigger signal DRV after pulsewidth limits with the output end of door U33.
8. two-way taking turn pulse duration frequency as described in claim 1 can be changed trigger signal generator controller, which is characterized in that
Two-way driving output circuit (60) include and door U61 and two-way isolation drive output circuit；Taking turn enable signal FPW
So that two-way isolation drive output circuit alternate conduction works；Frequency limit signal TEN is met respectively with two input terminals of door U61
With trigger signal DRV after pulsewidth limitation, the output with door U61 terminates the respective input terminal of two-way isolation drive output circuit.
9. two-way taking turn pulse duration frequency as described in claim 1 can be changed trigger signal generator controller, which is characterized in that
First via isolation drive output circuit includes resistance R61, R62, R63, R64, R65, R66, NPN triode Q61, Q62, light
Coupling OP1, Light-emitting diode LED 61, capacitor C61, Transient Suppression Diode TV61, fuse F61；
One end cock wheel of resistance R63 and R64 patrol enable signal FPW, another termination voltage VCC's and triode Q61 of resistance R63
Collector, the base stage of another termination triode Q61 of resistance R64, the emitter of triode Q61 connect the input Dragon Boat Festival of optocoupler OP1
Pole；The anode of the input terminal cathode sending and receiving optical diode LED61 of optocoupler OP1, the cathode of Light-emitting diode LED 61 pass through resistance
R65 connects the collector of triode Q62, and the emitter of triode Q62 is grounded, one end of the base stage connecting resistance R62 of triode Q62,
Another termination of resistance R62 and the output end of door U61, and voltage VCC is connect by resistance R61；The output end collector of optocoupler OP1
One end of connecting resistance R66, the cathode of Transient Suppression Diode TV61 and fuse F61 one end, resistance R66 another termination electricity
The anode of appearance one end C61, the capacitor C61 other end and Transient Suppression Diode TV61 connect optocoupler OP1 output end emitter；Optocoupler
Two output ends of OP1 export first via subsequent equipment trigger signal；
Second tunnel isolation drive output circuit includes resistance R71, R72, R73, R74, R75, R76, PNP triode Q71, NPN tri-
Pole pipe Q72, optocoupler OP2, Light-emitting diode LED 71, capacitor C71, Transient Suppression Diode TV71, fuse F71；
One end cock wheel of resistance R73 and R74 patrol enable signal FPW, another termination voltage VCC's and triode Q71 of resistance R73
Emitter, the base stage of another termination triode Q71 of resistance R74, the collector of triode Q71 connect the input Dragon Boat Festival of optocoupler OP2
Pole；The anode of the input terminal cathode sending and receiving optical diode LED71 of optocoupler OP2, the cathode of Light-emitting diode LED 71 pass through resistance
R75 connects the collector of triode Q72, and the emitter of triode Q72 is grounded, one end of the base stage connecting resistance R72 of triode Q72,
Another termination of resistance R72 and the output end of door U61, and voltage VCC is connect by resistance R71；The output end collector of optocoupler OP2
One end of connecting resistance R76, the cathode of Transient Suppression Diode TV71 and fuse F71 one end, resistance R76 another termination electricity
The anode of appearance one end C71, the capacitor C71 other end and Transient Suppression Diode TV71 connect optocoupler OP2 output end emitter；Optocoupler
Two output ends of OP2 export the second tunnel subsequent equipment trigger signal.
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