CN109408409A - A method of promoting random writing efficiency - Google Patents
A method of promoting random writing efficiency Download PDFInfo
- Publication number
- CN109408409A CN109408409A CN201811253524.6A CN201811253524A CN109408409A CN 109408409 A CN109408409 A CN 109408409A CN 201811253524 A CN201811253524 A CN 201811253524A CN 109408409 A CN109408409 A CN 109408409A
- Authority
- CN
- China
- Prior art keywords
- logical image
- image table
- user data
- memory pages
- hash memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7201—Logical to physical mapping or translation of blocks or pages
Abstract
The invention discloses a kind of methods for promoting random writing efficiency, comprising the following steps: step 1: by the unfilled Hash memory pages of logical image table filling user data, becoming the mixing Hash memory pages an of user data Yu logical image table；Step 2: logical image table adjusts suitable logical image table according to remaining Hash memory pages size to fill up entire Hash memory pages；Step 3: being written flash memory block for the mixing Hash memory pages containing user data and logical image table together, which promotes random writing efficiency, faster when measuring random writing efficiency reaches better efficiency than existing storage method；User data and logical image table are integrated into the size of a flash memory number of pages capacity, it is another to rise in write-in flash memory, the number of write-in flash memory can be not only reduced, the time of write-in flash memory can also be reduced.
Description
Technical field
The present invention relates to random writing technical field in storage system, specially a kind of side for promoting random writing efficiency
Method.
Background technique
In flash memory storage using upper fairly widespread, either onboard system is also robot, requires extremely short
Time internal feedback.So dynamical writing speed is indispensable in flash-memory storage system.However, writing speed has
The measurement standard of a special test efficiency: IOPS(Input/Output Operations Per Second).
IOPS is the measurement mode for being used for computer storage device effect test, can be considered as read-write per second time
Number.The numerical value of IOPS can be very different with system configuration, according to tester test when control become thus it is different.However,
Control become because include the size read and write or ratio, wherein sequentially write and the ratio of random writing and configuration mode, number of threads,
The size of access queue depth and data segments.
Existing management method is user data and logical image table is separate management.The data that tester is written, directly
It collects into the block of sections certain in flash memory.However the logical image table that firmware uses, then it is to be stored in other flash memories respectively
In block, it would therefore be highly desirable to which a kind of improved technology solves the problems, such as this in the presence of the prior art.
Summary of the invention
The purpose of the present invention is to provide a kind of methods for promoting random writing efficiency, promote random writing efficiency, than existing
Some storage methods faster when measuring random writing efficiency reach better efficiency, to solve to propose in above-mentioned background technique
The problem of.
To achieve the above object, the invention provides the following technical scheme: it is a kind of promoted random writing efficiency method, including
Following steps:
Step 1: by the unfilled Hash memory pages of logical image table filling user data, become a user data and logical image
The mixing Hash memory pages of table；
Step 2: logical image table adjusts suitable logical image table according to remaining Hash memory pages size to fill up entire flash memory
Page；
Step 3: flash memory block is written into the mixing Hash memory pages containing user data and logical image table together.
Preferably, the capacity of Hash memory pages is bigger in the step 1, and the data volume once transmitted is bigger.
Preferably, logical image table is not fixed in the step 1 size and length, the size of logical image table and
Length is depending on the static random access memory size in master control.
Preferably, the static random access memory is made of transistor, the state meeting of static random access memory
It remains to until having received a change signal.
Compared with prior art, the beneficial effects of the present invention are:
(1) random writing efficiency is promoted, faster when measuring random writing efficiency reaches better than existing storage method
Efficiency.
(2) user data and logical image table are integrated into the size of a flash memory number of pages capacity, it is another to play write-in flash memory
In, the number of write-in flash memory can be not only reduced, the time of write-in flash memory can also be reduced.
Detailed description of the invention
Fig. 1 is the structural diagram of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Referring to Fig. 1, the present invention provides a kind of technical solution: a method of random writing efficiency being promoted, including following
Step:
Step 1: by the unfilled Hash memory pages of logical image table filling user data, become a user data and logical image
The mixing Hash memory pages of table；
Step 2: logical image table adjusts suitable logical image table according to remaining Hash memory pages size to fill up entire flash memory
Page；
Step 3: flash memory block is written into the mixing Hash memory pages containing user data and logical image table together.
The capacity of Hash memory pages is bigger, and the data volume once transmitted is bigger, the size and length that logical image table is not fixed,
The size and length of logical image table are depending on the static random access memory size in master control, static random access memory
Device is made of transistor, and the state of static random access memory can remain to until having received a change signal.
The method proposes the concept for mixing user data with logical image table, by the user data of tester's write-in and admittedly
The logical image table of part is mixed into identical block.In this method, when user data collection is to certain amount, this
When being also required to the logical image table of storage firmware, user data and logical image table are integrated into a flash memory number of pages capacity
Size, it is another to rise in write-in flash memory, the number of write-in flash memory can be not only reduced, the time of write-in flash memory can also be reduced
Static random in addition, size and length that the logical image table of firmware is not fixed, in the interdependent master control of logical image table
Memory size is accessed, so can control needs the space of hybrid subscriber data big according to static random access memory size
It is small, the number of pages capacity of mono- flash memory of Lai Zucheng.
Embodiment one, prepares the flash memory that a capacity is 4GB, and the size of each Hash memory pages is 2KB, wherein Hash memory pages 1 are deposited
Entering 512 bytes of user data, Hash memory pages 2 are stored in 1024 bytes of user data, and Hash memory pages 3 are stored in 1512 bytes of user data, with
Logical image table is inserted afterwards, wherein the data that logical image table separates 1512 bytes are filled to Hash memory pages 1, logical image table
The data for separating 1024 bytes are filled to Hash memory pages 2, and the data that logical image table separates 512 bytes are filled to Hash memory pages 3,
Three page write times shorten 75 μ s compared with used time mode write time of user data and logical image table separate management.
Embodiment two, prepares the flash memory that a capacity is 4GB, and the size of each Hash memory pages is 512 bytes, wherein flash memory
Page 1 is stored in 64 bytes of user data, and Hash memory pages 2 are stored in 256 bytes of user data, and Hash memory pages 3 are stored in 192 bytes of user data,
Then filling logical image table, wherein the data that logical image table separates 448 bytes are filled to Hash memory pages 1, logical image table
The data for separating 256 bytes are filled to Hash memory pages 2, and the data that logical image table separates 320 bytes are filled to Hash memory pages 3,
Three page write times shorten 50 μ s compared with used time mode write time of user data and logical image table separate management.
Embodiment three, prepares the flash memory that a capacity is 2GB, and the size of each Hash memory pages is 1KB, wherein Hash memory pages 1 are deposited
Enter 128 bytes of user data, Hash memory pages 2 are stored in 512 bytes of user data, and Hash memory pages 3 are stored in 256 bytes of user data, then
Insert logical image table, wherein the data that logical image table separates 896 bytes are filled to Hash memory pages 1, and logical image table separates
The data of 512 bytes are filled to Hash memory pages 2, and the data that logical image table separates 768 bytes are filled to Hash memory pages 3, and three
The page write time shortens 65 μ s compared with used time mode write time of user data and logical image table separate management.
Example IV, prepares the flash memory that a capacity is 2GB, and the size of each Hash memory pages is 512 bytes, wherein flash memory
Page 1 is stored in 64 bytes of user data, and Hash memory pages 2 are stored in 256 bytes of user data, and Hash memory pages 3 are stored in 384 bytes of user data,
Then filling logical image table, wherein the data that logical image table separates 448 bytes are filled to Hash memory pages 1, logical image table
The data for separating 256 bytes are filled to Hash memory pages 2, and the data that logical image table separates 128 bytes are filled to Hash memory pages 3,
Three page write times shorten 45 μ s compared with used time mode write time of user data and logical image table separate management.
Embodiment five, prepares the flash memory that a capacity is 1GB, and the size of each Hash memory pages is 512 bytes, wherein flash memory
Page 1 is stored in 32 bytes of user data, and Hash memory pages 2 are stored in 128 bytes of user data, and Hash memory pages 3 are stored in 256 bytes of user data,
Then filling logical image table, wherein the data that logical image table separates 480 bytes are filled to Hash memory pages 1, logical image table
The data for separating 384 bytes are filled to Hash memory pages 2, and the data that logical image table separates 256 bytes are filled to Hash memory pages 3,
Three page write times shorten 45 μ s compared with used time mode write time of user data and logical image table separate management.
Embodiment six, prepares the flash memory that a capacity is 1GB, and the size of each Hash memory pages is 256 bytes, wherein flash memory
Page 1 is stored in 32 bytes of user data, and Hash memory pages 2 are stored in 128 bytes of user data, and Hash memory pages 3 are stored in 64 bytes of user data, with
Logical image table is inserted afterwards, wherein the data that logical image table separates 224 bytes are filled to Hash memory pages 1, logical image table point
The data of 128 bytes are filled to Hash memory pages 2 out, and the data that logical image table separates 192 bytes are filled to Hash memory pages 3, and three
A page of write time shortens 30 μ s compared with used time mode write time of user data and logical image table separate management.
Embodiment seven, prepares the flash memory that a capacity is 512MB, and the size of each Hash memory pages is 128 bytes, wherein is dodged
It deposits page 1 and is stored in 32 bytes of user data, Hash memory pages 2 are stored in 64 bytes of user data, and Hash memory pages 3 are stored in 96 bytes of user data,
Then filling logical image table, wherein the data that logical image table separates 96 bytes are filled to Hash memory pages 1, logical image table
The data for separating 64 bytes are filled to Hash memory pages 2, and the data that logical image table separates 32 bytes are filled to Hash memory pages 3, and three
A page of write time shortens 24 μ s compared with used time mode write time of user data and logical image table separate management.
Embodiment eight, prepares the flash memory that a capacity is 512MB, and the size of each Hash memory pages is 64 bytes, wherein is dodged
It deposits page 1 and is stored in 8 bytes of user data, Hash memory pages 2 are stored in 16 bytes of user data, and Hash memory pages 3 are stored in 32 bytes of user data, with
Logical image table is inserted afterwards, wherein the data that logical image table separates 56 bytes are filled to Hash memory pages 1, logical image table point
The data of 48 bytes are filled to Hash memory pages 2 out, and the data that logical image table separates 32 bytes are filled to Hash memory pages 3, and three
The page write time shortens 12 μ s compared with used time mode write time of user data and logical image table separate management.
According to embodiment one ~ eight, the method for the present invention is write compared with the mode of user data and logical image table separate management
The time for entering flash memory is obviously shortened.
It although an embodiment of the present invention has been shown and described, for the ordinary skill in the art, can be with
A variety of variations, modification, replacement can be carried out to these embodiments without departing from the principles and spirit of the present invention by understanding
And modification, the scope of the present invention is defined by the appended.
Claims (4)
1. a kind of method for promoting random writing efficiency, it is characterised in that: the following steps are included:
Step 1: by the unfilled Hash memory pages of logical image table filling user data, become a user data and logical image
The mixing Hash memory pages of table；
Step 2: logical image table adjusts suitable logical image table according to remaining Hash memory pages size to fill up entire flash memory
Page；
Step 3: flash memory block is written into the mixing Hash memory pages containing user data and logical image table together.
2. a kind of method for promoting random writing efficiency according to claim 1, it is characterised in that: dodged in the step 1
The capacity for depositing page is bigger, and the data volume once transmitted is bigger.
3. a kind of method for promoting random writing efficiency according to claim 1, it is characterised in that: patrolled in the step 1
Size and length that mapping table is not fixed are collected, the size and length of logical image table are deposited according to the static random-access in master control
Depending on reservoir size.
4. a kind of method for promoting random writing efficiency according to claim 3, it is characterised in that: the static random is deposited
Access to memory is made of transistor, and the state of static random access memory can remain to until having received a change signal.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811253524.6A CN109408409A (en) | 2018-10-25 | 2018-10-25 | A method of promoting random writing efficiency |
| PCT/CN2018/115513 WO2020082452A1 (en) | 2018-10-25 | 2018-11-14 | Method for improving random write performance |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811253524.6A CN109408409A (en) | 2018-10-25 | 2018-10-25 | A method of promoting random writing efficiency |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109408409A true CN109408409A (en) | 2019-03-01 |
Family
ID=65470147
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811253524.6A Withdrawn CN109408409A (en) | 2018-10-25 | 2018-10-25 | A method of promoting random writing efficiency |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN109408409A (en) |
| WO (1) | WO2020082452A1 (en) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6948026B2 (en) * | 2001-08-24 | 2005-09-20 | Micron Technology, Inc. | Erase block management |
| US20110004720A1 (en) * | 2009-07-02 | 2011-01-06 | Chun-Ying Chiang | Method and apparatus for performing full range random writing on a non-volatile memory |
| CN101794254B (en) * | 2009-11-25 | 2012-07-04 | 深圳市硅格半导体有限公司 | NAND-FLASH data processing method |
| CN108681509B (en) * | 2018-04-20 | 2022-04-08 | 江苏华存电子科技有限公司 | Method for quickly establishing flash memory mapping table |
-
2018
- 2018-10-25 CN CN201811253524.6A patent/CN109408409A/en not_active Withdrawn
- 2018-11-14 WO PCT/CN2018/115513 patent/WO2020082452A1/en active Application Filing
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| Publication number | Publication date |
|---|---|
| WO2020082452A1 (en) | 2020-04-30 |
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Application publication date: 20190301 |
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