CN109376851A - The spiking neuron signal generating circuit of bionic system is based on the implementation method of memristor - Google Patents
The spiking neuron signal generating circuit of bionic system is based on the implementation method of memristor Download PDFInfo
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- CN109376851A CN109376851A CN201810991742.3A CN201810991742A CN109376851A CN 109376851 A CN109376851 A CN 109376851A CN 201810991742 A CN201810991742 A CN 201810991742A CN 109376851 A CN109376851 A CN 109376851A
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- 210000002569 neuron Anatomy 0.000 title claims abstract description 35
- 238000012421 spiking Methods 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 title claims abstract description 10
- 239000011664 nicotinic acid Substances 0.000 title claims abstract description 8
- 239000013256 coordination polymer Substances 0.000 claims abstract description 13
- 239000003990 capacitor Substances 0.000 claims abstract description 7
- 210000000170 cell membrane Anatomy 0.000 claims abstract description 4
- 230000010220 ion permeability Effects 0.000 claims abstract description 4
- 238000013473 artificial intelligence Methods 0.000 abstract description 3
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000013528 artificial neural network Methods 0.000 description 4
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- 210000004556 brain Anatomy 0.000 description 2
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- 238000013529 biological neural network Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
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- 238000012545 processing Methods 0.000 description 1
- 230000010349 pulsation Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
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Abstract
The spiking neuron signal generating circuit of bionic system is based on the implementation method of memristor, it is related to artificial intelligence field, more particularly to bionic system spiking neuron signal generating circuit based on the implementation method of memristor, it will turn to the non-linear partial of circuit in memristor, for simulating the ion permeability of biological cell membrane, PART1 is the importation of circuit, PARTII is feedback-system section, PARTIII is output par, c, the dynamic characteristic of circuit is described as follows: electric current I represents neuron and receives the electric current input total from other neurons, transistor T1 when initial, T3, CT1, the P access of CT2 is connected, the open circuit of remaining transistor, it is low level that comparator CP, which exports current potential Vo1 and summing circuit output current potential Vo2, the current potential of capacitor Cm represents the film potential of neuron, It is initially 0V, the output Vo2 of AP is the multiple-time delay summation to Vo1.After adopting the above technical scheme, the invention has the following beneficial effects: building spiking neuron signal generating circuit, and guarantee the consistency of pulse before and after neuron in terms of it takes into account hardware realizability and biological interpretation two.
Description
Technical field
The present invention relates to artificial intelligence fields, and in particular to the spiking neuron signal generating circuit of bionic system is based on recalling
The implementation method of resistance.
Background technique
In recent years, the rapid development of artificial intelligence field is so that people are increasing to the expectation of high intelligence system, science
Boundary is in the intelligence system for exploring more class people, and demand of the engineering circles to high intelligence system is also growing day by day.Human brain can fit
Answer continually changing external environment, at the same can parallel, efficient and real-time calculating, human brain has its knot of so brilliant ability
Structure has distinctive feature certainly.Impulsive neural networks are exactly a kind of simulation to biological neural network, and wherein spiking neuron is made
The concern of researchers is constantly subjected to for main information process unit.And memristor was stacked in 2008 by HP Lab for the first time
Success, unique nonlinear characteristic can be applied to multiple fields.
Existing spiking neuron signal generating circuit is substantially to be built based on electronic components such as transistor, field-effect tube
It forms, from earliest Hodgkin Huxley model, integral-granting model, Izhikevich-Wilson model to leakage
Integral-granting model, takes a large amount of transistor to realize, still has several drawbacks place, such as Hodgkin
Huxley model, the activity of neuron is described in detail in it, but mathematical model is excessively complicated, is difficult to reach in hardware realization
To lesser power consumption.The model simplifications such as integral-granting model, Izhikevich and Wilson model mathematical model, but again
Preferable biological interpretation can not be possessed, have ignored the feature of some true biological pulsations.On the other hand, when these moulds of use
Type is built when freeing system, and the Sudden-touch circuit of neural network must be well-designed, and some cannot keep pulse before and after neuron
Consistency.
Summary of the invention
In view of the defects and deficiencies of the prior art, the present invention intends to provide the spiking neuron signals of bionic system
Implementation method of the circuit based on memristor occurs, it takes into account two aspect of hardware realizability and biological interpretation, builds pulse mind
Through first signal generating circuit, and guarantee the consistency of pulse before and after neuron.
To achieve the above object, the present invention is using following technical scheme: it will turn to the non-linear of circuit in memristor
Part, for simulating the ion permeability of biological cell membrane, PART1 is the importation of circuit, and PARTII is feedback control section
Point, PARTIII is output par, c, and the dynamic characteristic of circuit is described as follows: electric current I represents neuron and receives from other neurons
Total electric current input, transistor T1 when initial, T3, the P access conducting of CT1, CT2, the open circuit of remaining transistor, comparator CP output
Current potential Vo1 and summing circuit output current potential Vo2 is low level, and the current potential of capacitor Cm represents the film potential of neuron, is initially 0V,
The output Vo2 of AP is the multiple-time delay summation to Vo1.
Capacitor Cm integrates input charge, when the current potential of Cm reaches threshold voltage, the output voltage Vo1 of comparator CP
It is flipped, T2, T3, the N access conducting of the P access and CT2 of CT1, remaining open circuit, the charge on Cm is released, Vt access
The output of CP anode maintenance CP；
After a period of time, the voltage of Vo2 is flipped, while the voltage of Vo1 is flipped, T1, T4, the P access and CT1 of CT2
The conducting of N access, remaining open circuit, Cm continues to release；
The voltage of Vo1 is applied on memristor M and output resistance Ro by gain module K, and the variation of Vo1 current potential determines M's
Recall change in resistance, circuit replys original state when memristor value is maximum value, and memristor value will affect the partial pressure of memristor, the electricity at Ref
Pressure is output pulse, and the input as other neuron circuits can be picked out by voltage follower.
After adopting the above technical scheme, the invention has the following beneficial effects: it takes into account hardware realizability and biological interpretation
Two aspects, build spiking neuron signal generating circuit, and guarantee the consistency of pulse before and after neuron.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention without any creative labor, may be used also for those of ordinary skill in the art
To obtain other drawings based on these drawings.
Fig. 1 is electric current input pulse neuron circuit schematic diagram；
Fig. 2 is spiking neuron encapsulation schematic diagram；
The signal of Fig. 3 spiking neuron circuit exports schematic diagram.
Specific embodiment
Referring to shown in Fig. 1-Fig. 3, present embodiment the technical solution adopted is that: it will turn to circuit in memristor
Non-linear partial, for simulating the ion permeability of biological cell membrane, PART1 is the importation of circuit, and PARTII is feedback
Control section, PARTIII are output par, cs, and the dynamic characteristic of circuit is described as follows: electric current I represents neuron and receives from other
The total electric current input of neuron, transistor T1 when initial, T3, the P access conducting of CT1, CT2, the open circuit of remaining transistor, comparator
It is low level that CP, which exports current potential Vo1 and summing circuit output current potential Vo2, and the current potential of capacitor Cm represents the film potential of neuron, just
Begin to be 0V, the output Vo2 of AP is the multiple-time delay summation to Vo1.
Capacitor Cm integrates input charge, when the current potential of Cm reaches threshold voltage, the output voltage Vo1 of comparator CP
It is flipped, T2, T3, the N access conducting of the P access and CT2 of CT1, remaining open circuit, the charge on Cm is released, Vt access
The output of CP anode maintenance CP；
After a period of time, the voltage of Vo2 is flipped, while the voltage of Vo1 is flipped, T1, T4, the P access and CT1 of CT2
The conducting of N access, remaining open circuit, Cm continues to release；
The voltage of Vo1 is applied on memristor M and output resistance Ro by gain module K, and the variation of Vo1 current potential determines M's
Recall change in resistance, circuit replys original state when memristor value is maximum value, and memristor value will affect the partial pressure of memristor, the electricity at Ref
Pressure is output pulse, and the input as other neuron circuits can be picked out by voltage follower.
Impulsive neural networks are third generation neural networks, by the inspiration of biosystem, use spiking neuron as substantially
Signal processing unit.
Memristor is the 4th kind of basic circuit elements, and the change of memristor value is determined by the quantity of electric charge in certain time by element
It is fixed, have non-volatile.
The above is only used to illustrate the technical scheme of the present invention and not to limit it, and those of ordinary skill in the art are to this hair
The other modifications or equivalent replacement that bright technical solution is made, as long as it does not depart from the spirit and scope of the technical scheme of the present invention,
It is intended to be within the scope of the claims of the invention.
Claims (2)
1. the spiking neuron signal generating circuit of bionic system is based on the implementation method of memristor, it is characterised in that: it is by memristor
The non-linear partial of circuit is turned in device, for simulating the ion permeability of biological cell membrane, PART1 is the input unit of circuit
Point, PARTII is feedback-system section, and PARTIII is output par, c, and the dynamic characteristic of circuit is described as follows: electric current I represents mind
Receiving the electric current input total from other neurons through member, the P access of transistor T1 when initial, T3, CT1, CT2 are connected, remaining
Transistor open circuit, it is low level that comparator CP, which exports current potential Vo1 and summing circuit output current potential Vo2, and the current potential of capacitor Cm represents
The film potential of neuron, is initially 0V, and the output Vo2 of AP is the multiple-time delay summation to Vo1.
2. the spiking neuron signal generating circuit of bionic system according to claim 1 is based on the implementation method of memristor,
It is characterized by: capacitor Cm integrates input charge when work, when the current potential of Cm reaches threshold voltage, comparator CP's
Output voltage Vo1 is flipped, T2, T3, the N access conducting of the P access and CT2 of CT1, remaining open circuit, and the charge on Cm carries out
It releases, Vt accesses the output that CP anode maintains CP；After a period of time, the voltage of Vo2 is flipped, while the voltage of Vo1 occurs
Overturning, T1, T4, the N access conducting of the P access and CT1 of CT2, remaining open circuit, Cm continue to release；The voltage of Vo1 passes through gain mould
Block K is applied on memristor M and output resistance Ro, and the variation of Vo1 current potential determines that the change in resistance of recalling of M, memristor value are maximum
Circuit replys original state when value, and memristor value will affect the partial pressure of memristor, and the voltage at Ref is to export pulse, can pass through
Voltage follower picks out the input as other neuron circuits.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110647982A (en) * | 2019-09-26 | 2020-01-03 | 中国科学院微电子研究所 | Artificial sensory nerve circuit and preparation method thereof |
| CN110991629A (en) * | 2019-11-02 | 2020-04-10 | 复旦大学 | Memristor-based neuron circuit |
| CN113673674A (en) * | 2021-08-09 | 2021-11-19 | 江南大学 | Analog pulse neuron circuit based on CMOS |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106201651A (en) * | 2016-06-27 | 2016-12-07 | 鄞州浙江清华长三角研究院创新中心 | The simulator of neuromorphic chip |
| US9552546B1 (en) * | 2013-07-30 | 2017-01-24 | Brain Corporation | Apparatus and methods for efficacy balancing in a spiking neuron network |
| CN106650922A (en) * | 2016-09-29 | 2017-05-10 | 清华大学 | Hardware neural network conversion method, computing device, compiling method and neural network software and hardware collaboration system |
| US20180005108A1 (en) * | 2016-06-30 | 2018-01-04 | Hrl Laboratories, Llc | Neural integrated circuit with biological behaviors |
| CN107742153A (en) * | 2017-10-20 | 2018-02-27 | 华中科技大学 | A kind of neuron circuit with stable state plasticity based on memristor |
-
2018
- 2018-08-29 CN CN201810991742.3A patent/CN109376851A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9552546B1 (en) * | 2013-07-30 | 2017-01-24 | Brain Corporation | Apparatus and methods for efficacy balancing in a spiking neuron network |
| CN106201651A (en) * | 2016-06-27 | 2016-12-07 | 鄞州浙江清华长三角研究院创新中心 | The simulator of neuromorphic chip |
| US20180005108A1 (en) * | 2016-06-30 | 2018-01-04 | Hrl Laboratories, Llc | Neural integrated circuit with biological behaviors |
| CN106650922A (en) * | 2016-09-29 | 2017-05-10 | 清华大学 | Hardware neural network conversion method, computing device, compiling method and neural network software and hardware collaboration system |
| CN107742153A (en) * | 2017-10-20 | 2018-02-27 | 华中科技大学 | A kind of neuron circuit with stable state plasticity based on memristor |
Non-Patent Citations (4)
| Title |
|---|
| LIANG ZHAO 等: "Novel designs of spiking neuron circuit and STDP learning circuit based on memristor", 《NEUROCOMPUTING》 * |
| T.SERRANO-GOTARREDONA 等: "STDP and STDP variations with memristors for spiking neuromorphic learning systems", 《FRONTIERS IN NEUROSCIENCE》 * |
| YONGTAE KIM 等: "A DIGITAL NEUROMORPHIC VLSI ARCHITECTURE WITH MEMRISTOR CROSSBAR SYNAPTIC ARRAY FOR MACHINE LEARNING", 《2012 IEEE INTERNATIONAL SOC CONFERENCE》 * |
| 徐桂芝 等: "基于忆阻器的脉冲神经网络研究综述", 《生物医学工程学杂志》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110647982A (en) * | 2019-09-26 | 2020-01-03 | 中国科学院微电子研究所 | Artificial sensory nerve circuit and preparation method thereof |
| CN110647982B (en) * | 2019-09-26 | 2022-04-15 | 中国科学院微电子研究所 | Artificial sensory nerve circuit and preparation method thereof |
| CN110991629A (en) * | 2019-11-02 | 2020-04-10 | 复旦大学 | Memristor-based neuron circuit |
| CN110991629B (en) * | 2019-11-02 | 2023-05-02 | 复旦大学 | Neuron circuit based on memristor |
| CN113673674A (en) * | 2021-08-09 | 2021-11-19 | 江南大学 | Analog pulse neuron circuit based on CMOS |
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