CN109361309B - Parallel inverter system and wave-by-wave current limiting control method - Google Patents
Parallel inverter system and wave-by-wave current limiting control method Download PDFInfo
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- CN109361309B CN109361309B CN201811289718.1A CN201811289718A CN109361309B CN 109361309 B CN109361309 B CN 109361309B CN 201811289718 A CN201811289718 A CN 201811289718A CN 109361309 B CN109361309 B CN 109361309B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/122—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/493—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode the static converters being arranged for operation in parallel
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Abstract
The embodiment of the invention provides a parallel inverter system and a wave-by-wave current-limiting control method, wherein the parallel inverter system comprises a wave-by-wave current-limiting control device, and interface boards of a plurality of inverters are respectively connected to the wave-by-wave current-limiting control device; wherein: when any inverter triggers a wave-by-wave current limiting signal, the wave-by-wave current limiting signal is sent to the wave-by-wave current limiting control device through an interface board corresponding to the inverter; when the wave-by-wave current limiting control device receives the wave-by-wave current limiting signals sent by any one inverter, the wave-by-wave current limiting control device simultaneously sends the wave-by-wave current limiting signals to all the inverters through the interface boards corresponding to all the parallel inverters to trigger all the parallel inverters to simultaneously start the wave-by-wave current limiting. The embodiment of the invention can realize the step-by-step current-limiting synchronous triggering of the parallel inverters, and avoid the hardware overcurrent faults of other inverters caused by the fact that one inverter is independently started to carry out wave-by-wave current limiting in a parallel inverter system.
Description
Technical Field
The embodiment of the invention relates to the field of power electronic equipment, in particular to a parallel inverter system and a wave-by-wave current limiting control method.
Background
The high-power inverter is generally formed by connecting a plurality of inverters with the same power in parallel, such as megawatt-level shore power supply products. The inverters can realize high-capacity power supply in parallel operation, the flexibility of the system can be greatly improved, the size and the weight of a power supply system are greatly reduced, and the current stress of a main switching device can also be greatly reduced, so that the reliability is improved, the cost is reduced, and the power density is improved.
Fig. 1 is a schematic diagram of a parallel connection scheme of an existing inverter. In the inverter parallel scheme, the inverter parallel scheme comprises a main control module 11, a parallel operation control module 12 and a plurality of inverters 13, and each inverter 13 comprises an interface board. The parallel machine control module is used when the power requirement of the equipment is greater than the maximum power of the single machine, and the main control module 11, the parallel machine control module 12 and the plurality of inverters 13 are in data communication by using optical fibers.
In each of the inverters 13, the phase current thereof is obtained by a current sampling device, and the phase current is conditioned by a sampling conditioning circuit and then compared with a wave-by-wave current-limiting threshold (for example, preferably 2 times of the peak value of the rated current). When the load changes suddenly, such as the switching-in of a transformer, the sudden loading of a motor and the like, the inverters 13 can judge whether the current value sampled by the inverters 13 exceeds the wave-by-wave current limiting threshold value or not, if the current value exceeds the wave-by-wave current limiting threshold value, the inverters 13 can trigger the wave-by-wave current limiting function, so that the overcurrent fault of triggering hardware is prevented, and the reliable operation of equipment is ensured.
When a plurality of inverters 13 are used in parallel, due to the consistency problem of devices and equipment, it cannot be guaranteed that the current of each inverter 13 connected in parallel is completely consistent when the load suddenly changes, and it cannot be guaranteed that the plurality of inverters 13 can trigger respective wave-by-wave current limiting functions at the same time. When the load suddenly changes, because the partial parallel inverters 13 trigger the wave-by-wave current limiting function, other inverters directly trigger overcurrent faults due to too fast and too large current change, equipment is stopped, and production accidents can be caused seriously.
Disclosure of Invention
The embodiment of the invention provides a parallel inverter system and a wave-by-wave current-limiting control method, aiming at the problem that hardware overcurrent faults occur to other inverters due to the wave-by-wave current limiting of a certain inverter in the parallel inverter system.
The technical solution for solving the above technical problem according to an embodiment of the present invention is to provide a parallel inverter system, which includes a main control module, a parallel machine control module, and a plurality of inverters connected in parallel, where each inverter includes an interface board, and each interface board is connected to the main control module via the parallel machine control module; the parallel inverter system is characterized by further comprising a wave-by-wave current limiting control device, and interface boards of the plurality of inverters are respectively connected to the wave-by-wave current limiting control device; wherein: when any inverter triggers a wave-by-wave current limiting signal, the wave-by-wave current limiting signal is sent to the wave-by-wave current limiting control device through an interface board corresponding to the inverter; when the wave-by-wave current limiting control device receives the wave-by-wave current limiting signals sent by any one inverter, the wave-by-wave current limiting control device simultaneously sends the wave-by-wave current limiting signals to all the inverters through the interface boards corresponding to all the parallel inverters to trigger all the parallel inverters to simultaneously start the wave-by-wave current limiting.
Preferably, the wave-by-wave current-limiting control device is connected with the main control module, and the wave-by-wave current-limiting control device comprises a micro control unit;
the micro control unit is used for receiving a first self-checking command issued by the main control module and sending a self-checking signal to each inverter according to the first self-checking command so that each inverter can execute self-checking operation;
the micro control unit also receives a first feedback signal returned after each inverter executes self-checking operation, and sends the first feedback signal to the main control module, so that the main control module controls the parallel control module, the inverters and the wave-by-wave current-limiting control device to start and operate when determining that each inverter has no fault according to the first feedback signal.
Preferably, the wave-by-wave current-limiting control device is connected with the main control module, and each inverter comprises a self-checking module;
the self-checking module is used for receiving a second self-checking command sent by the main control module and starting self-checking operation according to the second self-checking command;
the self-checking module is further used for sending a second feedback signal to the main control module according to a self-checking operation result, so that the main control module controls the parallel control module, the inverters and the wave-by-wave current-limiting control device to start and operate when determining that all the inverters have no fault according to the second feedback signal.
Preferably, each of the interface boards is connected to the wave-by-wave current limiting control device through an optical fiber.
Preferably, the wave-by-wave current-limiting control device comprises a field programmable gate array; the field programmable gate array comprises a plurality of input interfaces and a plurality of output interfaces, and each interface board is connected to one input interface and one output interface of the field programmable gate array through a pair of optical fibers; and the field programmable gate array enables all the output interfaces to output the non-preset level only when all the input interfaces are at the non-preset level.
The embodiment of the invention also provides a wave-by-wave current-limiting control method which is applied to a parallel inverter system, wherein the parallel inverter system comprises a main control module, a parallel control module and a plurality of inverters connected in parallel, each inverter comprises an interface board, and each interface board is connected with the main control module through the parallel control module; the parallel inverter system further comprises a wave-by-wave current limiting control device, and interface boards of the plurality of inverters are respectively connected to the wave-by-wave current limiting control device, and the method comprises the following steps:
when any inverter in the parallel inverter system triggers a wave-by-wave current limiting signal, the wave-by-wave current limiting signal is sent to the wave-by-wave current limiting control device through an interface board corresponding to the inverter;
when the wave-by-wave current limiting control device receives the wave-by-wave current limiting signals sent by any one inverter, the wave-by-wave current limiting control device simultaneously sends the wave-by-wave current limiting signals to all the inverters through the interface boards corresponding to all the parallel inverters to trigger all the parallel inverters to simultaneously start the wave-by-wave current limiting.
Preferably, the wave-by-wave current limiting control device is connected to the main control module, and the method further includes:
the wave-by-wave current limiting control device receives a first self-checking command issued by the main control module, and sends a self-checking signal to each inverter according to the first self-checking command, so that each inverter executes self-checking operation;
the wave-by-wave current-limiting control device receives a first feedback signal returned after each inverter executes self-checking operation, and sends the first feedback signal to the main control module, so that the main control module controls the parallel operation control module, the inverters and the wave-by-wave current-limiting control device to start and operate when determining that each inverter has no fault according to the first feedback signal.
Preferably, the method comprises:
the master control module sends a second self-checking command to each inverter;
each inverter starts self-checking operation according to the second self-checking command and sends a second feedback signal to the main control module according to a self-checking operation result;
and the master control module controls the parallel machine control module, the inverters and the wave-by-wave current limiting control device to start and operate when determining that all the inverters have no fault according to the second feedback signal.
Preferably, each of the interface boards is connected to the wave-by-wave current limiting control device through an optical fiber.
Preferably, the wave-by-wave current-limiting control device comprises a field programmable gate array; the field programmable gate array comprises a plurality of input interfaces and a plurality of output interfaces, and each interface board is connected to one input interface and one output interface of the field programmable gate array through a pair of optical fibers; and the field programmable gate array enables all the output interfaces to output the non-preset level only when all the input interfaces are at the non-preset level.
According to the parallel inverter system and the wave-by-wave current limiting control method, the wave-by-wave current limiting signals of the interface boards of the inverters are synchronized through the wave-by-wave current limiting control device, so that hardware overcurrent faults of other inverters caused by the wave-by-wave current limiting of one inverter in the parallel inverter system can be avoided.
Drawings
FIG. 1 is a schematic of a topology of a prior art parallel inverter system;
FIG. 2 is a schematic diagram of a parallel inverter system provided by an embodiment of the present invention;
fig. 3 is a schematic diagram of a wave-by-wave current limiting control device in a parallel inverter system according to an embodiment of the invention;
fig. 4 is a diagram of measuring the delay of the wave-by-wave current-limiting hardware in the parallel inverter system according to the embodiment of the invention;
fig. 5 is a schematic flow chart of a wave-by-wave current limiting control method according to an embodiment of the present invention;
fig. 6 is a schematic flow chart illustrating a self-checking step in the wave-by-wave current limiting control method according to an embodiment of the present invention;
fig. 7 is a schematic flow chart illustrating a self-checking step in a wave-by-wave current limiting control method according to another embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 2, a schematic diagram of a parallel inverter system, which may be a megawatt shore voltage or similar power electronics device, is provided by an embodiment of the present invention. The parallel inverter system of the present embodiment includes a main control module 21, a parallel operation control module 22, a plurality of inverters 23 connected in parallel, and a ripple current limit control device 24. Each of the inverters 23 described above includes an interface board. In practical applications, the number of inverters 23 may be adjusted as desired.
The main control module 21 can be connected to the parallel control module 22 through a pair of optical fibers, each inverter 23 is connected to the dc bus in parallel, and the interface board of each inverter 23 is connected to the parallel control module 22 through an optical fiber. When the parallel inverter system works, the main control module 21 realizes tasks such as an inverter function algorithm, a motor control algorithm, external communication and the like, and transmits control information to the interface board of each inverter 23 through optical fibers, and receives information such as operation parameters, module faults, working states and the like transmitted by the interface board of the inverter 23; the parallel machine control module 22 plays a role in starting and stopping in the system, and is mainly used for realizing PWM (Pulse Width Modulation) wave sending instruction distribution, data sampling and sorting from an interface board of the inverter 23, current output and current sharing control of the inverter 23, and the like; the interface board is used for generating a driving signal of the inverter 23 where the interface board is located according to the PWM wave-sending instruction distributed by the parallel control module 22, so as to control the switching action of the power unit (for example, an insulated gate bipolar transistor) in the inverter 23, and collect relevant data such as phase current and bus voltage and upload the data to the main control module 21 through optical fiber communication to perform control operation.
Each inverter 23 has a function of current limiting wave by wave, that is, the inverter 23 compares the current value sampled by its hall with a set current limiting wave by wave threshold (the whole comparison circuit can be realized by hardware), when the sampled current value exceeds the set threshold, the comparison circuit triggers a current limiting wave signal by wave, and the interface board stops sending wave immediately after receiving the current limiting wave signal by hardware, so that the inverter 23 stops outputting.
The interface board of each inverter 23 is further connected to the wave-by-wave current-limiting control device 24, when any inverter 23 triggers the wave-by-wave current-limiting operation, the wave-by-wave current-limiting control device 24 sends a wave-by-wave current-limiting signal to the wave-by-wave current-limiting control device 24, and when the wave-by-wave current-limiting control device 24 receives the wave-by-wave current-limiting signal sent by any inverter 23, the wave-by-wave current-limiting signal is simultaneously issued to all the inverters 23 through the interface board corresponding to each parallel inverter 23, and all the parallel inverters 23 are triggered to start the wave-by-wave current-limiting at the same time.
In the parallel inverter system, when any one or more inverters 23 generate the wave-by-wave current limiting function, the wave-by-wave current limiting control device 24 will synchronously trigger the wave-by-wave current limiting functions of all inverters 23, so as to ensure that the parallel inverter system operates stably and reliably under the condition of sudden load change.
In order to improve the synchronization efficiency of the ripple current limiting signals, the interface boards of the inverter 23 may be respectively connected to the ripple current limiting control device 24 through optical fibers. Due to the hardware circuit (i.e. the signal transmission between the interface board and the wave-by-wave current-limiting control device 24) there is a certain delay TdelayIn the parallel inverter system, the maximum delay time of the on-state of all the inverters 23 for the current limiting function is 2 × Tdelay(the inverter 23 receives the signal from the wave-by-wave current-limiting control device), and experimental tests show that the delay time T for signal transmission between the interface board and the wave-by-wave current-limiting control device 24 is determined by the optical fiberdelay240-delayAnd the rise time (5us) of the current of the inverter 23 from the wave-by-wave current limiting point to the hardware overcurrent point is shorter than the rise time, so that the wave-by-wave current limiting function action of the current in the inverter 23 before the current rises to the hardware overcurrent triggering threshold value can be ensured, and the hardware overcurrent fault is prevented from being triggered.
As shown in fig. 3, the wave-by-wave current limiting control device 24 includes a Field-Programmable Gate Array (FPGA) 241, the FPGA 241 includes a plurality of input interfaces and a plurality of output interfaces, and each interface board is connected to one input interface and one output interface of the FPGA through a pair of optical fibers. The field programmable gate array enables all output interfaces to output non-preset levels only when all input interfaces are in the non-preset levels (for example, low levels, namely, non-wave-by-wave current limiting signals); and any input interface is at a preset level (for example, a high level, namely, a wave-by-wave current limiting signal), so that all output interfaces output the preset level, namely, wave-by-wave current limiting synchronization is triggered.
In order to ensure the reliable operation of the parallel inverter system, the parallel inverter system can also have a self-checking function. The self-checking function can be specifically realized by the following modes: the ripple current limit control device 24 is connected to the main control module 21, and the ripple current limit control device 24 includes a micro control unit 242. When the parallel inverter system is powered on or the system starts to operate, the main control module 21 sends a first self-checking command to the wave-by-wave current-limiting control device 24; after receiving the first self-test command, the mcu 42 starts a self-test program and sends a self-test signal to each inverter 23, so that each inverter 23 performs a self-test operation. The mcu 42 further receives a first feedback signal returned by each inverter 23 after performing the self-test operation, and sends the first feedback signal (when the inverter 23 is normal, the first feedback signal returned by the inverter is normal) to the main control module 21; the main control module 21 controls the parallel operation control module 22, each inverter 23, and the wave-by-wave current limiting control device 24 to start operation when determining that each inverter has no fault according to the first feedback signal (when the first feedback signal of one inverter 23 is not received, the inverter 23 is confirmed to have a fault).
In addition, the self-checking function of the parallel inverter system can be realized by the following steps: the interface board of each inverter 23 includes a self-test module. The self-checking module is configured to receive a second self-checking command sent by the main control module 21, and start a self-checking operation according to the second self-checking command (when the parallel inverter system is powered on or the system is running, the main control module 21 sends the second self-checking command to each inverter 23). The self-checking module also sends a second feedback signal to the main control module 21 according to the self-checking operation result; and the main control module 21 controls the parallel control module 22, each inverter 23 and the wave-by-wave current limiting control device 24 to start operation when determining that each inverter has no fault according to the second feedback signal.
As shown in fig. 5, the flow chart of the wave-by-wave current limiting control method according to the embodiment of the present invention is schematically shown, and the wave-by-wave current limiting control method can be applied to a parallel inverter system, and the parallel inverter system includes a main control module, a parallel control module, a plurality of inverters connected in parallel, and a wave-by-wave current limiting control device, where each inverter includes an interface board, and each interface board is connected to the main control module via the parallel control module, and the interface board of each inverter is further connected to the wave-by-wave current limiting control device. The wave-by-wave current limiting control method of the embodiment comprises the following steps:
step S51: when any inverter in the parallel inverter system triggers the wave-by-wave current limiting operation, the wave-by-wave current limiting signal is sent to the wave-by-wave current limiting control device through the corresponding interface board of the inverter. In order to ensure the synchronous response time of the wave-by-wave current limiting, each interface board is connected to the wave-by-wave current limiting control device through an optical fiber.
The wave-by-wave current-limiting control device comprises a field programmable gate array, wherein the field programmable gate array comprises a plurality of input interfaces and a plurality of output interfaces, and each interface board is connected to one input interface and one output interface of the field programmable gate array through a pair of optical fibers.
Step S52: and when receiving the wave-by-wave current limiting signal sent by any inverter, the wave-by-wave current limiting control device simultaneously sends the wave-by-wave current limiting signal to all inverters.
When the wave-by-wave current limiting control device comprises a field programmable gate array, the field programmable gate array only enables all output interfaces to output non-preset levels when all input interfaces are in the non-preset levels (for example, low levels, namely non-wave-by-wave current limiting signals); and any input interface is at a preset level (for example, a high level, namely, a wave-by-wave current limiting signal), so that all output interfaces output the preset level, namely, wave-by-wave current limiting synchronization is triggered.
Step S53: the interface board stops outputting when receiving the wave-by-wave current limiting signal from the wave-by-wave current limiting control device. The wave-by-wave current limiting signals of each inverter come from two channels, one is a hardware circuit signal of the inverter where the inverter is located, namely the wave-by-wave current limiting signals are triggered inside the inverter, the other signal comes from external triggering, namely the wave-by-wave current limiting signals sent by the wave-by-wave current limiting control device, and the wave-by-wave current limiting signals of the two channels can trigger the wave-by-wave current limiting of the inverter.
As shown in fig. 6, in order to ensure reliable operation of the parallel inverter system, the wave-by-wave current limiting control method further includes a self-checking step:
step S61: the main control module sends a first self-checking command to the wave-by-wave current-limiting control device. This step may be performed when the parallel inverter system is powered up or starts running.
Step S62: the wave-by-wave current-limiting control device receives a first self-checking name sent by the main control module and sends a self-checking signal to each inverter according to a first self-checking command.
Step S63: the wave-by-wave current limiting control device receives a first feedback signal returned after each inverter executes self-checking operation, and sends the first feedback signal to the main control module. When the inverter is normal, a first feedback signal returned to the wave-by-wave current limiting device is normal.
Step S64: and the master control module controls the parallel machine control module, the inverters and the wave-by-wave current limiting control device to start and operate when determining that all the inverters have no fault according to the first feedback signal. And when the first feedback signal of a certain inverter is not received, the master control module confirms that the inverter has a fault.
As shown in fig. 7, each of the interface boards includes a self-checking module, and the self-checking step of the wave-by-wave current limiting control method can be implemented in the following manner:
step S71: and the main control module sends a second self-checking command to each inverter. This step may be performed when the parallel inverter system is powered up or starts running.
Step S72: and each inverter starts self-checking operation according to the second self-checking command and sends a second feedback signal to the main control module according to the self-checking operation result. When the inverter is in the normal self-checking state, a second feedback signal returned to the main control module is normal.
Step S73: and the master control module controls the parallel machine control module, the inverters and the wave-by-wave current limiting control device to start and operate when determining that all the inverters have no fault according to a second feedback signal returned by the inverters. And when the second feedback signal of a certain inverter is not received, the master control module confirms that the inverter has a fault.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A parallel inverter system comprises a main control module, a parallel machine control module and a plurality of inverters connected in parallel, wherein each inverter comprises an interface board, each interface board is connected with the main control module through the parallel machine control module, and the interface board is used for generating a driving signal of the inverter where the interface board is located according to a PWM wave-generating instruction distributed by the parallel machine control module so as to control the switching action of a power unit in the inverter; the parallel inverter system is characterized by further comprising a wave-by-wave current limiting control device, and interface boards of the plurality of inverters are respectively connected to the wave-by-wave current limiting control device; wherein: each inverter has a wave-by-wave current limiting function, and when any inverter triggers a wave-by-wave current limiting signal, the wave-by-wave current limiting signal is sent to the wave-by-wave current limiting control device through an interface board corresponding to the inverter; when the wave-by-wave current-limiting control device receives the wave-by-wave current-limiting signals sent by any one inverter, the wave-by-wave current-limiting control device simultaneously sends wave-by-wave current-limiting signals to all inverters through the interface boards corresponding to all the parallel inverters to trigger all the parallel inverters to simultaneously start the wave-by-wave current limitation;
the wave-chasing current-limiting control device comprises a plurality of input interfaces and a plurality of output interfaces, and each interface board is connected to one input interface and one output interface of the wave-chasing current-limiting control device; the wave-by-wave current-limiting control device enables all output interfaces to output non-preset levels only when all input interfaces are at the non-preset levels.
2. The parallel inverter system of claim 1, wherein the ripple current limit control device is connected to the master control module and comprises a micro control unit;
the micro control unit is used for receiving a first self-checking command issued by the main control module and sending a self-checking signal to each inverter according to the first self-checking command so that each inverter can execute self-checking operation;
the micro control unit also receives a first feedback signal returned after each inverter executes self-checking operation, and sends the first feedback signal to the main control module, so that the main control module controls the parallel control module, the inverters and the wave-by-wave current-limiting control device to start and operate when determining that each inverter has no fault according to the first feedback signal.
3. The parallel inverter system of claim 1, wherein the ripple-by-ripple current limit control device is connected to the master control module, and each of the inverters comprises a self-test module;
the self-checking module is used for receiving a second self-checking command sent by the main control module and starting self-checking operation according to the second self-checking command;
the self-checking module is further used for sending a second feedback signal to the main control module according to a self-checking operation result, so that the main control module controls the parallel control module, the inverters and the wave-by-wave current-limiting control device to start and operate when determining that all the inverters have no fault according to the second feedback signal.
4. The parallel inverter system of claim 2 or 3, wherein each of the interface boards is connected to the ripple-by-ripple current limit control device by an optical fiber.
5. The parallel inverter system of claim 4, wherein the ripple-by-ripple current limit control device comprises a field programmable gate array; the plurality of input interfaces and the plurality of output interfaces are located on the field programmable gate array; and the field programmable gate array enables all the output interfaces to output the non-preset level only when all the input interfaces are at the non-preset level.
6. A wave-by-wave current-limiting control method is applied to a parallel inverter system, the parallel inverter system comprises a main control module, a parallel machine control module and a plurality of inverters connected in parallel, each inverter comprises an interface board, each interface board is connected with the main control module through the parallel machine control module, and the interface board is used for generating a driving signal of the inverter where the interface board is located according to a PWM wave-sending instruction distributed by the parallel machine control module so as to control the switching action of a power unit in the inverter; the parallel inverter system is characterized by further comprising a wave-by-wave current limiting control device, interface boards of a plurality of inverters are respectively connected to the wave-by-wave current limiting control device, and each inverter has a wave-by-wave current limiting function; the wave-chasing current-limiting control device comprises a plurality of input interfaces and a plurality of output interfaces, and each interface board is connected to one input interface and one output interface of the wave-chasing current-limiting control device; the wave-by-wave current-limiting control device enables all output interfaces to output non-preset levels only when all input interfaces are at the non-preset levels; the method comprises the following steps:
when any inverter in the parallel inverter system triggers a wave-by-wave current limiting signal, the wave-by-wave current limiting signal is sent to the wave-by-wave current limiting control device through an interface board corresponding to the inverter;
when the wave-by-wave current limiting control device receives the wave-by-wave current limiting signals sent by any one inverter, the wave-by-wave current limiting control device simultaneously sends the wave-by-wave current limiting signals to all the inverters through the interface boards corresponding to all the parallel inverters to trigger all the parallel inverters to simultaneously start the wave-by-wave current limiting.
7. The wave-by-wave current-limiting control method according to claim 6, wherein the wave-by-wave current-limiting control device is connected to the main control module, and the method further comprises:
the wave-by-wave current limiting control device receives a first self-checking command issued by the main control module, and sends a self-checking signal to each inverter according to the first self-checking command, so that each inverter executes self-checking operation;
the wave-by-wave current-limiting control device receives a first feedback signal returned after each inverter executes self-checking operation, and sends the first feedback signal to the main control module, so that the main control module controls the parallel operation control module, the inverters and the wave-by-wave current-limiting control device to start and operate when determining that each inverter has no fault according to the first feedback signal.
8. The wave-by-wave current limiting control method according to claim 6, wherein the method comprises:
the master control module sends a second self-checking command to each inverter;
each inverter starts self-checking operation according to the second self-checking command and sends a second feedback signal to the main control module according to a self-checking operation result;
and the master control module controls the parallel machine control module, the inverters and the wave-by-wave current limiting control device to start and operate when determining that all the inverters have no fault according to the second feedback signal.
9. The wave-by-wave current limiting control method according to any one of claims 6-8, wherein each of the interface boards is connected to the wave-by-wave current limiting control device through an optical fiber.
10. The wave-by-wave current limiting control method according to any one of claims 6-8, characterized in that the wave-by-wave current limiting control device comprises a field programmable gate array; the plurality of input interfaces and the plurality of output interfaces are located on the field programmable gate array; and the field programmable gate array enables all the output interfaces to output the non-preset level only when all the input interfaces are at the non-preset level.
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| CN101588124A (en) * | 2008-05-23 | 2009-11-25 | 力博特公司 | Wave-chasing current-limiting control method of diode mid-point clamping multilevel converter |
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