CN109358695B - Load self-adaptive constant current source device - Google Patents
Load self-adaptive constant current source device Download PDFInfo
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- CN109358695B CN109358695B CN201811598180.2A CN201811598180A CN109358695B CN 109358695 B CN109358695 B CN 109358695B CN 201811598180 A CN201811598180 A CN 201811598180A CN 109358695 B CN109358695 B CN 109358695B
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- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
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- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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Abstract
The invention discloses a load self-adaptive constant current source device, which belongs to the technical field of electronic equipment and mainly structurally comprises a current setting module (1), an amplitude limiting setting module (2), a power output module (3), a load judging module (4), a time delay compensation module (5), a voltage tracking module (6), a power-off protection module (8) and the like. The invention can actively adapt to the change of the load during working and has the advantages of high efficiency, wide load adaptation range, high safety, high reliability and the like.
Description
Technical Field
The invention belongs to the technical field of electronic equipment. In particular to a load self-adaptive constant current source device.
Background
The constant current source has important application in many fields such as LED drive, laser drive, sensor drive, various glow discharge light source drive and the like. The basic principle of the constant current source circuit is to make the output current controlled by the control voltage by using the nonlinear characteristic of a triode or a field effect transistor and a deep negative feedback technology, and to keep the current flowing through the load constant when the load changes. In a constant current source circuit, the stability of the current and the efficiency of the circuit are two crucial parameters.
The closest prior art to the present invention is the chinese patent "a dual-loop feedback constant current source circuit" (application number: 201511008766.5) applied by the subject group 2015, 12, month 29, which adds a feedback loop based on the common constant current source, effectively improving the stability of the output current and the reliability of the circuit operation. However, as with other prior art constant current source circuits, this patent suffers from poor load compliance capability. Specifically, a constant current source circuit can only drive a fixed load, or only allow the load to change within a small range, when the load increases, the triode for controlling the current enters a saturation region, and then the maximum output current rapidly decreases (i.e. the constant current cannot be continuously and controllably output), and when the load decreases, the triode enters an undervoltage region (because the load is small, the voltage generated at two ends of the load is also small, and is called undervoltage in the field), because the triode and the load are in a series circuit, and the triode is a nonlinear device, the decrease of the load voltage causes the triode to automatically bear the redundant voltage of the circuit, and further causes the internal power consumption of the triode to sharply increase, and the internal power consumption of the triode belongs to a "by-product" of the circuit, which is harmful to the system and is not beneficial: on the one hand, the increase in power consumption of the tube causes a sharp rise in the temperature of the tube and increases the risk of tube burning (reduces the service life of the instrument), and on the other hand, the inability to adjust the power supply in time when the load changes results in a substantial reduction in the efficiency of the overall circuit, which is very disadvantageous when using a constant current source for mobile devices. When the system works on a mobile platform, efficiency is often an index which needs to be considered in an important way in order to ensure the endurance time of the system. In addition, the technical solution disclosed in the above patent does not have an overcurrent protection function, and once the current limiting module fails, the output current may exceed the limit current (generally, the maximum safe current), which may cause damage to the load or the instrument.
Further optimization of the existing constant current source technology is therefore needed.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a load adaptive constant current source device, which can automatically adjust the parameters of the circuit when the load impedance changes, so as to adapt to the impedance change of the load, maintain high efficiency, and have the function of overcurrent and power-off protection.
The specific technical scheme of the invention is as follows:
a load self-adaptive constant current source device structurally comprises a front panel 12, a current setting module 1, an amplitude limiting setting module 2, a power output module 3, a display driving module 9 and a power management module 11; the device is characterized by also comprising a reference voltage module 10, a load judgment module 4, a delay compensation module 5, a voltage tracking module 6, an overcurrent judgment module 7 and a power-off protection module 8; the current setting module 1 is connected with the amplitude limiting setting module 2, the amplitude limiting setting module 2 is also connected with the power output module 3 and the display driving module 9 respectively, the power output module 3 is connected with the display driving module 9, the load judging module 4 and the overcurrent judging module 7 respectively, the reference voltage module 10 is connected with the load judging module 4, the load judging module 4 is connected with the delay compensation module 5, the delay compensation module 5 is connected with the voltage tracking module 6, the voltage tracking module 6 is connected with the power output module 3, the overcurrent judging module 7 is connected with the power-off protection module 8, and the power-off protection module 8 is connected with the power output module 3 and the voltage tracking module 6 respectively; the power management module 11 can convert the commercial power alternating current into a direct current voltage circuit, and provides three direct current voltages of Vcc, Vcc/2 and Vdd for each module;
the structure of the amplitude limiting setting module 2 is as follows: one end of a resistor R42 is used as an input end of the amplitude limiting setting module 2 and is recorded as a port CL-in, the other end of the resistor R42 is connected with a non-inverting input end of an operational amplifier U11B and an anode of a diode D3, a cathode of the diode D3 is connected with an output end of an operational amplifier U10A and one end of a resistor R41, the other end of the resistor R41 is connected with an inverting input end of an operational amplifier U10A, the non-inverting input end of the operational amplifier U10A is connected with one end of a resistor R40, the other end of the resistor R40 is connected with a sliding end of a sliding rheostat W6, one end of the sliding rheostat W6 is connected with a power supply Vdd, the other end of the sliding rheostat is grounded, the inverting input end of the operational amplifier U11B is connected with one end of a resistor R43, the other end of the resistor R43 is connected with an output end of the operational amplifier U11B, an;
the structure of the power output module 3 is as follows: one end of a switch of the relay EK1 is used as a first input end of the power output module 3 and is recorded as a port PWR-in1, the other end is connected with a drain of the field effect transistor Q1 and is used as a first output end of the power output module 3 and is recorded as a port PWR-out1, one end of a coil of the relay EK1 is connected with a power supply Vdd, the other end is used as a second input end of the power output module 3 and is recorded as a port PWR-in2, a grid electrode of the field effect transistor Q1 is connected with an output end of the operational amplifier U1A, a source electrode is used as a second output end of the power output module 3 and is recorded as a port PWR-out2, one end of a resistor R1 is connected with a non-inverting input end of the operational amplifier U1A and is used as a third input end of the power output module 3 and is recorded as a port PWR-in3, the other end of a resistor R1 is used as a fourth, the inverting input end of the operational amplifier U1A is connected with one end of a capacitor C1 and one end of a resistor R2, the other end of the capacitor C1 is connected with the output end of the operational amplifier U1A, the other end of the resistor R2 is connected with one end of a sliding rheostat W1, the slide wire end of the sliding rheostat W1 and the output end of the operational amplifier U1B, the other end of the sliding rheostat W1 is connected with one end of a resistor R3, the other end of the resistor R3 is connected with the inverting input end of the operational amplifier U1B and one end of a resistor R4, the other end of the resistor R4 is grounded, the non-inverting input end of the operational amplifier U1B is connected with one end of a resistor Rs and serves as a third output end of the power output module 3 and is recorded as a port PWR-;
the load judgment module 4 has the following structure: the non-inverting input terminal of the operational amplifier U2A is used as the first input terminal of the load judging module 4, which is denoted as a port Vjdg-in1, and is connected to a port PWR-out1 of the power output module 3, the inverting input terminal of the operational amplifier U2A is connected to the output terminal of the operational amplifier U2A and one end of a resistor R5, the other end of the resistor R5 is connected to one end of a resistor R6 and the non-inverting input terminal of the operational amplifier U3A, the other end of the resistor R6 is grounded, the output terminal of the operational amplifier U3A is connected to one end of a resistor R8 and one end of a resistor R9, the other end of the resistor R8 is connected to the inverting input terminal of the operational amplifier U3A and one end of a resistor R7, the other end of the resistor R7 is connected to the inverting input terminal of the operational amplifier U2B and the output terminal of the operational amplifier U2B, the non-inverting input terminal of the operational amplifier U2B is used as the second input terminal of the load judging module 4, which is denoted as a port Vjdg-in2, and the non-inverting input terminal of the operational amplifier U3686, the other end of the resistor R10 is connected to the power supply Vcc/2, the output end of the operational amplifier U3B is connected to one end of the resistor R12 and serves as the output end of the load judgment module 4, which is recorded as the port Vjdg-out and is connected to the input end of the delay compensation module 5, the other end of the resistor R12 is connected to the inverting input end of the operational amplifier U3B and one end of R11, the other end of the resistor R11 is connected to the output end of the operational amplifier U4B and the inverting input end of the operational amplifier U4B, the non-inverting input end of the operational amplifier U4B is connected to the slider end of the sliding rheostat W2, one end of the sliding rheostat W2 is grounded, and the other end serves as the third input end of the load judgment module 4 and is recorded as the port Vjdg-in3 and;
the structure of the delay compensation module 5 is as follows: one end of the resistor R13 is connected to one end of the resistor R18, and serves as an input end of the delay compensation module 5, which is denoted as a port Vdly-in, and is connected to the port Vjdg-out of the load judgment module 4, the other end of the resistor R13 is connected to the inverting input end of the operational amplifier U4A and one end of the resistor R15, the non-inverting input end of the operational amplifier U4A is connected to one end of the resistor R14, the other end of the resistor R14 is connected to the power supply Vcc/2, the other end of the resistor R15 is connected to the output end of the operational amplifier U4A and one end of the resistor R16, the other end of the resistor R16 is connected to one end of the resistor R17, one end of the resistor R21 and the inverting input end of the operational amplifier U5A, the other end of the resistor R17 is connected to the output end of the operational amplifier U5A and serves as an output end of the delay compensation module 5, which is denoted as a port Vdly-out, which is connected to a second input end of the voltage, the other end of the resistor R22 is connected with a power supply Vcc/2, the other end of the resistor R21 is connected with one end of a resistor R20, one end of a capacitor C2 and the output end of the operational amplifier U5B, the other end of the resistor R20 is connected with the other end of a capacitor C2, the inverting input end of the operational amplifier U5B and the other end of the resistor R18, one end of the resistor R19 is connected with the non-inverting input end of the operational amplifier U5B, and the other end of the resistor R19 is connected with Vcc/2;
the structure of the voltage tracking module 6 is that one end of a resistor R23 is connected with a power supply Vcc/2, the other end of the resistor R23 is connected with the reverse input end of an operational amplifier U6A, the non-inverting input end of the operational amplifier U6A is connected with one end of a resistor R24 and one end of a resistor R25, the other end of the resistor R24 is connected with the output end of an operational amplifier U6A, the other end of a resistor R25 is connected with the output end of an operational amplifier U6B, one end of a resistor R26 is connected with the output end of an operational amplifier U6A, and the other end of the resistor R26 is connected with the reverse; one end of the resistor R27 is connected with the equidirectional input end of the operational amplifier U6B, and the other end is connected with a power supply Vcc/2; one end of a capacitor C3 and one end of a resistor R28 are connected with the reverse input end of the operational amplifier U6B, the other end of the capacitor C3 is connected with the output end of the operational amplifier U6B, the output end of the operational amplifier U6B is connected with one end of a resistor R29, the other end of the resistor R29 is connected with the non-inverting input end of the operational amplifier U7A, and the non-inverting input end of the resistor R29 is used as the first input end of the voltage tracking module 6, is recorded as a port Vflw-in1, and is connected with the second output end; one end of the resistor R30 is connected with the inverting input end of the operational amplifier U7A, the other end of the resistor R30 is used as the second input end of the voltage tracking module 6, is marked as a port Vflw-in2, and is connected with a port Vdly-out of the delay compensation module 5; one end of the resistor R31 is connected with the reverse input end of the operational amplifier U7A, and the other end is connected with a power supply Vcc/2; the output end of the operational amplifier U7A is connected with the grid of a field effect transistor Q2, the drain of a field effect transistor Q2 is connected with a power supply Vcc, the source is connected with one end of an inductor L1 and the cathode of a diode D1, the anode of a diode D1 is grounded, the other end of the inductor L1 is connected with the anode of an electrolytic capacitor C4, the anode of the electrolytic capacitor C5, one end of a capacitor C6 and one end of a capacitor C7, and is used as the output end of the voltage tracking module 6, recorded as a port Vflw-out and connected with a port PWR-in1 of the power output module 3; the negative electrode of the electrolytic capacitor C4, the negative electrode of the electrolytic capacitor C5, the other end of the capacitor C6 and the other end of the capacitor C7 are all grounded;
the structure of the over-current judgment module 7 is that the equidirectional input end of the operational amplifier U9A is used as the input end of the over-current judgment module 7, is marked as a port OC-in, and is connected with a port PWR-out3 of the power output module 3; one end of the resistor R35 is connected with the reverse input end of the operational amplifier U9A, and the other end is grounded; one end of the resistor R36 is connected with the reverse input end of the operational amplifier U9A, and the other end is connected with one end of the slide rheostat W3; the other end and the slide wire end of the slide rheostat W3 are connected with the output end of the operational amplifier U9A and the equidirectional input end of the operational amplifier U9B; one end of the slide rheostat W4 is connected with a power supply Vdd, the other end of the slide rheostat W4 is grounded, and a slide wire end is connected with the reverse input end of the operational amplifier U9B; the output end of the operational amplifier U9B is used as the output end of the overcurrent judgment module 7, is recorded as a port OC-out, and is connected with the input end of the power-off protection module 8;
the power-off protection module 8 is structurally characterized in that two input ends of a nand gate U8A are connected and are recorded as a port BRK-in, the port BRK-in serves as an input end of the power-off protection module 8 and is connected with an output end of the overcurrent judging module 7, an output end of the nand gate U8A is connected with one input end of a nand gate U8B, the other input end of the nand gate U8B is connected with an output end of a nand gate U8C, an output end of the nand gate U8B is connected with one input end of a nand gate U8C and a grid of a field effect transistor Q3, the other input end of the nand gate U8C is connected with one end of a capacitor C8 and one end of a resistor R33, the other end of the resistor R33 is connected with one end of a switch K1 and one end of a resistor R32, the other; the source electrode of the field effect transistor Q3 is grounded, one end of the resistor R34 is used as a first output end of the power-off protection module 8 and is recorded as a port BRK-out1, and is connected with a port PWR-in2 of the power output module 3, the other end of the resistor R34 is connected with the drain electrode of the field effect transistor Q3 and is used as a second output end of the power-off protection module 8 and is recorded as a port BRK-out2, and the port BRK-out2 is simultaneously connected with the port PWR-in3 of the power output module 3 and a port Vflw-in1 of the voltage tracking module 6;
the display driving module 9 has a structure that one end of a resistor R44 is grounded, the other end of the resistor R44 is connected with one end of a resistor R45 and the inverting input end of an operational amplifier U11A, the other end of the resistor R45 is connected with one fixed end of a sliding rheostat W7, the non-inverting input end of the operational amplifier U11A is used as one input end of the display driving module 9, which is recorded as a port DIS-in1 and is connected with the output end of a clipping setting module 2 for sampling the current limiting value set by the clipping setting module 2, the output end of the operational amplifier U11A is connected with the sliding terminal of the sliding rheostat W7 and one selection end of a switch SW1, one end of a resistor R46 is grounded, the other end of the resistor R47 is connected with the inverting input end of an operational amplifier U12B, the other end of the resistor R47 is connected with one fixed end of a sliding rheostat W8, the non-inverting input end of the operational amplifier U12B is used as the other input end of the display driving, the current value for sampling the actual output of the power output module 3, the output end of the operational amplifier U12B is connected to the sliding terminal of the sliding rheostat W8 and the other selection end of the switch SW1, the negative power end of the operational amplifier U12B is connected to the power supply Vdd, the positive power end is grounded, the common end of the switch SW1 is used as the output end of the display driving module 9, which is marked as DIS-out, and is connected to the signal input end of the digital meter head 123 in the front panel 12, the anode of the light emitting diode D4 is connected to the power supply Vdd, the cathode of the light emitting diode D5 is connected to one selection end of the switch SW2, the anode of the light emitting diode D5 is connected to the power supply Vdd, the cathode of the light emitting diode D is connected to the other selection end of the switch;
the structure of the reference voltage module 10 is as follows: one end of the resistor R49 is connected with a power supply Vcc, the other end of the resistor R49 is connected with the cathode of the voltage-stabilizing diode D6 and one end of the slide rheostat W9, the anode of the voltage-stabilizing diode D6 and the other end of the slide rheostat W9 are grounded, the slide wire end of the slide rheostat W9 is connected with the non-inverting input end of the operational amplifier U7B, the inverting input end of the operational amplifier U7B is connected with the output end of the operational amplifier U7B and serves as the output end of the reference voltage module 10, which is recorded as a port Vref-out and is connected with a port Vjdg-in3 of the;
the structure of the front panel 12 includes: display select 121, power switch 122, digital header 123, limit current indicator 124, output current indicator 125, limit setting 126, current setting 127, reset button 128, current output port 129.
In the load adaptive constant current source device of the invention, the power supply Vcc/2 and the power supply Vdd are respectively preferably 48V, 24V and 5V.
In the load adaptive constant current source apparatus of the present invention, the circuit parameters of the delay compensation module 5 are preferably as follows: the resistors R13 and R14 are 4K, R15 is 40K, R16 and R21 are 20K, R17 and R20 are 10K, R18 and R19 are 1K, R22 is 5.1K, and the capacitor C2 is 5 PF.
Has the advantages that:
1. the load judgment module, the delay compensation module and the voltage tracking module are cooperatively operated to realize the self-adaption of the current source to the load impedance, so that the device can safely, stably and efficiently work when the load impedance is changed in a large range.
2. When the load judgment module is designed, a special nondestructive testing technology is adopted, and the effective judgment of the load change is realized on the premise of not influencing the output current of the power output module and the actual load.
3. The power supply circuit has the overcurrent power-off protection function, when the output current exceeds the preset safety value, the power supply circuit of the power output module is quickly cut off, and meanwhile, the control signals of the power output module and the voltage tracking module are all locked to be 0, so that the multi-directional protection of the system is realized, and the safety of the system is greatly improved.
4. The power-off protection adopts a one-way trigger mechanism, once the power-off protection is triggered, the current can be normally output only by manual reset after the fault is eliminated, so that the power-off protection module is prevented from repeatedly acting near a safety value, and the safety of the system is further improved.
Drawings
Fig. 1 is a schematic view of the overall structure of the present invention.
Fig. 2 is a schematic diagram of a front panel layout of the present invention.
Fig. 3 is a schematic diagram of the current setting module 1 of the present invention.
Fig. 4 is a schematic diagram of the clipping setting module 2 of the present invention.
Fig. 5 is a schematic diagram of the power output module 3 of the present invention.
Fig. 6 is a schematic diagram of the load judgment module 4 of the present invention.
Fig. 7 is a schematic diagram of the delay compensation module 5 of the present invention.
Fig. 8 is a schematic diagram of the voltage tracking module 6 of the present invention.
Fig. 9 is a schematic diagram of the overcurrent determination module 7 of the present invention.
Fig. 10 is a schematic diagram of the power down protection module 8 of the present invention.
Fig. 11 is a schematic diagram of the display driving module 9 of the present invention.
Fig. 12 is a schematic diagram of the reference voltage module 10 of the present invention.
Detailed Description
The operation of the present invention will be further explained by the following embodiments, and the parameters shown in the drawings are the preferred parameters selected by the embodiments, not limiting the scope of the present patent.
EXAMPLE 1 Overall Structure of the invention
The overall structure of the invention is shown in figure 1, and comprises a current setting module 1, an amplitude limiting setting module 2, a power output module 3, a load judgment module 4, a delay compensation module 5, a voltage tracking module 6, an overcurrent judgment module 7, a power-off protection module 8, a display driving module 9, a reference voltage module 10, a power management module 11 and a front panel 12; the current setting module 1 is connected with the amplitude limiting setting module 2, the amplitude limiting setting module 2 is also connected with the power output module 3 and the display driving module 9 respectively, the power output module 3 is connected with the display driving module 9, the load judging module 4 and the overcurrent judging module 7 respectively, the reference voltage module 10 is connected with the load judging module 4, the load judging module 4 is connected with the delay compensation module 5, the delay compensation module 5 is connected with the voltage tracking module 6, the voltage tracking module 6 is connected with the power output module 3, the overcurrent judging module 7 is connected with the power-off protection module 8, and the power-off protection module 8 is connected with the power output module 3 and the voltage tracking module 6 respectively; the power management module 11 can convert the commercial power ac into dc voltage, and provides three dc voltages of Vcc, Vcc/2, and Vdd for each module.
Example 2 current setting Module of the invention
The current setting module 1 of the present invention belongs to the prior art, can be designed conventionally according to actual requirements, and can also adopt a structure as shown in fig. 3, wherein one end of the resistor R37 is connected to the power supply Vdd, the other end is connected to the cathode of the zener diode D2 and one fixed end of the sliding rheostat W5, the anode of the zener diode D2 is grounded, the other fixed end of the sliding rheostat W5 is grounded, one end of the resistor R38 is connected to the sliding terminal of the sliding rheostat W5, the other end is connected to the non-inverting input end of the operational amplifier U10B, the inverting input end of the operational amplifier U10B is connected to one end of the resistor R39, the other end of the resistor R39 is connected to the output end of the operational amplifier U10B, and serves as the output end of the current setting module 1, and.
Where the sliding varistor W5 is located on the front panel 12, which is the current setting 127 in the front panel 12, the output voltage of the current setting module can be controlled by changing the sliding varistor W5, which ultimately affects the output current of the power output module 3.
The amplitude limiting setting module 2 of the present invention belongs to the prior art, and can be designed conventionally according to actual requirements, or the structure provided by this embodiment can be adopted, as shown in fig. 4, one end of a resistor R42 is used as the input end of the amplitude limiting setting module 2, and is recorded as a port CL-in, the other end is connected to the non-inverting input end of the operational amplifier U11B and the anode of the diode D3, the cathode of the diode D3 is connected to the output end of the operational amplifier U10A and one end of the resistor R41, the other end of the resistor R41 is connected to the inverting input end of the operational amplifier U10A, the non-inverting input end of the operational amplifier U10A is connected to one end of a resistor R40, the other end of the resistor R40 is connected to the sliding end of a sliding rheostat W6, one end of the sliding rheostat W6 is connected to Vdd, the other end is grounded, the inverting input end of the operational amplifier U11 is connected to one end of a resistor R43, the other end of the resistor, denoted as port CL-out, is connected to port PWR-in4 of the power output module 3.
The slide rheostat W6 is located on the front panel 12 and is the amplitude limiting setting 126 in the front panel 12, a safe amplitude limiting value (depending on the load parameter to be driven) can be set by changing the slide rheostat W6, when the voltage output by the current setting module 1 is smaller than the amplitude limiting value, the control voltage output to the power output module 3 through the amplitude limiting setting module 2 is equal to the voltage output by the current setting module 1 (the amplitude is not changed), and when the voltage output by the current setting module 1 is larger than the amplitude limiting value, the control voltage output to the power output module 3 is limited to the amplitude limiting value and is not controlled by the current setting module 1, so that the current value output by the power output module is limited to a fixed value and is not further improved by the current setting module 1. The invention realizes the current-limiting control of the output by limiting the control voltage, and has simple and reliable structure and small power loss.
As shown in fig. 5, one end of a switch of the relay EK1 is used as a first input end of the power output module 3 and is denoted as a port PWR-in1, the other end of the switch is connected with a drain of the fet Q1 and is denoted as a port PWR-out1, one end of a coil of the relay EK1 is connected with a power supply Vdd, the other end of the switch is used as a second input end of the power output module 3 and is denoted as a port PWR-in2, a gate of the fet Q1 is connected with an output end of the operational amplifier U1A, a source is used as a second output end of the power output module 3 and is denoted as a port PWR-out2, one end of the resistor R1 is connected with a non-inverting input end of the operational amplifier U1A and is used as a third input end of the power output module 3 and is denoted as a port PWR-in3, and the other end of the resistor R1 is used as a fourth input end of the power, the output end of the operational amplifier U1A is marked as a port PWR-in4, the inverting input end of the operational amplifier U1A is connected with one end of a capacitor C1 and one end of a resistor R2, the other end of the capacitor C1 is connected with the output end of the operational amplifier U1A, the other end of the resistor R2 is connected with one end of a sliding varistor W1, the sliding terminal of the sliding varistor W1 and the output end of the operational amplifier U1B, the other end of the sliding varistor W1 is connected with one end of a resistor R3, the other end of the resistor R3 is connected with the inverting input end of the operational amplifier U1B and one end of a resistor R4, the other end of the resistor R4 is grounded, the non-inverting input end of the operational amplifier U1B is connected with one end of a resistor Rs and serves as a third output end of the power output module.
The power output module 3 converts the voltage into a corresponding output current under the control of the voltage output by the amplitude limiting setting module 2, and outputs the output current to the load through the current output port 123 of the front panel 12.
As shown in fig. 6, a non-inverting input terminal of the operational amplifier U2A is taken as a first input terminal of the load determination module 4, which is denoted as a port Vjdg-in1, and is connected to a port PWR-out1 of the power output module 3, an inverting input terminal of the operational amplifier U2A is connected to an output terminal of the operational amplifier U2A and one end of a resistor R5, the other end of the resistor R5 is connected to one end of a resistor R6 and the non-inverting input terminal of the operational amplifier U3A, the other end of the resistor R6 is grounded, an output terminal of the operational amplifier U3A is connected to one end of a resistor R8 and one end of a resistor R9, the other end of the resistor R8 is connected to an inverting input terminal of the operational amplifier U3A and one end of the resistor R7, the other end of the resistor R7 is connected to an inverting input terminal of the operational amplifier U2B and an output terminal of the operational amplifier U2B, an non-inverting input terminal of the operational amplifier U2 5 is taken as a second input terminal of the load determination module 4, which is denoted as a non-inverting input terminal of, the other end of the resistor R9 is connected to one end of the resistor R10 and the non-inverting input terminal of the operational amplifier U3B, the other end of the resistor R10 is connected to the power supply Vcc/2, the output terminal of the operational amplifier U3B is connected to one end of the resistor R12 and serves as the output terminal of the load determination module 4, which is denoted as a port Vjdg-out, and is connected to the input terminal of the delay compensation module 5, the other end of the resistor R12 is connected to the inverting input terminal of the operational amplifier U3B and one end of the resistor R11, the other end of the resistor R11 is connected to the output terminal of the operational amplifier U4B and the inverting input terminal of the operational amplifier U4B, the non-inverting input terminal of the operational amplifier U4B is connected to the slider terminal of the slider varistor W2, one end of the slider varistor W2 is grounded, and the other end serves as the third input terminal of the load determination module 4, which is.
When the load driven by the present invention changes, because the output of the present invention is a constant current, the voltage at both ends of the load changes, and the field effect transistor in the power output module 3 will adjust the voltage shared by itself due to its non-linear characteristic, so the load judgment module 4 detects the voltage change at both ends of the field effect transistor Q1 (i.e. the ports PWR-out1 and PWR-out2 in the power output module 3) through the ports Vjdg-in1 and Vjdg-in2 to realize the judgment of the load change: when the load is increased, the voltage across the load is increased, and further the voltage across the Q1 is decreased; when the load becomes smaller, the voltage across the load becomes smaller, and the voltage across the Q1 becomes larger. Because the Q1 and the load are in the same output loop, the stability of the current output to the load can be influenced by the small change of the current flowing through the Q1, so the current flowing through the Q1 cannot be influenced as much as possible when the voltage at two ends of the Q1 is detected. The detected voltage across Q1 is compared against the reference voltage at port Vjdg-in3 (from reference voltage block 10) to determine the amount of voltage to be adjusted by the subsequent voltage tracking block.
The principle circuit of the reference voltage module 10 is shown in fig. 12, wherein one end of a resistor R49 is connected to a power supply Vcc, the other end is connected to the cathode of a zener diode D6 and one end of a sliding varistor W9, the anode of the zener diode D6 and the other end of the sliding varistor W9 are grounded, the slider end of the sliding varistor W9 is connected to the non-inverting input end of an operational amplifier U7B, the inverting input end of the operational amplifier U7B is connected to the output end of the operational amplifier U7B, and serves as the output end of the reference voltage module 10, which is recorded as a port Vref-out, and is connected to a port Vjdg-in3 of the load determination module 4.
Because the inductance and capacitance network in the voltage tracking module 6 at the later stage has a delay effect, a certain delay inevitably occurs when the load judgment module 4 detects the change of the load and finally the voltage tracking module 6 performs adaptive adjustment, so the invention adopts a delay compensation design, eliminates the delay through the delay compensation module 5, and ensures that the voltage adaptive adjustment of the voltage tracking module 6 and the detection of the load judgment module 4 are completely in synchronous work so as to realize accurate and effective control. The principle circuit of the delay compensation module 5 is shown in fig. 7, wherein one end of a resistor R13 is connected to one end of a resistor R18, and serves as an input end of the delay compensation module 5, which is denoted as a port Vdly-in, and is connected to a port Vjdg-out of the load determination module 4, the other end of a resistor R13 is connected to an inverting input end of an operational amplifier U4A and one end of a resistor R15, a non-inverting input end of the operational amplifier U4A is connected to one end of a resistor R14, the other end of the resistor R14 is connected to power Vcc/2, the other end of the resistor R15 is connected to an output end of an operational amplifier U4A and one end of a resistor R16, the other end of a resistor R16 is connected to one end of the resistor R17, one end of the resistor R21 and the inverting input end of the operational amplifier U5A, the other end of the resistor R17 is connected to an output end of an operational amplifier U5 vd 5A, which serves as an output end of the delay compensation module 5, which is, the non-inverting input end of the operational amplifier U5A is connected with one end of a resistor R22, the other end of the resistor R22 is connected with a power supply Vcc/2, the other end of the resistor R21 is connected with one end of a resistor R20, one end of a capacitor C2 and the output end of the operational amplifier U5B, the other end of the resistor R20 is connected with the other end of the capacitor C2, the inverting input end of the operational amplifier U5B and the other end of the resistor R18, one end of the resistor R19 is connected with the non-inverting input end of the operational amplifier U5B, and the other end of the resistor R63.
A principle circuit of the voltage tracking module 6 is shown in fig. 8, wherein one end of a resistor R23 is connected to a power Vcc/2, the other end of the resistor R23 is connected to an inverting input terminal of an operational amplifier U6A, a non-inverting input terminal of the operational amplifier U6A is connected to one end of a resistor R24 and one end of a resistor R25, the other end of a resistor R24 is connected to an output terminal of an operational amplifier U6A, the other end of a resistor R25 is connected to an output terminal of an operational amplifier U6B, one end of a resistor R26 is connected to an output terminal of an operational amplifier U6A, and the other end of the resistor R24 is connected to an; one end of the resistor R27 is connected with the equidirectional input end of the operational amplifier U6B, and the other end is connected with a power supply Vcc/2; one end of a capacitor C3 and one end of a resistor R28 are connected with the reverse input end of the operational amplifier U6B, the other end of the capacitor C3 is connected with the output end of the operational amplifier U6B, the output end of the operational amplifier U6B is connected with one end of a resistor R29, the other end of the resistor R29 is connected with the non-inverting input end of the operational amplifier U7A, and the non-inverting input end of the resistor R29 is used as the first input end of the voltage tracking module 6, is recorded as a port Vflw-in1, and is connected with the second output end; one end of the resistor R30 is connected with the inverting input end of the operational amplifier U7A, the other end of the resistor R30 is used as the second input end of the voltage tracking module 6, is marked as a port Vflw-in2, and is connected with a port Vdly-out of the delay compensation module 5; one end of the resistor R31 is connected with the reverse input end of the operational amplifier U7A, and the other end is connected with a power supply Vcc/2; the output end of the operational amplifier U7A is connected with the grid of a field effect transistor Q2, the drain of a field effect transistor Q2 is connected with a power supply Vcc, the source is connected with one end of an inductor L1 and the cathode of a diode D1, the anode of a diode D1 is grounded, the other end of the inductor L1 is connected with the anode of an electrolytic capacitor C4, the anode of the electrolytic capacitor C5, one end of a capacitor C6 and one end of a capacitor C7, and is used as the output end of the voltage tracking module 6, recorded as a port Vflw-out and connected with a port PWR-in1 of the power output module 3; the negative electrode of the electrolytic capacitor C4, the negative electrode of the electrolytic capacitor C5, the other end of the capacitor C6 and the other end of the capacitor C7 are all grounded.
The voltage tracking module 6 automatically adjusts the voltage Vcc provided by the power management module 11 and outputs the adjusted voltage Vcc to the port PWR-in1 of the power output module 3, which is used as the power voltage of the current output loop of the power output module 3, and the voltage will follow the change of the load, when the load changes, the voltage at the port PWR-in1 will not be redundant due to the reduction of the load and will not be insufficient due to the increase of the load, and always works in a "critical state", thereby ensuring the maximum efficiency of the whole system.
Embodiment 9 an overcurrent determination module according to the present invention
As shown in fig. 9, a principle circuit of the over-current determining module 7 is that a same-direction input end of an operational amplifier U9A is used as an input end of the over-current determining module 7, is marked as a port OC-in, and is connected with a port PWR-out3 of the power output module 3; one end of the resistor R35 is connected with the reverse input end of the operational amplifier U9A, and the other end is grounded; one end of the resistor R36 is connected with the reverse input end of the operational amplifier U9A, and the other end is connected with one end of the slide rheostat W3; the other end and the slide wire end of the slide rheostat W3 are connected with the output end of the operational amplifier U9A and the equidirectional input end of the operational amplifier U9B; one end of the slide rheostat W4 is connected with a power supply Vdd, the other end of the slide rheostat W4 is grounded, and a slide wire end is connected with the reverse input end of the operational amplifier U9B; the output end of the operational amplifier U9B is used as the output end of the overcurrent judgment module 7, is recorded as the port OC-out, and is connected with the input end of the power-off protection module 8.
The module detects the current value outputted by the power output module in real time, compares the detected current value with a set safety value (set by a slide rheostat W4 in the figure), and outputs an overcurrent signal through a port OC-out when the actually outputted current exceeds the set safety value, so as to trigger the power-off protection module 8 to perform the power-off action.
The principle circuit of the power-off protection module 8 of the invention is shown in fig. 10, two input ends of a nand gate U8A are connected and are recorded as a port BRK-in, which is used as the input end of the power-off protection module 8 and is connected with the output end of the overcurrent judgment module 7, the output end of the nand gate U8A is connected with one input end of a nand gate U8B, the other input end of the nand gate U8B is connected with the output end of a nand gate U8C, the output end of the nand gate U8B is connected with one input end of a nand gate U8C and the gate of a field effect transistor Q3, the other input end of the nand gate U8C is connected with one end of a capacitor C8 and one end of a resistor R33, the other end of the resistor R33 is connected with one end of a switch K1 and one end of a resistor R32, the other; the source of the field effect transistor Q3 is grounded, one end of the resistor R34 is used as a first output end of the power-off protection module 8, which is recorded as a port BRK-out1 and is connected with a port PWR-in2 of the power output module 3, the other end of the resistor R34 is connected with the drain of the field effect transistor Q3 and is used as a second output end of the power-off protection module 8, which is recorded as a port BRK-out2, and the port BRK-out2 is simultaneously connected with the port PWR-in3 of the power output module 3 and a port Vflw-in1 of the voltage tracking module 6.
The module monitors an overcurrent signal of the overcurrent judgment module 7, when the overcurrent signal is effective (high level), a power-off action is triggered, namely, the field effect transistor Q3 is controlled to be switched on, the port BRK-out1 is connected with the port PWR-in2 in the power output module 3, the relay EK1 in the power output module 3 is triggered to switch off the switch, and an energy source in an output current loop is cut off; and the port BRK-out2 is simultaneously connected with the port PWR-in3 of the power output module 3 and the port Vflw-in1 of the voltage tracking module 6, so that the voltages at the port PWR-in3 and the port Vflw-in1 are simultaneously limited to 0, and the control voltages of the power output module 3 and the voltage tracking module 6 are cut off, thereby further improving the effectiveness and safety of power failure. Meanwhile, the power-off protection module 8 also adopts a one-way irreversible triggering mode, once the power-off action is triggered by the occurrence of the power-off signal, even if the power-off signal disappears, the power-off state is not immediately released, but the power-off state can be released only by manually pressing the switch K1 (namely, the reset button 128 on the front panel 12), so as to prevent the triggering signal from being repeatedly triggered near the critical point of the safety value.
The principle circuit of the display driving module 9 is shown in fig. 11, wherein one end of a resistor R44 is grounded, the other end is connected to one end of a resistor R45 and the inverting input end of an operational amplifier U11A, the other end of a resistor R45 is connected to one fixed end of a sliding rheostat W7, the non-inverting input end of an operational amplifier U11A is used as one input end of the display driving module 9, which is denoted as a port DIS-in1, and is connected to the output end of a clipping setting module 2 for sampling the current limiting value set by the clipping setting module 2, the output end of an operational amplifier U11A is connected to the sliding rheostat W7 and one selection end of a switch SW1, one end of a resistor R46 is grounded, the other end is connected to one end of a resistor R47 and the inverting input end of an operational amplifier U12B, the other end of a resistor R38 is connected to one fixed end of a sliding rheostat W8, the non-inverting input end of an operational amplifier U12 is used as the other input end of the display driving module 9, which, the current value for sampling the actual output of the power output module 3, the output terminal of the operational amplifier U12B is connected to the sliding terminal of the sliding rheostat W8 and the other selection terminal of the switch SW1, the negative power terminal of the operational amplifier U12B is connected to the power supply Vdd, the positive power terminal is grounded, the common terminal of the switch SW1 is used as the output terminal of the display driving module 9, which is denoted as DIS-out, and is connected to the signal input terminal of the digital meter 123 in the front panel 12, the anode of the light emitting diode D4 is connected to the power supply Vdd, the cathode of the light emitting diode D5 is connected to the selection terminal of the switch SW2, the common terminal of the switch SW2 is connected to one terminal of the resistor R48, and the other terminal of the resistor R48 is grounded.
The display driving module 9 provides the driving and selecting of the display signal for the front panel, wherein the switch SW1 and the switch SW2 form a double-pole double-throw switch, i.e. the display selection 121 in the front panel 12, and the switch can select "limit current" or "actual output current" to be sent to the digital header 123 for display.
EXAMPLE 12 front panel of the invention
The structure of the front panel 12 is shown in fig. 2, and includes: display select 121, power switch 122, digital header 123, limit current indicator 124, output current indicator 125, limit setting 126, current setting 127, current output port 129, reset button 128.
The display selection 121 is a double-pole double-throw switch composed of switches SW1 and SW2 in the display driving module 9, and is used for controlling the digital meter head 123 to display the limited current or the actual output current, the power switch 122 is a main power switch of the whole device, the digital meter head 123 is a digital voltmeter, the signal input end of the digital voltmeter is connected with the port DIS-out of the display driving module 9, the limited current indicator light 124 and the output current indicator light 125 are two light emitting diodes, namely, light emitting diodes D4 and D5 in the display driving module 9, and are used for indicating whether the digital meter head 123 currently displays the limited current or the actual output current, the limiting setting 126 and the current setting 127 are knob type sliding varistors with resistance values of 100k Ω, namely, a sliding rheostat W6 in the sliding rheostat setting module 2 and a sliding rheostat W5 in the current setting module 1, the current output port 129 is a two-phase interface, the positive pole and the negative pole are respectively connected with the port PWR-out2 and the port PWR-out3 in the power output module 3, and are used for outputting the driving current generated by the device to the laser diode needing to be driven, and the reset button 128 is a switch K1 in the power-off protection module 8.
Claims (3)
1. A load self-adaptive constant current source device structurally comprises a front panel (12), a current setting module (1), an amplitude limiting setting module (2), a power output module (3), a display driving module (9) and a power management module (11); the device is characterized by also comprising a reference voltage module (10), a load judgment module (4), a delay compensation module (5), a voltage tracking module (6), an overcurrent judgment module (7) and a power-off protection module (8); the current setting module (1) is connected with the amplitude limiting setting module (2), the amplitude limiting setting module (2) is further connected with the power output module (3) and the display driving module (9) respectively, the power output module (3) is connected with the display driving module (9), the load judging module (4) and the overcurrent judging module (7) respectively, the reference voltage module (10) is connected with the load judging module (4), the load judging module (4) is connected with the delay compensation module (5), the delay compensation module (5) is connected with the voltage tracking module (6), the voltage tracking module (6) is connected with the power output module (3), the overcurrent judging module (7) is connected with the power-off protection module (8), and the power-off protection module (8) is connected with the power output module (3) and the voltage tracking module (6) respectively; the power management module (11) can convert commercial power alternating current into a circuit of direct current voltage, and provides three direct current voltages of Vcc, Vcc/2 and Vdd for each module;
the structure of the amplitude limiting setting module (2) is as follows: one end of a resistor R42 is used as an input end of the amplitude limiting setting module (2) and is recorded as a port CL-in, the other end of the resistor R42 is connected with a non-inverting input end of an operational amplifier U11B and an anode of a diode D3, a cathode of the diode D3 is connected with an output end of an operational amplifier U10A and one end of a resistor R41, the other end of the resistor R41 is connected with an inverting input end of an operational amplifier U10A, a non-inverting input end of the operational amplifier U10A is connected with one end of a resistor R40, the other end of the resistor R40 is connected with a sliding end of a sliding rheostat W6, one end of the sliding rheostat W6 is connected with a power supply, the other end of the sliding rheostat W is grounded, the inverting input end of the operational amplifier U11B is connected with one end of a resistor R43, the other end of the resistor R43 is connected with an output end of the operational amplifier U11B, an output end of the;
the structure of the power output module (3) is as follows: one end of a switch of the relay EK1 is used as a first input end of the power output module (3) and is recorded as a port PWR-in1, the other end is connected with a drain of the field effect transistor Q1 and is used as a first output end of the power output module (3) and is recorded as a port PWR-out1, one end of a coil of the relay EK1 is connected with a power supply Vdd, the other end is used as a second input end of the power output module (3) and is recorded as a port PWR-in2, a grid electrode of the field effect transistor Q1 is connected with an output end of the operational amplifier U1A, a source electrode is used as a second output end of the power output module (3) and is recorded as a port PWR-out2, one end of a resistor R1 is connected with a non-inverting input end of the operational amplifier U1A and is used as a third input end of the power output module (3) and is recorded as a port PWR-in3, the other end of the resistor R, the output end of the amplitude limiting setting module (2) is connected, the inverting input end of the operational amplifier U1A is connected with one end of a capacitor C1 and one end of a resistor R2, the other end of the capacitor C1 is connected with the output end of the operational amplifier U1A, the other end of a resistor R2 is connected with one end of a sliding rheostat W1, the sliding wire end of the sliding rheostat W1 and the output end of the operational amplifier U1B, the other end of the sliding rheostat W1 is connected with one end of a resistor R3, the other end of the resistor R3 is connected with the inverting input end of the operational amplifier U1B and one end of a resistor R4, the other end of the resistor R4 is grounded, the non-inverting input end of the operational amplifier U1B is connected with one end of a resistor Rs and serves as the third output end of the power output module (3) and is recorded as a;
the load judgment module (4) has the structure that: the non-inverting input terminal of the operational amplifier U2A is used as the first input terminal of the load judging module (4) and is recorded as a port Vjdg-in1, and is connected with a port PWR-out1 of the power output module (3), the inverting input terminal of the operational amplifier U2A is connected with the output terminal of the operational amplifier U2A and one end of a resistor R5, the other end of the resistor R5 is connected with one end of a resistor R6 and the non-inverting input terminal of the operational amplifier U3A, the other end of the resistor R6 is grounded, the output terminal of the operational amplifier U3A is connected with one end of a resistor R8 and one end of a resistor R9, the other end of the resistor R6329 is connected with the inverting input terminal of the operational amplifier U3A and one end of the resistor R7, the other end of the resistor R7 is connected with the inverting input terminal of the operational amplifier U2B and the output terminal 57348, the non-inverting input terminal of the operational amplifier U2 465 is used as the second input terminal of the load judging module (4), and is recorded as a port Vjdg-in2, the other end of the resistor R9 is connected with one end of the resistor R10 and the non-inverting input end of the operational amplifier U3B, the other end of the resistor R10 is connected with a power supply Vcc/2, the output end of the operational amplifier U3B is connected with one end of the resistor R12 and serves as the output end of the load judgment module (4) and is recorded as a port Vjdg-out, the output end of the load judgment module (4) is connected with the input end of the delay compensation module (5), the other end of the resistor R12 is connected with the inverting input end of the operational amplifier U3B and one end of the resistor R11, the other end of the resistor R11 is connected with the output end of the operational amplifier U4B and the inverting input end of the operational amplifier U4B, the non-inverting input end of the operational amplifier U4B is connected with the sliding terminal of the sliding rheostat W2, one end of the sliding rheostat W2 is grounded, the other end of the load judgment module (4) serves;
the structure of the delay compensation module (5) is as follows: one end of a resistor R13 is connected with one end of a resistor R18, the resistor R13 is used as an input end of a delay compensation module (5) and is recorded as a port Vdly-in and is connected with a port Vjdg-out of a load judging module (4), the other end of the resistor R13 is connected with an inverting input end of an operational amplifier U4A and one end of a resistor R15, a non-inverting input end of the operational amplifier U4A is connected with one end of a resistor R14, the other end of the resistor R14 is connected with a power supply Vcc/2, the other end of the resistor R15 is connected with an output end of the operational amplifier U4A and one end of a resistor R16, the other end of the resistor R16 is connected with one end of a resistor R17, one end of a resistor R21 and an inverting input end of the operational amplifier U5A, the other end of the resistor R17 is connected with an output end of the operational amplifier U5A and is used as an output end of the delay compensation module (5) and is recorded as a port Vd-out and is connected with a second input end of a second input, the other end of the resistor R22 is connected with a power supply Vcc/2, the other end of the resistor R21 is connected with one end of a resistor R20, one end of a capacitor C2 and the output end of the operational amplifier U5B, the other end of the resistor R20 is connected with the other end of a capacitor C2, the inverting input end of the operational amplifier U5B and the other end of the resistor R18, one end of the resistor R19 is connected with the non-inverting input end of the operational amplifier U5B, and the other end of the resistor R19 is connected with Vcc/2;
the structure of the voltage tracking module (6) is that one end of a resistor R23 is connected with a power Vcc/2, the other end of the resistor R23 is connected with an inverting input end of an operational amplifier U6A, a non-inverting input end of the operational amplifier U6A is connected with one end of a resistor R24 and one end of a resistor R25, the other end of a resistor R24 is connected with an output end of an operational amplifier U6A, the other end of a resistor R25 is connected with an output end of an operational amplifier U6B, one end of a resistor R26 is connected with an output end of an operational amplifier U6A, and the other end of the resistor R26 is connected with an inverting input; one end of the resistor R27 is connected with the non-inverting input end of the operational amplifier U6B, and the other end is connected with a power supply Vcc/2; one end of a capacitor C3 and one end of a resistor R28 are connected with the inverting input end of the operational amplifier U6B, the other end of the capacitor C3 is connected with the output end of the operational amplifier U6B, the output end of the operational amplifier U6B is connected with one end of a resistor R29, the other end of the resistor R29 is connected with the non-inverting input end of the operational amplifier U7A, and the non-inverting input end of the resistor R29 is used as the first input end of the voltage tracking module (6), is recorded as a port Vflw-in1 and is connected with the second output end of the power-; one end of the resistor R30 is connected with the inverting input end of the operational amplifier U7A, the other end of the resistor R30 is used as the second input end of the voltage tracking module (6), is recorded as a port Vwlw-in 2 and is connected with a port Vdly-out of the delay compensation module (5); one end of the resistor R31 is connected with the inverting input end of the operational amplifier U7A, and the other end is connected with a power supply Vcc/2; the output end of the operational amplifier U7A is connected with the grid of a field effect transistor Q2, the drain of a field effect transistor Q2 is connected with a power supply Vcc, the source is connected with one end of an inductor L1 and the cathode of a diode D1, the anode of a diode D1 is grounded, the other end of the inductor L1 is connected with the anode of an electrolytic capacitor C4, the anode of the electrolytic capacitor C5, one end of a capacitor C6 and one end of a capacitor C7, the output ends of the voltage tracking module (6) are used as the output end, are recorded as a port Vflw-out and are connected with a port PWR-in1 of the power output module (3); the negative electrode of the electrolytic capacitor C4, the negative electrode of the electrolytic capacitor C5, the other end of the capacitor C6 and the other end of the capacitor C7 are all grounded;
the structure of the over-current judgment module (7) is that the non-inverting input end of the operational amplifier U9A is used as the input end of the over-current judgment module (7), is marked as a port OC-in, and is connected with a port PWR-out3 of the power output module (3); one end of the resistor R35 is connected with the inverting input end of the operational amplifier U9A, and the other end is grounded; one end of the resistor R36 is connected with the inverting input end of the operational amplifier U9A, and the other end is connected with one end of the slide rheostat W3; the other end and the slide wire end of the slide rheostat W3 are connected with the output end of the operational amplifier U9A and the non-inverting input end of the operational amplifier U9B; one end of the slide rheostat W4 is connected with a power supply Vdd, the other end of the slide rheostat W4 is grounded, and a slide wire end is connected with an inverted input end of the operational amplifier U9B; the output end of the operational amplifier U9B is used as the output end of the overcurrent judgment module (7), is recorded as a port OC-out and is connected with the input end of the power-off protection module (8);
the power-off protection module (8) is structurally characterized in that two input ends of a NAND gate U8A are connected and are recorded as a port BRK-in, the input end of the power-off protection module (8) is connected with the output end of an overcurrent judgment module (7), the output end of the NAND gate U8A is connected with one input end of a NAND gate U8B, the other input end of the NAND gate U8B is connected with the output end of a NAND gate U8C, the output end of the NAND gate U8B is connected with one input end of a NAND gate U8C and the grid of a field effect transistor Q3, the other input end of the NAND gate U8C is connected with one end of a capacitor C8 and one end of a resistor R33, the other end of the resistor R33 is connected with one end of a switch K1 and one end of a resistor R32, the other end of the resistor R32 is connected with; the source electrode of the field effect transistor Q3 is grounded, one end of the resistor R34 is used as a first output end of the power-off protection module (8) and is marked as a port BRK-out1 and is connected with a port PWR-in2 of the power output module (3), the other end of the resistor R34 is connected with the drain electrode of the field effect transistor Q3 and is used as a second output end of the power-off protection module (8) and is marked as a port BRK-out2, and the port BRK-out2 is simultaneously connected with a port PWR-in3 of the power output module (3) and a port Vflw-in1 of the voltage tracking module (6);
the display driving module (9) is structured in such a way that one end of a resistor R44 is grounded, the other end of the resistor R6324 is connected with one end of a resistor R45 and the inverting input end of an operational amplifier U11A, the other end of the resistor R45 is connected with one fixed end of a sliding rheostat W7, the non-inverting input end of the operational amplifier U11A is used as one input end of the display driving module (9) and is marked as a port DIS-in1, the non-inverting input end of the operational amplifier U11 is connected with the output end of a clipping setting module (2) and is used for sampling the current limiting value set by the clipping setting module (2), the output end of the operational amplifier U11A is connected with the sliding terminal of the sliding rheostat W7 and one selection end of a switch SW1, one end of a resistor R46 is grounded, the other end of the resistor R47 is connected with the inverting input end of the operational amplifier U12B, the other end of the resistor R47 is connected with one fixed end of the sliding rheostat, the output end of the operational amplifier U12B is connected with the slide wire end of the slide rheostat W8 and the other selection end of the switch SW1, the negative power end of the operational amplifier U12B is connected with a power supply Vdd, the positive power end is grounded, the common end of the switch SW1 is used as the output end of the display driving module (9) and is marked as DIS-out, the common end is connected with the signal input end of a digital meter head (123) in the front panel (12), the anode of the light emitting diode D4 is connected with the power supply Vdd, the cathode of the light emitting diode D2 is connected with one selection end of the switch SW2, the anode of the light emitting diode D5 is connected with the power supply Vdd, the cathode of the light emitting diode SW 86525 is connected with the other selection end of the switch SW2, the common end of the switch SW2 is connected with one end of the resistor R48, and the other end of;
the reference voltage module (10) has the structure that: one end of the resistor R49 is connected with a power supply Vcc, the other end of the resistor R49 is connected with the cathode of the voltage stabilizing diode D6 and one end of the sliding rheostat W9, the anode of the voltage stabilizing diode D6 and the other end of the sliding rheostat W9 are grounded, the slide wire end of the sliding rheostat W9 is connected with the non-inverting input end of the operational amplifier U7B, the inverting input end of the operational amplifier U7B is connected with the output end of the operational amplifier U7B and serves as the output end of the reference voltage module (10) and is recorded as a port Vref-out, and is connected with a port Vjdg-in3 of the load judging module (;
the structure of the front panel (12) comprises: the device comprises a display selection (121), a power switch (122), a digital meter head (123), a current limiting indicator lamp (124), an output current indicator lamp (125), an amplitude limiting setting (126), a current setting (127), a reset button (128) and a current output port (129).
2. The device as claimed in claim 1, wherein the power supply Vcc, Vcc/2 and Vdd are 48V, 24V and 5V, respectively.
3. A load adaptive constant current source device according to claim 1, wherein the circuit parameters of said delay compensation module (5) are as follows: the resistors R13 and R14 are 4K, R15 is 40K, R16 and R21 are 20K, R17 and R20 are 10K, R18 and R19 are 1K, R22 is 5.1K, and the capacitor C2 is 5 pF.
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| JP3761507B2 (en) * | 2002-11-21 | 2006-03-29 | ローム株式会社 | DC stabilized power supply |
| CN101763128B (en) * | 2009-12-03 | 2012-03-14 | 深圳市大族激光科技股份有限公司 | Constant current source |
| CN104300788B (en) * | 2014-10-24 | 2017-03-15 | 电子科技大学 | A kind of adaptive voltage scaling circuit |
| CN105528009B (en) * | 2015-12-29 | 2016-10-19 | 吉林大学 | A kind of portable bidirectional constant source module |
| CN105404347B (en) * | 2015-12-29 | 2017-01-11 | 吉林大学 | Dual-loop feedback constant-current source circuit |
| CN106444945B (en) * | 2016-09-05 | 2017-09-29 | 吉林大学 | A kind of digital program controlled constant current source |
| CN106207730B (en) * | 2016-09-05 | 2019-04-05 | 吉林大学 | A kind of high stability laser pumping source with overheat protection function |
| CN106486963B (en) * | 2016-11-25 | 2018-08-31 | 西安微电子技术研究所 | A kind of star Flouride-resistani acid phesphatase self-recovering type overcurrent/short-circuit protection circuit |
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| DE102004033980A1 (en) * | 2004-07-14 | 2006-02-16 | Infineon Technologies Ag | Control of an electrical load such as a light emitting diode has load current measured and compared with reference |
| CN105843315A (en) * | 2016-05-11 | 2016-08-10 | 国神光电科技（上海）有限公司 | Constant current source control method and constant current source circuit |
| CN107193314A (en) * | 2017-06-26 | 2017-09-22 | 广东奥普特科技股份有限公司 | A kind of constant-current circuit of amplifier output voltage clamper in driving tube threshold voltage |
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