CN1093466A - Battery full charge testing circuit - Google Patents

Battery full charge testing circuit Download PDF

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Publication number
CN1093466A
CN1093466A CN 93103882 CN93103882A CN1093466A CN 1093466 A CN1093466 A CN 1093466A CN 93103882 CN93103882 CN 93103882 CN 93103882 A CN93103882 A CN 93103882A CN 1093466 A CN1093466 A CN 1093466A
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China
Prior art keywords
voltage
battery
comparer
input end
divider resistance
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CN 93103882
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Chinese (zh)
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陈锡勋
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E Lead Electronic Co Ltd
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E Lead Electronic Co Ltd
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Priority to CN 93103882 priority Critical patent/CN1093466A/en
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Abstract

The invention relates to a kind of improved battery full charge testing circuit that is arranged at battery charger inside, at any time detect the voltage of rechargeable battery with the first input end of a comparer, and second input end that the voltage branch of rechargeable battery is depressed into comparer through resistance is with to a memory electric capacity charging, falling element with a fixed voltage in parallel with resistance makes the pressure reduction between first and second input end of comparer remain on a small definite value, fill full and when voltage taking place descending at battery, the output of comparer changes, thereby stop charging, damage to prevent the battery charge satiety.

Description

Battery full charge testing circuit
The present invention relates to a kind of improved battery full charge testing circuit that is arranged at battery charger inside, particularly a kind of simple in structure and can utilize the characteristic of rechargable battery-△ V again and detect the new battery full charge testing circuit whether battery is full of exactly.
Be disposed at the battery full charge testing circuit in the charger in the prior art, it detects the mode whether battery is full of, and commonly used has following two kinds:
A kind of is to set a fixed voltage, makes battery when charging so far fixed voltage, changes with Weak current even charge power supply stops to charge normal and replenishes; Though the required circuit structure of this kind detection mode comparatively simply need not into a large amount of design cost of throwing, yet, because the voltage when each battery charge is saturated is all inequality, even same battery is under different situations, its charging saturation voltage is also variant, if the fixed voltage that the charging saturation voltage of the battery that is recharged just sets a little less than the battery full charge testing circuit of charger, even then this battery reaches the charging state of saturation, described battery full charge testing circuit also can't detect so that charge power supply stops to charge normal, so, the danger that this battery damages with regard to the charging satiety is arranged; Otherwise, if, if the fixed voltage that the charging saturation voltage of the battery that is recharged just sets a little more than the battery full charge testing circuit of charger, then before this battery reaches the charging state of saturation, described battery full charge testing circuit will detect the cell voltage that equates with the fixed voltage that sets earlier, and make charge power supply stop to charge normal, so, battery can not satisfy request for utilization with regard to can't be full of electricity always.According to preceding described, be to it serves to show this setting fixed voltage to detect the mode whether battery is full of electricity, usually can misoperation take place and make battery charge satiety or undercharge, the drawback of accuracy in detection deficiency is obviously arranged.
Another kind battery comparatively accurately is full of detection mode, voltage has and does not rise anti-characteristic of falling and implement when then utilizing battery to be full of electricity, that is, when each battery charge is saturated, its voltage can't rise because of lasting continuation of charging, have downward trend gradually on the contrary, therefore, utilize the battery of this characteristic to be full of detection mode and be commonly referred to as-△ V technology.And this-△ V technology generally will be remembered the voltage of last time at any time, and voltage that at any time will one time of back and institute remember before the voltage of a time and make comparisons, the voltage one of described last time is greater than the voltage of one time of described back, be that decidable voltage has begun to descend, it is full to be the expression battery has filled this moment, and can make charge power supply stop battery charge.This detection mode though quite accurate detectability is arranged, does not have the misgivings of battery charge satiety or deficiency, still, uses this kind detection mode at present and the circuit that develops, generally is not to use CPU and formula thereof to reach, and is exactly the IC of design specialized.Like this, though can be by aforementioned-△ V technology is put into practice, and make the battery that is recharged reach 100% be full of fully and correct and in good time stop charging, but its complex structure and the design cost of being paid and manufacturing cost are all quite high, real non-one economic material benefit and close product in consumption demand.
According to the above, be necessary to provide a kind of simple in structure, cost of investment is low and have again and accurately detect battery and filled full and the battery full charge testing circuit that stops to charge of order in good time.
The purpose of this invention is to provide a kind of new battery full charge testing circuit, this circuit utilizes describedly to have accurate detectability-△ V technical design and goes out, and it is simple in structure and can reduce cost significantly and detect and accurately can stop charging in good time and guarantee that battery fills full fully.
Below in conjunction with accompanying drawing design of the present invention is described.
Fig. 1 is the prototype of circuit of the present invention.
Fig. 2 is the complete circuit structure of the present invention.
Fig. 3 is the circuit diagram of one embodiment of the present of invention.
The initial designs of described battery full charge testing circuit as shown in Figure 1, the first input end 11 of one comparer 10 is connected to the charging end of battery 20, to detect the voltage V1 of battery 20 at any time, and on the voltage V1 of battery 20, get second input end 12 of a dividing potential drop V2 to comparer 10 with first and second divider resistance R1 and R2, the memory electric capacity 30 that is located on this second input end 12 with butt joint charges, 13 of output terminals as for comparer 10 are connected to charge power supply 40, to control the break-make of this charge power supply 40.Wherein, the first divider resistance R1 cross-over connection is between first and second input end 11 and 12 of comparer 10, the second divider resistance R2 is in parallel with memory electric capacity 30, and the second divider resistance R2 is much larger than the first divider resistance R1, so that keep a minimum pressure reduction Vd between first and second input end 11 and 12 of comparer 10, and
Vd=V1×{1-〔R2/(R1+R2)〕}
When battery 20 chargings, memory electric capacity 30 is recharged by the dividing potential drop of first, second divider resistance R1 and R2; And when battery 20 chargings are saturated, its voltage V1 promptly begins decline because of-△ V effect, voltage V1 one descends, the voltage V2 of memory electric capacity 30 promptly begins to descend thereupon, and because the maintenance effect of memory electric capacity 30, make the decline rate of its voltage V2 slower, and, make cell voltage V1 drop to the degree lower at an easy rate than capacitance voltage V2 because first and second input end 11 of comparer 10 and 12 s' pressure reduction Vd is very little than the decline rate of the voltage V1 of battery 20.Like this, when cell voltage V1 is lower than capacitance voltage V2, the reversing of the current potential of the output terminal 13 of comparer 10, thus make charge power supply 40 outages, to stop charging to battery 20.Therefore have and detect battery and be full of electricity and stop ability battery charge.
Just, in the above-mentioned battery full charge testing circuit, because described Vd is not a definite value, and can be along with the increase of the voltage V1 of battery 20 and increase, so, the Vd big result that heals is that the voltage that memory electric capacity 30 remember keep is bigger with the voltage phase difference of battery 20, feasiblely remembers the electric capacity 30 last batteries of remembering and is full of the voltage distances actual battery and is full of voltage one gap is arranged, rather than correct memory.Moreover; because battery 20 is when being full of electricity; the speed that its voltage V1 descends is very slow; and aforementioned Vd is bigger; then make the difficult decline that catch up with voltage V2 of decline of voltage V1; that is voltage V1 difficulty be lower than V2, stop battery 20 charging to make charge power supply 40 thereby make comparer 10 be difficult to change polarity in good time.Therefore, circuit shown in Figure 1 has problem to be solved is how to make memory electric capacity 30 memory voltage and make voltage V1 more easily be lower than voltage V2 in good time to change polarity to make comparer 10 correctly.
Described in view of leading portion, the present inventor proposes the battery full charge testing circuit shown in second figure again, and this is the improvement to the described circuit of Fig. 1.It mainly is that to fall element 50 with a fixed voltage in parallel with first and second divider resistance R1 and R2 among Fig. 1, and again with a stake resistance R3 ground connection, wherein, fixed voltage element 50 is diode or Zener diode ... or the like.With one, diode is example, the voltage V1 many high (as long as being higher than the bias voltage VD of diode) of battery 20 no matter, the pressure reduction that element 50 two ends fall in fixed voltage has only minimum change, and all remains near the VD.Therefore, pressure reduction Vd between first and second input end 11 and 12 of comparer 10, be to be maintained at certain value (Vd=V1-V2=(R1 * VD) ÷ (R1+R2)), and as R2 during much larger than R1, Vd is definite value still, and can be very little, makes when-△ V phenomenon generation, the voltage V1 of battery 20 can be easy to just drop to the low state of voltage V2 than memory electric capacity 30, so that the output of comparer 10 changes polarity and in time make charge power supply 40 stop battery 20 chargings.Simultaneously, because Vd is a definite value and very little again, so memory electric capacity 30 each voltage that constantly write down are all quite approaching with the voltage of battery 20, therefore its record correctness improves, and makes that the last charging saturation voltage of remembering almost is exactly the charging saturation voltage of battery.Therefore, as shown in Figure 2, as long as suitably control the value of the second divider resistance R2 and memory electric capacity 30, so that the decline rate of the voltage V2 of memory electric capacity 30 can be less than the decline rate of cell voltage V1, and make the first divider resistance R1 very roughly much smaller than the second divider resistance R2(, R1 is advisable with the scope that is selected in thousands of ohm, R2 and is selected in millions of ohm), just can reflect correctly when battery is full of and it is stopped to charge in good time.Because its circuit structure is quite simple, with low cost, therefore, has economical and practical benefit again.
Described according to leading portion, the present invention comprises as shown in Figure 2:
One comparer 10, the first input end 11, voltage with voltage of taking from battery 20 is a little less than second input end 12 of first input end 11 and be connected to charge power supply 40 to control its output terminal of whether powering 13;
One first divider resistance R1, cross-over connection is between first and second input end 11 and 12 of comparer 10;
One second divider resistance R2, much larger than the first divider resistance R1 and be arranged on second input end 12 of comparer 10, enable to cooperate the first divider resistance R1 and the voltage branch on the first input end 11 of comparer 10 is depressed into second input end 12, so that the only little voltage (that is voltage of battery 20) that is lower than first input end 11 of the voltage of second end 12 of comparer 10;
One memory electric capacity 30, in parallel with the aforementioned second divider resistance R2, R2 carries out charge and discharge via this second divider resistance, and its voltage of remembering all is slightly less than the voltage of battery 20;
Element 50 falls in one fixed voltage, and is in parallel with aforementioned first and second divider resistance R1 and R2, in order to keep under the comparer 120 pressure reduction between first and second input ends 11 and 12 in a small definite value;
One stake resistance R3, one are terminated at aforementioned fixation voltage drop element 50, the then direct ground connection of the other end.
In addition, because the voltage fall of minority battery when being full of electricity is not fairly obvious, and make above-mentioned battery full charge testing circuit shown in Figure 2 be difficult to detect.So the present inventor between battery charging terminal and comparer first input end, is provided with a multiplying arrangement 60 for improving its detection sensitivity, as shown in Figure 3, after the voltage decline situation when battery is full of electricity is amplified, inputs to comparer 10 again.So, though aforesaid voltage fall and not obvious, but for comparer 10, because the signal on its first input end 11 is that process is amplified in advance, so, still can detect tangible voltage and descend.Say it for example, if the gain amplifier of this multiplying arrangement 60 is N, and battery is when being full of electricity, its voltage VB's small voltage difference Va has descended, then for comparer 10, cell voltage VB is the NVB-N(VB-Va that descended)=NVa, that is the N times of Va voltage difference that descended, thereby seem comparatively obvious, make comparer 10 be enough to detect the decline situation of cell voltage V1.Described multiplying arrangement 60 also is restricted the enlargement ratio of its output voltage because of the operating voltage of differential amplifier 61 is restricted, therefore, the fixed voltage of having connected again on the input end of this differential amplifier 61 for example falls element 62(, Zener diode), make cell voltage VB before being input to differential amplifier 61, cut a fixed voltage Vb earlier.Like this, when cell voltage VB descended a small voltage difference Va, for comparer 10, cell voltage V1 was the N((VB-Vb that descended)-((VB-Va)-Vb) N=NVa still is the N times of Va voltage difference that descended.But for multiplying arrangement 60, its output just can not limited by the operating voltage of differential amplifier 61 again.
In sum, visible the present invention is not only simple in structure, with low cost, and more can detect battery exactly and be full of the state of electricity and in time stop battery charge, and has Practical Benefit.

Claims (4)

1, a kind of battery full charge testing circuit comprises:
-comparer has the first input end of taking from cell voltage, voltage a little less than second input end of first input end and be connected to charge power supply to control the output terminal whether it powers;
-the first divider resistance, cross-over connection is between first and second input end of comparer;
-the second divider resistance, much larger than first divider resistance and be connected on second input end of comparer, be used to cooperate first divider resistance that the voltage branch on the comparer first input end is depressed into second input end, so that the only little voltage (that is cell voltage) that is lower than first input end of the voltage of comparer second input end;
-memory electric capacity, in parallel with second divider resistance, carry out charge and discharge through second divider resistance thus, and its voltage of remembering all is slightly less than cell voltage;
Element falls in-fixed voltage, and is in parallel with aforementioned first and second divider resistance, is a small definite value in order to the pressure reduction between first and second input end under the maintenance comparer;
-stake resistance, one are terminated at aforementioned fixation voltage drop element, the then direct ground connection of the other end.
2, a kind of battery full charge testing circuit as claimed in claim 1, wherein, between the right-hand member of described battery and the first input end of comparer a multiplying arrangement is set, the voltage fall when being full of electricity in order to amplify battery in advance makes this cell voltage decline situation be easy to be detected by comparer.
3, a kind of battery full charge testing circuit as claimed in claim 2, wherein, described multiplying arrangement has a differential amplifier, and one be terminated at battery charging terminal, element falls in the fixed voltage that is connected to this differential amplifier in addition, be used for cell voltage is deducted a fixed voltage in advance, amplify exporting described comparer to by differential amplifier again, limit thereby make the output of differential amplifier be unlikely by its operating voltage.
4, a kind of as claim 1,2 described battery full charge testing circuits, wherein:
The voltage that described memory electric capacity is used to keep slower descends, so that the voltage decline rate of battery when being full of electricity is greater than the voltage decline rate of memory electric capacity;
It is diode or Zener diode that element falls in described fixed voltage, is used to provide comparer first and second input end one small electric pressure reduction, so that the voltage of battery charge when saturated easily is reduced to the also low state of voltage than memory electric capacity;
Described first divider resistance is preferably in thousands of ohm the scope and second divider resistance is preferably in millions of ohm the scope, so that the definite value still of the voltage difference between first and second input end of comparer, and can be very little.
CN 93103882 1993-04-06 1993-04-06 Battery full charge testing circuit Pending CN1093466A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 93103882 CN1093466A (en) 1993-04-06 1993-04-06 Battery full charge testing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 93103882 CN1093466A (en) 1993-04-06 1993-04-06 Battery full charge testing circuit

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CN1093466A true CN1093466A (en) 1994-10-12

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CN 93103882 Pending CN1093466A (en) 1993-04-06 1993-04-06 Battery full charge testing circuit

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100547419C (en) * 2005-01-06 2009-10-07 联发科技股份有限公司 Battery detecting system and method thereof
CN101685897A (en) * 2008-09-24 2010-03-31 三洋电机株式会社 Battery system and battery pack
CN104459290A (en) * 2014-12-25 2015-03-25 青岛歌尔声学科技有限公司 Overcurrent detection circuit, device and method
CN111959345A (en) * 2020-07-23 2020-11-20 蜂巢能源科技有限公司 Battery state monitoring circuit, method, device and system and vehicle

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100547419C (en) * 2005-01-06 2009-10-07 联发科技股份有限公司 Battery detecting system and method thereof
CN101685897A (en) * 2008-09-24 2010-03-31 三洋电机株式会社 Battery system and battery pack
CN104459290A (en) * 2014-12-25 2015-03-25 青岛歌尔声学科技有限公司 Overcurrent detection circuit, device and method
CN111959345A (en) * 2020-07-23 2020-11-20 蜂巢能源科技有限公司 Battery state monitoring circuit, method, device and system and vehicle

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C01 Deemed withdrawal of patent application (patent law 1993)
WD01 Invention patent application deemed withdrawn after publication