CN109344633A - A kind of software decryption method based on mixed logic processor platform - Google Patents

A kind of software decryption method based on mixed logic processor platform Download PDF

Info

Publication number
CN109344633A
CN109344633A CN201811139809.7A CN201811139809A CN109344633A CN 109344633 A CN109344633 A CN 109344633A CN 201811139809 A CN201811139809 A CN 201811139809A CN 109344633 A CN109344633 A CN 109344633A
Authority
CN
China
Prior art keywords
mode
processor platform
method based
logic processor
decryption method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201811139809.7A
Other languages
Chinese (zh)
Inventor
李保来
陈亮甫
王万强
宋宇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong Chaoyue CNC Electronics Co Ltd
Original Assignee
Shandong Chaoyue CNC Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong Chaoyue CNC Electronics Co Ltd filed Critical Shandong Chaoyue CNC Electronics Co Ltd
Priority to CN201811139809.7A priority Critical patent/CN109344633A/en
Publication of CN109344633A publication Critical patent/CN109344633A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60Protecting data
    • G06F21/602Providing cryptographic facilities or services

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Bioethics (AREA)
  • General Health & Medical Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)

Abstract

The present invention relates to software decryption technical field, in particular to a kind of software decryption method based on mixed logic processor platform.Method system of the invention is based on Xilinx Zynq-7030 mixing core processor platform and is designed, which includes two ARM Cortex-A9 cores and Xilinx Series FPGA reconfigurable logic resource.A kind of software decryption method based on mixed logic processor platform of the invention is used to improve the efficiency resolved in more concurrent tasks management systems to related software application, realizes the resolving function to the related software of high concurrent task management system.

Description

A kind of software decryption method based on mixed logic processor platform
Technical field
The present invention relates to software decryption technical field, in particular to a kind of software solution based on mixed logic processor platform Decryption method.
Background technique
With the rapid growth of Internet user, the sharply expansion of the data scale of construction, demand of the data center to calculating also exists It is swift and violent to go up.Deep learning, on-line prediction, the video code conversion in live streaming, picture compression decompression and HTTPS encryption etc. Demand of the types of applications to calculating is far beyond the capabilities of traditional CPU processor.One side processor performance again without Method is increased according to Moore's Law, and it has been more than to increase by " Moore's Law " that another aspect data, which increase to calculated performance requirement, Speed.
Current ideal coprocessor should be hardware based design, have three kinds of basic capacities.First is design energy The crucial processing function needed in the special hardware-accelerated various applications of realization is enough provided.Followed by co-processor design is in performance On very flexibly, using assembly line and parallel organization, keep up with algorithm and update and the changes in demand of performance.Finally, coprocessor Broadband, low latency interface can be provided for primary processor and system storage.
Summary of the invention
In order to solve problems in the prior art, the present invention provides a kind of software solutions based on mixed logic processor platform Decryption method is used to improve the efficiency resolved in more concurrent tasks management systems to related software application, realizes to high concurrent The resolving function of the related software of task management system.
The technical solution adopted in the present invention is as follows:
A kind of software decryption method based on mixed logic processor platform, comprising the following steps:
A, determination cracks mode, determines specific crack method and parameter setting according to the mode of cracking;
B, breaking cryptographic keys are then calculated according to key schedule;
C, operation to be cracked is issued in calculate node;
D, business is distinguished by reading challenge parameters, sends relevant parameter to FPGA;
E, FPGA calculates target value using the parameter passed over that cracks as input value, if target value and calculating target String value is identical, then returns the input value, and otherwise initial value is incremented by, and executes next round and calculates, until completing the quantity specified in parameter.
The mode of cracking includes that Brute Force mode or dictionary crack mode.
Crack mode be Brute Force mode when, Brute Force value range need to be specified.
Cracking mode is dictionary when cracking mode, then needs to read in storage server and crack dictionary.
The parameter in operation is cracked to include algorithm, crack dictionary or Brute Force range, calculate target string value, key.
Technical solution provided by the invention has the benefit that
The present invention is based on Xilinx Zynq-7030 mixing core processor platforms to be designed, which includes two ARM Cortex-A9 core and Xilinx Series FPGA reconfigurable logic resource.Mixing core processor periphery is integrated with 1GB DDR3 Memory, 32MB NOR Flash etc..Crack application software mainly for PDFR2, PDFR4, PDFR5, Office2003-2013, ZIP, WPA2, UDES, LM, VPN, VBULLETIN, UTLM, UMD5, batch UMD5, batch SHA1, batch SHA512, batch The application such as NTLM is cracked.
A kind of software decryption method based on mixed logic processor platform of the invention, is used to improve more concurrent tasks The efficiency resolved in management system to related software application, realizes the resolving of the related software to high concurrent task management system Function.
A kind of software decryption method based on mixed logic processor platform of the invention carries out isomery acceleration using FPGA It calculates, software can greatly be improved and resolve efficiency and accuracy.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other Attached drawing.
Fig. 1 is a kind of system level diagram of software decryption method based on mixed logic processor platform of the invention;
Fig. 2 is a kind of method flow diagram of software decryption method based on mixed logic processor platform of the invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention Formula is described in further detail.
Embodiment one
As shown in Fig. 1, a kind of software decryption method based on mixed logic processor platform of the present embodiment, system are based on Xilinx Zynq-7030 mixing core processor platform is designed, which includes two ARM Cortex-A9 cores With Xilinx Series FPGA reconfigurable logic resource.Mixing core processor periphery is integrated with 1GB DDR3 memory, 32MB NOR Flash etc..Crack application software mainly for PDFR2, PDFR4, PDFR5, Office2003-2013, ZIP, WPA2, UDES, The application such as LM, VPN, VBULLETIN, UTLM, UMD5, batch UMD5, batch SHA1, batch SHA512, batch NTLM carries out brokenly Solution.
As shown in Fig. 2, a kind of software decryption method based on mixed logic processor platform of the present embodiment cracks and appoints Implementation procedure of being engaged in is as follows:
1, user application software determines that the mode that cracks is that Brute Force or dictionary crack, if needed using Brute Force mode Specified Brute Force value range;If cracking mode using dictionary, needs to read in storage server and crack dictionary.
2, user application software calculates breaking cryptographic keys according to key schedule;
3, by application schedules management software, operation to be cracked is issued in a calculate node, cracking the parameter packet in operation Algorithm is included, dictionary is cracked or Brute Force range, calculates target string value, the information such as key;
4, crack acquisition task, is distinguished by reading challenge parameters to business, sends relevant parameter to FPGA;
5, FPGA is made according to the algorithm item and key item in the parameter passed over that cracks with the initial value specified in parameter For input value, start to calculate target value, if target value is identical as the calculating target string value that passes over of cracking, return The input value, otherwise initial value is incremented by, and executes next round and calculates, until completing the quantity specified in parameter.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.

Claims (5)

1. a kind of software decryption method based on mixed logic processor platform, comprising the following steps:
A, determination cracks mode, determines specific crack method and parameter setting according to the mode of cracking;
B, breaking cryptographic keys are then calculated according to key schedule;
C, operation to be cracked is issued in calculate node;
D, business is distinguished by reading challenge parameters, sends relevant parameter to FPGA;
E, FPGA calculates target value using the parameter passed over that cracks as input value, if target value and calculating target String value is identical, then returns the input value, and otherwise initial value is incremented by, and executes next round and calculates, until completing the quantity specified in parameter.
2. a kind of software decryption method based on mixed logic processor platform according to claim 1, which is characterized in that The mode that cracks includes that Brute Force mode or dictionary crack mode.
3. a kind of software decryption method based on mixed logic processor platform according to claim 2, which is characterized in that It is described when to crack mode be Brute Force mode, Brute Force value range need to be specified.
4. a kind of software decryption method based on mixed logic processor platform according to claim 2, which is characterized in that It is described when to crack mode be that dictionary cracks mode, then it needs to read in storage server and cracks dictionary.
5. a kind of software decryption method based on mixed logic processor platform according to claim 1, which is characterized in that In the step C, cracks the parameter in operation and include algorithm, crack dictionary or Brute Force range, calculate target string value, is close Key.
CN201811139809.7A 2018-09-28 2018-09-28 A kind of software decryption method based on mixed logic processor platform Pending CN109344633A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811139809.7A CN109344633A (en) 2018-09-28 2018-09-28 A kind of software decryption method based on mixed logic processor platform

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811139809.7A CN109344633A (en) 2018-09-28 2018-09-28 A kind of software decryption method based on mixed logic processor platform

Publications (1)

Publication Number Publication Date
CN109344633A true CN109344633A (en) 2019-02-15

Family

ID=65307541

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811139809.7A Pending CN109344633A (en) 2018-09-28 2018-09-28 A kind of software decryption method based on mixed logic processor platform

Country Status (1)

Country Link
CN (1) CN109344633A (en)

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1694394A (en) * 2005-04-14 2005-11-09 上海交通大学 Deciphering method for file password
US20060041932A1 (en) * 2004-08-23 2006-02-23 International Business Machines Corporation Systems and methods for recovering passwords and password-protected data
CN102750495A (en) * 2012-06-07 2012-10-24 北京锐安科技有限公司 System for cracking and restoring iPhone encrypted backup files
CN105069334A (en) * 2015-08-24 2015-11-18 上海数据分析与处理技术研究所 Character range redefinition based password recovery method
CN105376061A (en) * 2015-10-10 2016-03-02 广州慧睿思通信息科技有限公司 Decryption hardware platform based on FPGA
CN105844140A (en) * 2016-03-21 2016-08-10 国家电网公司 Website login brute force crack method and system capable of identifying verification code
CN106357384A (en) * 2016-08-26 2017-01-25 广州慧睿思通信息科技有限公司 Word2003 document cracking system based on FPGA hardware and method
CN107465500A (en) * 2017-07-20 2017-12-12 广州慧睿思通信息科技有限公司 MD5 Brute Force system and methods based on FPGA
CN107566348A (en) * 2017-08-11 2018-01-09 广州慧睿思通信息科技有限公司 One kind is based on the distributed shifty decryption systems of FPGA and its method
CN108566269A (en) * 2018-03-08 2018-09-21 广州慧睿思通信息科技有限公司 A kind of OFFICE2007 documents based on FPGA hardware crack system

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060041932A1 (en) * 2004-08-23 2006-02-23 International Business Machines Corporation Systems and methods for recovering passwords and password-protected data
CN1694394A (en) * 2005-04-14 2005-11-09 上海交通大学 Deciphering method for file password
CN102750495A (en) * 2012-06-07 2012-10-24 北京锐安科技有限公司 System for cracking and restoring iPhone encrypted backup files
CN105069334A (en) * 2015-08-24 2015-11-18 上海数据分析与处理技术研究所 Character range redefinition based password recovery method
CN105376061A (en) * 2015-10-10 2016-03-02 广州慧睿思通信息科技有限公司 Decryption hardware platform based on FPGA
CN105844140A (en) * 2016-03-21 2016-08-10 国家电网公司 Website login brute force crack method and system capable of identifying verification code
CN106357384A (en) * 2016-08-26 2017-01-25 广州慧睿思通信息科技有限公司 Word2003 document cracking system based on FPGA hardware and method
CN107465500A (en) * 2017-07-20 2017-12-12 广州慧睿思通信息科技有限公司 MD5 Brute Force system and methods based on FPGA
CN107566348A (en) * 2017-08-11 2018-01-09 广州慧睿思通信息科技有限公司 One kind is based on the distributed shifty decryption systems of FPGA and its method
CN108566269A (en) * 2018-03-08 2018-09-21 广州慧睿思通信息科技有限公司 A kind of OFFICE2007 documents based on FPGA hardware crack system

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
XU BAI 等: "Password Recovery for ZIP Files Based on ARM-FPGA Cluster", 《SPACCS 2017: SECURITY, PRIVACY, AND ANONYMITY IN COMPUTATION, COMMUNICATION, AND STORAGE》 *
日子: "加密Word文档破解有招术", 《个人电脑》 *

Similar Documents

Publication Publication Date Title
JP7208989B2 (en) A system for recording verification keys on the blockchain
US11381526B2 (en) Multi-tenant optimized serverless placement using smart network interface cards and commodity storage
US9521218B1 (en) Adaptive compression and transmission for big data migration
JP6594988B2 (en) Method and apparatus for processing address text
US10142313B2 (en) System and method for authenticating user using contact list
KR20190070969A (en) Block chain-based data processing method and device
CN105718502B (en) Method and apparatus for efficient feature matching
US20140351229A1 (en) Efficient data compression and analysis as a service
CN105359155B (en) Use compression failure password attack
KR20240005674A (en) Cyphergenics-based ecosystem security platforms
US9088297B2 (en) High throughput decoding of variable length data symbols
US20200014399A1 (en) Method and system for compressing and/or encrypting data files
CN113055431A (en) Block chain-based industrial big data file efficient chaining method and device
CN113806350B (en) Management method and system for improving security of big data transaction platform
CN109344633A (en) A kind of software decryption method based on mixed logic processor platform
US11960453B2 (en) Techniques for asynchronous snapshot invalidation
US9455742B2 (en) Compression ratio for a compression engine
US20140090032A1 (en) System and method for real time secure image based key generation using partial polygons assembled into a master composite image
US11275974B2 (en) Random feature transformation forests for automatic feature engineering
US9092859B1 (en) Systems and methods facilitating random number generation for hashes in video and audio applications
Balashov et al. Optimal shattering of complex networks
US9654140B1 (en) Multi-dimensional run-length encoding
KR101811285B1 (en) Method for authentication of cloud system based on additional authentication device and cloud system therefor
Kim et al. Workload prediction using run‐length encoding for runtime processor power management
CN114090928B (en) Nested HTML entity decoding method and device, computer equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20190215

RJ01 Rejection of invention patent application after publication