CN109344099B - Wireless debugging and downloading device for FPGA application system - Google Patents
Wireless debugging and downloading device for FPGA application system Download PDFInfo
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
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- G06F13/4068—Electrical coupling
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- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
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Abstract
The invention discloses a wireless debugging and downloading device of an FPGA application system, which comprises: the debugging computer terminal is used for converting a single-channel high-speed USB into a multifunctional UART/FIFO chip to realize the conversion from the USB to the JTAG and converting and outputting universal JTAG signals TMS, TCK, TDO and TDI, wherein the JTAG signals TMS, TCK and TDO are modulated in an ASK mode through ultrahigh frequency carrier waves and are transmitted and output through a microstrip antenna after being amplified; the FPGA system comprises an FPGA system main control end and a debugging computer end, wherein the FPGA system main control end is in wireless communication with the debugging computer end, each path of a sending end completes signal modulation and real-time sending in an ASK mode through different carrier frequencies, and a receiving end completes signal selection of a corresponding channel through a band-pass filter and completes demodulation, amplification and shaping processing. The device effectively ensures the real-time performance of JTAG signals and has the same effect as wired connection debugging.
Description
Technical Field
The invention relates to the Field of FPGA (Field-Programmable Gate Array) related technology, in particular to a wireless debugging and downloading device for an FPGA application system.
Background
In the related technology, (1) an FPGA downloader and an independent download debugging module are interconnected with a debugging computer at one end through a USB (universal serial Bus) cable and an JTAG (Joint test action Group) interface at the other end through a cable, and are commonly used at present and suitable for debugging in a single board development process, and an FPGA application system needs to take out a module alone or reserve a JTAG interface on a module front panel when downloading and debugging.
(2) The onboard USB-JTAG downloader directly realizes the connection of a USB interface chip and a co-controller or a USB-to-serial interface chip on a module board card, only one USB interface is reserved externally, and the USB interface chip is interconnected with a debugging computer through a USB cable during debugging.
(3) The wireless USB transmission technology is based on wireless operation, enables a new standard, can realize wireless transmission by utilizing the existing USB infrastructure, conforms to the USB specification, and allows the wireless equipment and the expansion port to communicate under the USB protocol.
However, (1) when the FPGA downloader is used, the USB cable and the JTAG terminal cable need to be connected, and when the FPGA application system module is debugged and downloaded, the module needs to be taken out separately and supplied with power separately, and the single-end power supply has risks of reverse connection, short circuit and the like; if a JTAG interface is reserved on a module front panel, a JTAG cable can be directly connected to the panel reserved interface for debugging, an electrostatic protection design needs to be made on the debugging interface, the control device is prevented from being damaged in a long-term plugging process, and the panel debugging interface cannot meet the electromagnetic compatibility design requirement of the system.
(2) On board carried USB-JTAG downloader need every integrated circuit board module all to design the board, the debugging personnel need not from taking FPGA downloader, directly can debug the download through the interconnection of USB cable, it is comparatively convenient to use, nevertheless all need design USB-JTAG downloader on every integrated circuit board module, can occupy certain space, increase the integrated circuit board consumption, cause the wasting of resources simultaneously, the USB interface occupies the panel space simultaneously.
(3) The method is characterized in that the online downloading of the debugging module is realized based on the wireless USB transmission technology, USB interface protocol data needs to be sent out in a wireless mode, a lot of USB protocol information is included, high requirements on transmission carrier frequency and bandwidth can be met, meanwhile, long time delay can be brought, and a debugging tool cannot find equipment or cannot timely obtain response; the receiving end needs to analyze the USB protocol information and convert the USB protocol information into JTAG information, so that the design is more difficult; the method can only realize the transmission between two wireless USB ends, if a plurality of devices are required to be connected at the same time, a plurality of wireless USB ends are required to be connected on a debugging computer, more USB ports are occupied, if the MA-USB technology is used, the MA-USB authentication is required to be obtained, and simultaneously, the drive updating support of an operating system is required.
The related technology mainly adopts a wired mode to realize downloading debugging, and the wireless USB transmission technology is not well supported and applied at present.
Disclosure of Invention
The present application is based on the recognition and discovery by the inventors of the following problems:
in a system integration environment with multiple FPGAs and multiple board cards working together, each FPGA involves online debugging and code downloading and solidification, each downloading link needs to be interconnected with a debugging computer through a USB cable to realize data transmission between the computer and debugged equipment, and different downloading links need to be switched by plugging and unplugging continuously during debugging. The USB cable is inconvenient to use in some special application occasions, for example, the system chassis is higher after being put on shelf, the USB cable can be inconvenient to plug and unplug, and meanwhile, the length of the cable is increased, so that the attenuation of transmission signals is serious, and the long-time online debugging and the instable downloading of a large amount of data are caused; if the system case is designed to be inserted backwards, the cabinet is inconvenient to move, and cables are very inconvenient to insert and pull; meanwhile, the equipment is interconnected through a debugging cable, so that the equipment is isolated from the common ground, and the equipment works abnormally.
The FPGA application system relates to multi-chip FPGA cooperative work and multi-module simultaneous work, if the FPGA in a single module is debugged and downloaded through switching cables, debugging efficiency can be reduced, if a plurality of modules with the same model exist at the same time, equipment is easy to distinguish, and great inconvenience is brought to debugging.
The system debugging download link automatic series connection and JTAG signal wireless transmission are added by combining the system integration technology and the system specifications such as general VPX, CPCI (Compact Peripheral component interconnect), and the like, thereby realizing the system multi-equipment debugging download device without physical connection.
The FPGA completes code loading and online debugging of devices through a JTAG interface protocol, mode selection TMS and a clock TCK in a standard JTAG interface can drive more than one, data output TDO of equipment at the previous stage is connected with data input TDI of the next stage, serial connection of multiple equipment is realized in a daisy chain mode, and finally, the equipment is gathered to one JTAG interface and is interconnected with a debugging computer through wireless transmission. JTAG interfaces of a plurality of pieces of FPGA on a single module, externally reserved JTAG interfaces and a base plate JTAG interface defined by a general specification are intelligently managed through a CPLD (Complex Programmable Logic Device), whether a wireless USB Device is accessed or not and whether a module is a system main Device or not are automatically judged, and a JTAG link is in self-adaptive series connection.
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art.
Therefore, the invention aims to provide a wireless debugging and downloading device of an FPGA application system, which effectively ensures the real-time performance of JTAG signals, has timely response in debugging and has the same effect as wired connection debugging.
In order to achieve the above object, an embodiment of the present invention provides a wireless debugging and downloading device for an FPGA application system, including: the debugging computer terminal is used for converting a single-channel high-speed USB into a multifunctional UART/FIFO chip to realize conversion from the USB to the JTAG and converting and outputting universal JTAG signals TMS, TCK, TDO and TDI, wherein the JTAG signals TMS, TCK and TDO are modulated in an ASK mode through ultrahigh frequency carrier waves and are transmitted and output through a microstrip antenna after being amplified; the FPGA system main control end is in wireless communication with the debugging computer end, wherein each path of the sending end completes signal modulation and real-time sending in an ASK mode through different carrier frequencies, and the receiving end completes signal selection of a corresponding channel through a band-pass filter and completes demodulation, amplification and shaping processing.
The wireless debugging and downloading device of the FPGA application system solves the inconvenience and the problem caused by the use of wired connection through wireless transmission of JTAG signals, in the wireless transmission of the JTAG signals of a debugging computer end and a system main control end, each path of a sending end completes the modulation and the real-time sending of the signals in an ASK mode through different carrier frequencies, a receiving end completes the signal selection of a corresponding channel through a band-pass filter and completes the demodulation, amplification and shaping processing, and the analysis of a communication protocol between devices is not involved in the whole wireless transmission process, so that the real-time performance of the JTAG signals is effectively ensured, the response is timely in debugging, and the wireless debugging has the same effect as wired connection debugging.
In addition, the wireless debugging and downloading device for the FPGA application system according to the above embodiment of the present invention may further have the following additional technical features:
further, in an embodiment of the present invention, the debugging computer terminal supplies power through the USB port, and supplies power through an external power supply mode under a preset condition.
Further, in an embodiment of the present invention, the JTAG signal at the debugging computer end uses different carrier frequencies for signal real-time transmission, where the carrier frequencies include 315MHz, 1200MHz, 433MHz, and 868.3 MHz.
Further, in an embodiment of the present invention, the method further includes: the multi-FPGA equipment backplane is connected in series and used for realizing series connection of data channels through JTAG signals defined by each module slot position of the system backplane and through TDO and TDI series connection, and the TMS and the TCK are connected in a one-drive-multi mode.
Further, in an embodiment of the present invention, the method further includes: the multiple FPGA devices are connected in series in a wireless mode, JTAG wireless transmission functions are designed for all modules in the system, and wireless connection between the TDO and the TDI is achieved by selecting the local oscillation frequency of the TDO ultrahigh frequency transmitting channel and the band-pass filter parameters of the TDI ultrahigh frequency receiving channel.
Further, in an embodiment of the present invention, the modulation principle of ASK is adopted, and the carrier amplitude is changed along with the modulation of JTAG signals, so as to generate communication between the debugging computer terminal and the FPGA system main control terminal.
Further, in one embodiment of the present invention, multi-device wireless serial connection of the JTAG link is accomplished by increasing the different carrier frequencies of the TDO and TDI signals.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The foregoing and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic structural diagram of an FPGA application system wireless debugging and downloading apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a wireless serial connection of multiple FPGA devices according to an embodiment of the present invention;
fig. 3 is a schematic diagram of an FPGA system application of the wireless downloading device according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
The following describes a wireless debugging and downloading device for an FPGA application system according to an embodiment of the present invention with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of an FPGA application system wireless debugging and downloading apparatus according to an embodiment of the present invention.
As shown in fig. 1, the FPGA application system wireless debugging downloading apparatus 10 includes: a debugging computer terminal 100 and an FPGA system main control terminal 200.
The debugging computer terminal 100 is used for converting a single-channel high-speed USB into a multifunctional UART/FIFO chip to realize conversion from the USB to the JTAG and converting and outputting universal JTAG signals TMS, TCK, TDO and TDI, wherein the JTAG signals TMS, TCK and TDO are modulated in an ASK manner through an ultrahigh frequency carrier, and are amplified and then transmitted and output through a microstrip antenna. The FPGA system main control end 200 is in wireless communication with a debugging computer end, wherein each path of the sending end completes signal modulation and real-time sending in an ASK mode through different carrier frequencies, and the receiving end completes signal selection of a corresponding channel through a band-pass filter and completes demodulation, amplification and shaping processing. The device 10 of the embodiment of the invention does not relate to the analysis of the communication protocol between the devices in the whole wireless transmission process, thereby effectively ensuring the real-time performance of JTAG signals, responding in time in debugging and having the same effect as wired connection debugging.
Specifically, the debugging computer terminal 100 converts the single-channel high-speed USB into a multifunctional UART/FIFO chip to realize the conversion from the USB to the JTAG, and converts and outputs the universal JTAG signals TMS, TCK, TDO and TDI; JTAG signals TMS, TCK and TDO are modulated in an ASK mode through ultrahigh frequency carrier waves, and are transmitted and output through a microstrip antenna after being amplified. The FPGA system main control end 200 is arranged on a main control slot control board in the FPGA application system, can perform wireless transceiving transmission with a debugging computer end through ultrahigh frequency, and connects the demodulated, amplified and shaped JTAG signals to system equipment. Wherein TCK is used to test the clock input; the TDI is used for testing data input, and data are input into the JTAG port through the TDI; TDO is used for testing data output, and data is output from a JTAG port through the TDO; TMS is used for test mode selection and TMS is used to set the JTAG port in a particular test mode.
Further, in an embodiment of the present invention, the debugging computer terminal 100 is powered by the USB port, and is powered by the external power supply mode under a preset condition.
In one embodiment of the invention, the JTAG signal at the debugging computer end adopts different carrier frequencies for signal real-time transmission, and the carrier frequencies comprise 315MHz, 1200MHz, 433MHz and 868.3 MHz.
Specifically, the debugging computer terminal 100 supplies power through the USB port, for example, using remote download debugging, needs to increase the transmitting terminal power, and can use an external power supply mode; JTAG signals of the debugging computer terminal 100 adopt four different carrier frequencies for signal real-time transmission, wherein the carrier frequency f1 is 315MHz, f2 is 1200MHz, f3 is 433MHz, and f4 is 868.3 MHz.
Further, in an embodiment of the present invention, the apparatus 10 of the embodiment of the present invention adopts the ASK modulation principle, and the carrier amplitude is changed along with the modulation of the JTAG signal, so as to generate communication between the debugging computer terminal 100 and the FPGA system main control terminal 200.
In the embodiment of the invention, JTAG links of FPGAs in all modules in the FPGA application system are connected in series by the JTAG link of the FPGA system main control end 200 and the JTAG link in the system back plate, and finally download debugging of all equipment in the system is completed through wireless transmission.
Further, in one embodiment of the present invention, multi-device wireless serial connection of the JTAG link is accomplished by increasing the different carrier frequencies of the TDO and TDI signals.
Specifically, the embodiment of the invention completes the wireless serial connection of the JTAG links of multiple devices by increasing different carrier frequencies of TDO and TDI signals, and the mode is more suitable for being used in an FPGA application system with less devices in order to reduce the interference between frequency bands.
As shown in fig. 2, a board card in the equipment chassis is used as a main control end 200 of the FPGA system, and is responsible for receiving and transmitting wireless JTAG signals, and the debugging computer end 100 is connected to the wireless debugging and downloading device through USB, so as to implement the online debugging and downloading functions of the FPGA application system.
Further, in an embodiment of the present invention, as shown in fig. 1, the apparatus 10 of the embodiment of the present invention further includes: the multiple FPGA device backplanes are connected in series 300. The multi-FPGA device backplane serial connection 300 is used for JTAG signals defined by each module slot of the system backplane, and realizes serial connection of data channels by TDO and TDI serial connections, and the TMS and TCK are connected in a one-drive-multiple manner.
Further, in an embodiment of the present invention, as shown in fig. 3, the apparatus 10 of the embodiment of the present invention further includes: and multiple FPGA devices are connected in series in a wireless mode. The two modules are connected in series in a wireless mode, JTAG wireless transmission functions are designed for all modules in the system, and wireless connection between the TDO and the TDI is achieved by selecting local oscillation frequency of a TDO ultrahigh frequency transmitting channel and parameters of a TDI ultrahigh frequency receiving channel band-pass filter.
In addition, automatic detection is performed on the module insertion in the FPGA application system, and the JTAG link of the corresponding module of the back board is automatically connected in series by monitoring. JTAG master/slave mode detection signals are designed for all modules in the system, a system master control end JTAG is in a master mode, and the master control end controls other slot position modules to be in slave modes and is connected in series through a backboard.
The embodiment of the invention has the following beneficial effects:
(1) the inconvenience and limitation brought by wired debugging are solved.
(2) In the application system, the wireless JTAG is designed only at the main control end, and the whole FPGA in the system module can be debugged and downloaded.
(3) Whether the level is matched when the JTAG access is accessed is not considered, and the device link is not damaged due to the level mismatch.
(4) The selection of the frequency band does not affect the general wireless device.
(5) When the wireless transmission device is not used, the JTAG wireless transmission function can be selected to be turned off, and the power consumption is reduced.
(6) The debugging equipment can be far away from noise caused by a system cooling fan and the like, and the debugging efficiency is improved.
According to the wireless debugging and downloading device of the FPGA application system provided by the embodiment of the invention, the inconvenience and the problem brought by wired connection in use are solved by wirelessly transmitting JTAG signals, in the wireless transmission of the JTAG signals at a debugging computer end and a system main control end, each path of a transmitting end completes the modulation and real-time transmission of the signals in an ASK mode through different carrier frequencies, a receiving end completes the signal selection of a corresponding channel through a band-pass filter and completes the demodulation, amplification and shaping processing, and the analysis of a communication protocol between devices is not involved in the whole wireless transmission process, so that the real-time property of the JTAG signals is effectively ensured, the response is timely in debugging, and the wireless debugging has the same effect as the wired connection debugging.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (7)
1. The utility model provides a wireless debugging download apparatus of FPGA application system which characterized in that includes:
the debugging computer terminal is used for converting a single-channel high-speed USB into a multifunctional UART/FIFO chip to realize conversion from the USB to the JTAG and converting and outputting universal JTAG signals TMS, TCK, TDO and TDI, wherein the JTAG signals TMS, TCK and TDO are modulated in an ASK mode through ultrahigh frequency carrier waves and are transmitted and output through a microstrip antenna after being amplified;
the FPGA system main control end is in wireless communication with the debugging computer end, wherein each path of the sending end completes signal modulation and real-time sending in an ASK mode through different carrier frequencies, and the receiving end completes signal selection of a corresponding channel through a band-pass filter and completes demodulation, amplification and shaping processing.
2. The FPGA application system wireless debugging and downloading device of claim 1, wherein the debugging computer terminal is powered by a USB port and is powered by an external power supply mode when the transmission power needs to be increased to meet remote debugging.
3. The wireless debugging and downloading device of claim 2, wherein the JTAG signal of the debugging computer terminal uses different carrier frequencies for signal real-time transmission, and the carrier frequencies include 315MHz, 1200MHz, 433MHz and 868.3 MHz.
4. The FPGA application system wireless debugging downloading device of claim 1, further comprising:
the multi-FPGA equipment backplane is connected in series and used for realizing series connection of data channels through JTAG signals defined by each module slot position of the system backplane and through TDO and TDI series connection, and the TMS and the TCK are connected in a one-drive-multi mode.
5. The FPGA application system wireless debugging downloading device of claim 4, further comprising:
the multiple FPGA devices are connected in series in a wireless mode, JTAG wireless transmission functions are designed for all modules in the system, and wireless connection between the TDO and the TDI is achieved by selecting the local oscillation frequency of the TDO ultrahigh frequency transmitting channel and the band-pass filter parameters of the TDI ultrahigh frequency receiving channel.
6. The FPGA application system wireless debugging download device of claim 1, wherein the amplitude of the carrier varies with the modulation of the JTAG signal by using ASK modulation principle to generate communication between the debugging computer terminal and the FPGA system main control terminal.
7. The FPGA application system wireless debugging download apparatus of claim 1, wherein the wireless serial connection of JTAG links of multiple devices is completed by adding different carrier frequencies of TDO signal and TDI signal.
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| CN112255598B (en) * | 2020-10-14 | 2023-09-26 | 四川九洲空管科技有限责任公司 | FPGA remote online debugging method, device and system based on optical fiber communication |
| CN116679994B (en) * | 2023-07-21 | 2023-10-31 | 北京汤谷软件技术有限公司 | High-efficiency interface configuration method for FPGA prototype verification platform |
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| 《基于USB虚拟技术的FPGA远程片内调试方法实现》;翟刚毅;《雷达与对抗》;20150630;第35卷(第2期);第42-55页 * |
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