CN109342927A - A kind of measuring signal integrality method and apparatus - Google Patents
A kind of measuring signal integrality method and apparatus Download PDFInfo
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- CN109342927A CN109342927A CN201811293250.3A CN201811293250A CN109342927A CN 109342927 A CN109342927 A CN 109342927A CN 201811293250 A CN201811293250 A CN 201811293250A CN 109342927 A CN109342927 A CN 109342927A
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- oscillograph
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- test data
- circuit
- measuring signal
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
Abstract
The invention discloses a kind of measuring signal integrality method and apparatus, comprising: generates oscillograph control instruction according to oscillograph control parameter and sends an instruction to oscillograph；Make oscillograph according to instruction come from circuit-under-test collecting test data and feedback test data；It stores and analyzes test data to generate test result.Technical solution of the present invention can reduce tester's technical level and require, reduce measurement error, shorten time-consuming for different circuits or different types of circuit progress measuring signal integrality.
Description
Technical field
The present invention relates to the communications fields, and more specifically, more particularly to a kind of measuring signal integrality method and dress
It sets.
Background technique
During hardware circuit design, to guarantee that the system of design meets codes and standards, engineer needs each to system
Part carries out measuring signal integrality and Module System Test.The prior art uses waveform test as common signal
Integrity test means need engineer to understand characteristics of signals and oscilloscope operations in depth and determine to arrange test data, this is right
Tester's technical level is more demanding, and causes measurement error larger because operating repeated height, cumbersome time-consuming.
Aiming at the problem that requirement of tester's technical level in the prior art is high, measurement error is big, time-consuming, at present not yet
There is effective solution scheme.
Summary of the invention
In view of this, the purpose of the embodiment of the present invention is to propose a kind of measuring signal integrality method and apparatus, it can
Measuring signal integrality is carried out for different circuits or different types of circuit, tester's technical level is reduced and requires, reduces
Measurement error shortens time-consuming.
Based on above-mentioned purpose, the one side of the embodiment of the present invention provides a kind of measuring signal integrality method, including with
Lower step:
Oscillograph control instruction is generated according to oscillograph control parameter and sends an instruction to oscillograph；
Make oscillograph according to instruction come from circuit-under-test collecting test data and feedback test data；
It stores and analyzes test data to generate test result.
In some embodiments, oscillograph control parameter includes oscillograph command parameter, make oscillograph according to instruction come
It include: according to oscillograph command parameter come collecting test data from circuit-under-test collecting test data.
In some embodiments, oscillograph command parameter includes at least one of: channel oscilloscope setting, triggering side
Formula, sample mode.
In some embodiments, oscillograph control parameter includes signal essential information parameter, analyzes test data with life
It include: that test result is generated according to signal essential information parameter and test data at test result.
In some embodiments, it is connected between oscillograph and circuit-under-test by detector bar, according to instruction come from tested
Circuit collecting test data include: detector bar to be attached to oscillograph, and pass through detector bar from circuit-under-test collecting test data.
In some embodiments, oscillograph and feedback test data are sent an instruction to carry out by LAN.
In some embodiments, each step in above-mentioned test process is being executed all by being connected to the visual of oscillograph
Change equipment to be configured and monitor.
In some embodiments, generating test result is that the test report of Excel format is generated in visualization device.
The another aspect of the embodiment of the present invention additionally provides a kind of measuring signal integrality device, comprising:
Oscillograph；
At least one processor being connect with oscillograph；With
Memory, memory are stored with the program code that processor can be run, and program code executes above-mentioned when being run
Method.
In some embodiments, oscillograph is connect with processor by bus.
The present invention has following advantageous effects: measuring signal integrality method provided in an embodiment of the present invention and dress
It sets, oscillograph control instruction is generated according to oscillograph control parameter and sends an instruction to oscillograph；Make oscillograph according to instruction
Come from circuit-under-test collecting test data and feedback test data；It stores and analyzes test data to generate the technology of test result
Scheme can carry out measuring signal integrality for different circuits or different types of circuit, reduce tester's technical level
It is required that, reduce measurement error, shorten it is time-consuming.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
Other embodiments are obtained according to these attached drawings.
Fig. 1 is the flow diagram of measuring signal integrality method provided by the invention；
Fig. 2 is the structural schematic diagram of measuring signal integrality method provided by the invention；
Fig. 3 is the internal structure chart of measuring signal integrality method provided by the invention.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference
The embodiment of the present invention is further described in attached drawing.
It should be noted that all statements for using " first " and " second " are for differentiation two in the embodiment of the present invention
The non-equal entity of a same names or non-equal parameter, it is seen that " first ", " second " do not answer only for the convenience of statement
It is interpreted as the restriction to the embodiment of the present invention, subsequent embodiment no longer illustrates this one by one.
Based on above-mentioned purpose, the first aspect of the embodiment of the present invention, proposing one kind can for different circuits or not
The circuit of same type carries out the embodiment of the method for measuring signal integrality.Shown in fig. 1 is signal integrity provided by the invention
The flow diagram of the embodiment of property test method.
The measuring signal integrality method, comprising the following steps:
Step S101 generates oscillograph control instruction according to oscillograph control parameter and sends an instruction to oscillograph；
Step S103 makes oscillograph according to instruction come from circuit-under-test collecting test data and feedback test data；
Step S105 is stored and is analyzed test data to generate test result.
Those of ordinary skill in the art will appreciate that realizing all or part of the process in above-described embodiment method, Ke Yitong
Computer program is crossed to instruct related hardware and complete, the program can be stored in a computer-readable storage medium,
The program is when being executed, it may include such as the process of the embodiment of above-mentioned each method.Wherein, the storage medium can for magnetic disk,
CD, read-only memory (ROM) or random access memory (RAM) etc..The embodiment of the computer program, Ke Yida
The effect identical or similar to corresponding aforementioned any means embodiment.
In some embodiments, oscillograph control parameter includes oscillograph command parameter, make oscillograph according to instruction come
It include according to oscillograph command parameter come collecting test data from circuit-under-test collecting test data.
In some embodiments, oscillograph command parameter includes at least one of: channel oscilloscope setting, triggering side
Formula, sample mode.
In some embodiments, oscillograph control parameter includes signal essential information parameter, analyzes test data with life
It include that test result is generated according to signal essential information parameter and test data at test result.
Disclosed method is also implemented as the computer program executed by CPU, the calculating according to embodiments of the present invention
Machine program may be stored in a computer readable storage medium.When the computer program is executed by CPU, executes the present invention and implement
The above-mentioned function of being limited in method disclosed in example.Above method step also can use controller and for storing so that controlling
Device realizes that the computer readable storage medium of the computer program of above-mentioned steps function is realized.
In some embodiments, it is connected between oscillograph and circuit-under-test by detector bar, according to instruction come from tested
Circuit collecting test data include: detector bar to be attached to oscillograph, and pass through detector bar from circuit-under-test collecting test data.
In some embodiments, oscillograph and feedback test data are sent an instruction to carry out by LAN.
In some embodiments, each step in above-mentioned test process is being executed all by being connected to the visual of oscillograph
Change equipment to be configured and monitor.
In some embodiments, generating test result is that the test report of Excel format is generated in visualization device.
The various illustrative steps in conjunction with described in disclosure herein may be implemented as electronic hardware, computer software or
The combination of the two.In order to clearly demonstrate this interchangeability of hardware and software, with regard to the function of various illustrated steps
General description has been carried out to it.This function be implemented as software be also implemented as hardware depending on concrete application with
And it is applied to the design constraint of whole system.Those skilled in the art can realize in various ways for every kind of concrete application
The function, but this realization decision should not be interpreted as causing a departure from range disclosed by the embodiments of the present invention.
Carry out the specific embodiment that the present invention is further explained below according to specific embodiment.
The schematic configuration figure and detailed structure view of the invention that Fig. 2,3 are shown.As shown in Figure 2,3, the present invention is made
Component include: control computer (including parameter setting module, data analysis module, database), oscillograph (including signal survey
Measure module) and circuit-under-test plate.Control computer is connect by LAN with oscillograph, and control computer and the direct data of oscillograph pass
Defeated to be realized by LAN, transmission data include oscillograph control instruction and the test data that oscillograph returns.Oscillograph passes through detection
Stick (Probe) connects circuit-under-test plate, and the signal that probe monitors is the data source that oscillograph needs to acquire.Control computer
Parameter setting module sends oscillograph control parameter to oscillograph, and oscillograph receives parameter command and grabs test data, tests number
It is stored in database according to control computer is returned, the data in data analysis module analytical database finally obtain test report.
Wherein, parameter setting module mainly includes signal essential information parameter and oscillograph command parameter.Signal is believed substantially
Parameter is ceased to arrange for user report, oscillograph command parameter includes channel oscilloscope setting, triggering mode, sample mode etc.,
For controlling oscillograph.Database is used for the test data that storage oscillograph obtains, convenient for carrying out file to each test signal terms
Management.Data analysis module integration testing is as a result, output test report.
In addition, the present invention uses Visual Studio as exploitation the integration environment, window circle is designed using C# language
Face is to facilitate user intuitively to configure and understand the progress of work.Window interface include parameter setting interface (for connect oscillograph,
Identify project title, each surveys item parameter of setting), signal testing interface is (for determining signal name, carrying out actually to various types of signal
Test, display test process) and data assay surface (for reporting the test report for arranging, exporting Excel format).
In one or more exemplary designs, the function can be real in hardware, software, firmware or any combination thereof
It is existing.If realized in software, can be stored in using the function as one or more instruction or code computer-readable
It is transmitted on medium or by computer-readable medium.Computer-readable medium includes computer storage media and communication media,
The communication media includes any medium for helping for computer program to be transmitted to another position from a position.Storage medium
It can be any usable medium that can be accessed by a general purpose or special purpose computer.As an example and not restrictive, the computer
Readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disc memory apparatus, disk storage equipment or other magnetic
Property storage equipment, or can be used for carry or storage form be instruct or data structure required program code and can
Any other medium accessed by general or specialized computer or general or specialized processor.In addition, any connection is ok
It is properly termed as computer-readable medium.For example, if using coaxial cable, optical fiber cable, twisted pair, digital subscriber line
(DSL) or such as wireless technology of infrared ray, radio and microwave to send software from website, server or other remote sources,
Then above-mentioned coaxial cable, optical fiber cable, twisted pair, DSL or such as wireless technology of infrared ray, radio and microwave are included in
The definition of medium.As used herein, disk and CD include compact disk (CD), laser disk, CD, digital versatile disc
(DVD), floppy disk, Blu-ray disc, wherein disk usually magnetically reproduce data, and CD using laser optics reproduce data.On
The combination for stating content should also be as being included in the range of computer-readable medium.
From above-described embodiment as can be seen that measuring signal integrality method provided in an embodiment of the present invention, according to oscillograph
Control parameter generates oscillograph control instruction and sends an instruction to oscillograph；Make oscillograph according to instruction to adopt from circuit-under-test
Collect test data and feedback test data；It stores and analyzes test data to generate the technical solution of test result, can be directed to
Different circuits or different types of circuit carry out measuring signal integrality, reduce tester's technical level and require, reduce measurement
Error shortens time-consuming.
It is important to note that each step in each embodiment of above-mentioned measuring signal integrality method can be with
It intersects, replace, increase, delete, therefore, these reasonable permutation and combination transformation are also answered in measuring signal integrality method
When belonging to the scope of protection of the present invention, and protection scope of the present invention should not be confined on the embodiment.
Based on above-mentioned purpose, the second aspect of the embodiment of the present invention, proposing one kind can for different circuits or not
The circuit of same type carries out the embodiment of the device of measuring signal integrality.Described device includes:
Oscillograph；
At least one processor being connect with oscillograph；With
Memory, memory are stored with the program code that processor can be run, and program code executes above-mentioned when being run
Method.
In some embodiments, oscillograph is connect with processor by bus
It can be various electric terminal equipments, such as mobile phone, a number that the embodiment of the present invention, which discloses described device, equipment etc.,
Word assistant (PDA), tablet computer (PAD), smart television etc., are also possible to large-scale terminal device, such as server, therefore this hair
Protection scope disclosed in bright embodiment should not limit as certain certain types of device, equipment.The embodiment of the present invention discloses described
Client can be with the combining form of electronic hardware, computer software or both be applied to any one of the above electric terminal
In equipment.
Computer readable storage medium (such as memory) as described herein can be volatile memory or non-volatile
Memory, or may include both volatile memory and nonvolatile memory.As an example and not restrictive, it is non-easy
The property lost memory may include read-only memory (ROM), programming ROM (PROM), electrically programmable ROM (EPROM), electrically-erasable
Programming ROM (EEPROM) or flash memory.Volatile memory may include random access memory (RAM), which can
To serve as external cache.As an example and not restrictive, RAM can be obtained in a variety of forms, such as synchronous
RAM (DRAM), dynamic ram (DRAM), synchronous dram (SDRAM), double data rate SDRAM (DDR SDRAM), enhancing SDRAM
(ESDRAM), synchronization link DRAM (SLDRAM) and directly Rambus RAM (DRRAM).The storage of disclosed aspect is set
The standby memory for being intended to including but not limited to these and other suitable type.
The various exemplary testing apparatus in conjunction with described in disclosure herein, which can use, to be designed to execute here
The following component of the function is realized or is executed: general processor, digital signal processor (DSP), specific integrated circuit
(ASIC), field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hard
Any combination of part component or these components.General processor can be microprocessor, but alternatively, and processor can be with
It is any conventional processors, controller, microcontroller or state machine.Processor also may be implemented as calculating the combination of equipment,
For example, the combination of DSP and microprocessor, multi-microprocessor, one or more microprocessors combination DSP and/or any other
This configuration.
From above-described embodiment as can be seen that measuring signal integrality device provided in an embodiment of the present invention, according to oscillograph
Control parameter generates oscillograph control instruction and sends an instruction to oscillograph；Make oscillograph according to instruction to adopt from circuit-under-test
Collect test data and feedback test data；It stores and analyzes test data to generate the technical solution of test result, can be directed to
Different circuits or different types of circuit carry out measuring signal integrality, reduce tester's technical level and require, reduce measurement
Error shortens time-consuming.
It is important to note that the embodiment of above-mentioned measuring signal integrality device is surveyed using the signal integrity
The embodiment of method for testing illustrates the course of work of each module, and those skilled in the art can be it is readily conceivable that by these
Module application is into the other embodiments of the measuring signal integrality method.Certainly, due to the measuring signal integrality side
Each step in method embodiment can be intersected, replaces, increases, be deleted, therefore, these reasonable permutation and combination transformation
Should also be as belonging to the scope of protection of the present invention in the measuring signal integrality device, and should not be by protection model of the invention
It encloses and is confined on the embodiment.
It is exemplary embodiment disclosed by the invention above, it should be noted that in the sheet limited without departing substantially from claim
Under the premise of inventive embodiments scope of disclosure, it may be many modifications and modify.According to open embodiment described herein
The function of claim to a method, step and/or movement be not required to the execution of any particular order.In addition, although the present invention is implemented
Element disclosed in example can be described or be required in the form of individual, but be unless explicitly limited odd number, it is understood that be multiple.
It should be understood that it is used in the present context, unless the context clearly supports exceptions, singular " one
It is a " it is intended to also include plural form.It is to be further understood that "and/or" used herein refers to including one or one
Any and all possible combinations of a above project listed in association.The embodiment of the present invention discloses embodiment sequence number
Description, does not represent the advantages or disadvantages of the embodiments.
It should be understood by those ordinary skilled in the art that: the discussion of any of the above embodiment is exemplary only, not
It is intended to imply that range disclosed by the embodiments of the present invention (including claim) is limited to these examples；In the think of of the embodiment of the present invention
Under road, it can also be combined between the technical characteristic in above embodiments or different embodiments, and exist as described above
Many other variations of the different aspect of the embodiment of the present invention, for simplicity, they are not provided in details.Therefore, all at this
Within the spirit and principle of inventive embodiments, any omission, modification, equivalent replacement, improvement for being made etc. should be included in this hair
Within the protection scope of bright embodiment.
Claims (10)
1. a kind of measuring signal integrality method, which comprises the following steps:
Oscillograph control instruction is generated according to oscillograph control parameter and sends oscillograph for described instruction；
Make the oscillograph according to described instruction from circuit-under-test collecting test data and to feed back the test data；
It stores and analyzes the test data to generate test result.
2. the method according to claim 1, wherein the oscillograph control parameter includes oscillograph order ginseng
Number makes the oscillograph according to described instruction to include: to join according to the oscillograph order from circuit-under-test collecting test data
Number carrys out collecting test data.
3. according to the method described in claim 2, it is characterized in that, the oscillograph command parameter includes at least one of:
Channel oscilloscope setting, triggering mode, sample mode.
4. the method according to claim 1, wherein the oscillograph control parameter includes signal essential information ginseng
Number, analyzing the test data to generate test result includes: according to the signal essential information parameter and the test data
To generate test result.
5. the method according to claim 1, wherein passing through detection between the oscillograph and the circuit-under-test
Stick connection includes: that the detector bar is attached to described show from the circuit-under-test collecting test data according to described instruction
Wave device, and by the detector bar from the circuit-under-test collecting test data.
6. the method according to claim 1, wherein sending oscillograph for described instruction and feeding back the test
Data are carried out by LAN.
7. the method according to claim 1, wherein executing each step in above-mentioned test process all by even
The visualization device for being connected to the oscillograph is configured and monitors.
8. the method according to the description of claim 7 is characterized in that generating the test result is in the visualization device
Generate the test report of Excel format.
9. a kind of measuring signal integrality device characterized by comprising
Oscillograph；
At least one processor being connect with the oscillograph；With
Memory, the memory are stored with the program code that processor can be run, said program code execution when being run
Method as described in any one of claim 1-9.
10. device according to claim 9, wherein the oscillograph is connect with the processor by bus.
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| CN109188146A (en) * | 2018-09-21 | 2019-01-11 | 郑州云海信息技术有限公司 | A kind of SI test spy platform device |
| CN110850136A (en) * | 2019-11-12 | 2020-02-28 | 深圳宝龙达信创科技股份有限公司 | Oscilloscope test method, terminal equipment and computer readable storage medium |
| CN111352041A (en) * | 2020-02-29 | 2020-06-30 | 苏州浪潮智能科技有限公司 | Power supply time sequence measuring method and device |
| CN111693885A (en) * | 2020-05-28 | 2020-09-22 | 苏州浪潮智能科技有限公司 | Power supply time sequence measuring method and device |
| CN113918741A (en) * | 2021-09-07 | 2022-01-11 | 中科可控信息产业有限公司 | Data processing method, device, system, computer equipment and storage medium |
| CN116453582A (en) * | 2023-06-14 | 2023-07-18 | 合肥康芯威存储技术有限公司 | Signal testing system and method for memory |
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| CN116453582A (en) * | 2023-06-14 | 2023-07-18 | 合肥康芯威存储技术有限公司 | Signal testing system and method for memory |
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Application publication date: 20190215 |