CN109342860A - Full size circuit dynamic response data acquisition device - Google Patents
Full size circuit dynamic response data acquisition device Download PDFInfo
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- CN109342860A CN109342860A CN201811471844.9A CN201811471844A CN109342860A CN 109342860 A CN109342860 A CN 109342860A CN 201811471844 A CN201811471844 A CN 201811471844A CN 109342860 A CN109342860 A CN 109342860A
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Abstract
The present invention relates to road data acquisition equipment technical field more particularly to full size circuit dynamic response data acquisition device, power supply system, signal enhancement system, data processing system, data communication system are provided in device；The present invention uses high-speed data processing system and independent data storage circuitry, can improve frequency acquisition, effectively meets real data acquisition demand.
Description
Technical field
The present invention relates to road data acquisition equipment technical field more particularly to full size circuit dynamic response data acquisition dresses
It sets.
Background technique
In recent years, with China to road structure study gradually deeply, traditional theory analysis and experimental method is very
Difficulty effectively verifies new theory, new method.For this purpose, by construction full size circular track test road and embedded a large amount of wherein
Sensor acquires the internal response data of road, further will obtain more full and accurate basic data for road research, is road
The offers support such as breakthrough of the Study on thinning of model, existing theoretical bottleneck.However, the response due to road internal structure to load
Signal is very faint and the duration is shorter, it is therefore desirable to which dedicated equipment is acquired response data.
There are following technical problems for the acquisition of realization road internal structure dynamic response data: (1) adding due to needing to capture
Instant response when carrier vehicle passes through inside road, therefore dynamic acquisition device should have higher frequency acquisition, it is generally big
In 2000Hz.(2) feature more faint due to extraneous environmental noise and dynamic response signal itself, acquisition device should be able to have
The reduction noise signal of effect and the virtual value for improving signal.(3) it is led since dynamic acquisition frequency is higher and number of sensors is numerous
Cause whole acquisition data volume larger, it is therefore desirable to carry out data prediction to it in data acquisition, reduce invalid data and improve
Data sole mass.
Currently, still without the device for the acquisition of full size circuit dynamic response data, although general sensor acquisition is set
It is standby commonplace, but the functions such as its sample frequency, data-handling capacity are not well positioned to meet actual demand.General acquisition
Equipment is designed mainly for low packing density or the not high operating condition of required precision, therefore full size circuit dynamic response data
Acquisition needs dedicated device to complete.
Summary of the invention
The object of the present invention is to provide a kind of acquisition device of road internal structure dynamic response, which can quickly be caught
Road internal structure response when load vehicle passes through is caught, while data being pre-processed and being stored, is subsequent Machining Analysis
And related roads research provides basis.
The present invention provides following solution:
Full size circuit dynamic response data acquisition device, is provided with power supply system in device, at signal enhancement system, data
Reason system, data communication system；
The power supply system includes electric power management circuit, voltage detecting circuit and ripple suppression circuit, the ripple suppression
Circuit input end processed is connect with external power supply, and the voltage detecting circuit is connect with ripple suppression circuit output end, the power supply
Management circuit is also connect with the voltage detecting circuit and ripple suppression circuit respectively；
Wherein the ripple suppression circuit includes operational amplifier U1, capacitor C1, capacitor C2, capacitor C3, resistance R1, resistance
R2, resistance R3, resistance R4；Wherein one end of the R1 is connect with external power supply, the other end of the resistance R1 and the operation
The non-inverting input terminal of amplifier U1 connects；One end of the resistance R2 is connect with the inverting input terminal of the operational amplifier U1,
The other end of resistance R2 is grounded；One end of the resistance R3 is connect with the inverting input terminal of the operational amplifier U1, resistance R3
The other end connect with the output end of operational amplifier U1, the output end of one end of the resistance R4 and the operational amplifier U1
Connection, the resistance R4 other end are connect with ripple suppression circuit output end CH1；The capacitor C1 is separately connected the operational amplifier
The inverting input terminal and output end of U1, one end of the capacitor C2 are connect with the output end of the operational amplifier U1, the other end
Ground connection；One end of the capacitor C3 is connect with ripple suppression circuit output end CH1, other end ground connection；
Wherein the voltage detecting circuit includes operational amplifier U2, capacitor C4, capacitor C5, zener diode Z1, resistance
R5, resistance R6, resistance R7, resistance R8, resistance R9；The wherein inverting input terminal of one end of resistance R5 and the operational amplifier U2
Connection, the other end of resistance R5 are connect with the output end of the operational amplifier U2；One end of the resistance R6 and the operation
The non-inverting input terminal of amplifier U2 connects, and the other end is connect with ripple suppression circuit output end CH1；Resistance R8 connects with resistance R9
One end afterwards is connect with the non-inverting input terminal of the operational amplifier U2, and the other end after resistance R8 connects with resistance R9 passes through electricity
Hold C5 ground connection；One end of resistance R7 is connect with the common end of resistance R8 and resistance R9, the other end ground connection of resistance R7；Capacitor C4's
One end is connect with the output end of the operational amplifier U2, the other end ground connection of capacitor C4, the anode of the zener diode Z1
Ground connection, cathode are connect with the output end of the operational amplifier U2, and the voltage detecting circuit output end CH2 is put with the operation
The output end connection of big device U2；The electric power management circuit is also examined with the ripple suppression circuit output end CH1 and voltage respectively
The CH2 connection of slowdown monitoring circuit output end；
The signal enhancement system includes signal amplifier circuit and signal filter circuit, the signal amplification circuit input
End is connect with external sensor interface, and the signal amplification circuit output end is connect with the input terminal of the signal filter circuit；
The data processing system includes signal acquisition circuit, data computing cicuit and data storage circuitry, the signal
The input terminal of Acquisition Circuit and the output end of signal filter circuit connect, the output end of the signal acquisition circuit and the data
The input terminal of counting circuit connects, and the output end of the data computing cicuit is connect with data storage circuitry；
The input terminal of the data communication system is connect with the data storage circuitry, the output of the data communication system
End is connect with external network.
Wherein, the electric power management circuit includes voltage checking chip U3, freewheeling diode Z2, afterflow inductance H1, capacitor
C6, capacitor C7, capacitor C8, capacitor C9, capacitor C10, capacitor C11, capacitor C12, capacitor C13, capacitor C14, capacitor C15, resistance
10, resistance 11, resistance 12, resistance 13, resistance 14, resistance 15；One end and voltage after wherein the capacitor C6 and capacitor C7 are in parallel
The first connection jaws of detection chip U3 connect, and other end ground connection, the one end the capacitor C8 connects with the second of voltage checking chip U3
The third connection jaws of the connection of line mouth, other end ground connection, the voltage detecting circuit output end CH2 and voltage checking chip U3 connect
It connects, the third connection jaws of the voltage checking chip U3 also pass through resistance R10 and are grounded, and the 5th of the voltage checking chip U3 connects
Line mouth is connect by capacitor C9 with the 7th connection jaws of the voltage checking chip U3, and the 5th of the voltage checking chip U3 connects
Line mouth is connect by afterflow inductance H1 with the ripple suppression circuit output end CH1, and the afterflow inductance H1 also passes through capacitor C10
It is connect with the 6th connection jaws of the voltage checking chip U3, the afterflow inductance H1 also passes sequentially through resistance 11, resistance 12 connects
Ground, resistance 11 and the common end of resistance 12 connect the 6th connection jaws of the voltage checking chip U3；The freewheeling diode Z2
Cathode connect with the 5th connection jaws of the voltage checking chip U3, the plus earth of the freewheeling diode Z2, the electricity
One end is connect with one end of afterflow inductance H1 after holding C11, capacitor C12, capacitor C13, capacitor C14 parallel connection, other end ground connection, resistance
13, one end connect other end ground connection, the resistance 14 and resistance 15 with one end of afterflow inductance H1 after resistance 14, resistance 15 are connected
Common end be grounded by capacitor C15.
Wherein, the signal amplifier circuit and signal filter circuit include operational amplifier U4, signal arrange chip U5,
Capacitor C16, capacitor C17, capacitor C18, capacitor C19, resistance R16, resistance R17, resistance R18, resistance R19, resistance R20, resistance
R21, resistance R22, resistance R23；One end of the resistance R21 is connect with the positive input terminal of the operational amplifier U4, the electricity
The other end of resistance R21 connects positive pole by resistance R19, and the other end of the resistance R21 also passes through resistance R20 and is grounded, described
The first pin that the negative input end of operational amplifier U4 and the signal arrange chip U5 connect, one end of the resistance R18 and
The negative input end of the operational amplifier U4 connects, and the other end of the resistance R18 is grounded by resistance R17, the resistance R18
It is also connected by the output end of capacitor C16 and electric power management circuit, one end of the resistance R16 and the signal arrange chip U5
Second pin connection, another termination positive pole of the resistance R16, the other end of the resistance R16 also passes through capacitor C17
Ground connection, the 5th pin that the signal arranges chip U5 are connect by resistance R22 with the output end of operational amplifier U4, the letter
The 6th pin for number arranging chip U5 is grounded by capacitor C18, and the 7th pin of signal arrangement chip U5 passes sequentially through electricity
Hold C19, resistance R23 is connect with the output end of operational amplifier U4.
Wherein, the Acquisition Circuit includes signal acquisition chip U5, operational amplifier U6, capacitor C20, capacitor C21, capacitor
C22, resistance R24, resistance R25, resistance R26, resistance R27, resistance R28, resistance R29, diode Z3；Signal acquisition chip U5's
First pin is connect by resistance R24 with the signal amplifier circuit, and the first pin of signal acquisition chip U5 also passes through electricity
Hold C21 ground connection, the third pin of signal acquisition chip U5 is connect by resistance R25 with the electric power management circuit, signal acquisition
The third pin of chip U5 also passes through capacitor C20 and is grounded, and resistance R26 and resistance R27 connect one end and signal acquisition chip U5
The connection of 6th pin, the other end are connect with the positive input terminal of operational amplifier U6, and the common end of resistance R26 and resistance R27 pass through
Capacitor C22 ground connection, the plus earth of the diode Z3, the cathode of the diode Z3 are public with resistance R26's and resistance R27
End connection, the negative input end of operational amplifier U6 are grounded by resistance R28, and the negative input end of operational amplifier U6 also passes through resistance
R29 is connect with the output end of operational amplifier U6.
Wherein, full size circuit dynamic response data acquisition device, including crust of the device are provided with electricity on described device shell
Source connector, network connector and sensor connector；
The ripple suppression circuit input terminal is connect by the power connector with external power supply；
The output end of the data communication system is connect by the network connector with external network；
The signal amplification circuit input terminal is connect by the sensor connector with external sensor interface.
Preferably, sensor connector is two or more.
Wherein, the ripple suppression circuit includes multistage capacitor, multistage inductance.
Compared with prior art, full size circuit dynamic response data acquisition device of the invention:
1. realizing the capture to road internal structure dynamic response process by high frequency sampling
The sample frequency for acquiring equipment in the prior art is generally lower, generally only 100-200Hz, since load vehicle is fast
Road internal response process only has a few tens of milliseconds when speed passes through, therefore can not collect complete response data.The present invention uses
High-speed data processing system and independent data storage circuitry can improve frequency acquisition to 2KHz or more, effective full
Foot real data acquires demand.
2. faint Signal with high noise to be switched to the useful signal of high s/n ratio by signal enhancement system
Road internal response signal is very faint in the prior art and external noise is relatively large, and general data is caused to be adopted
The valid data of collection equipment acquisition are buried in noise can not normal use.This practical information increases by using the signal of high quality
Strong system effectively reduces ambient noise, and the ability for improving valid data can be acquired reliably.
3. realizing data prediction function by data computing cicuit
Since the frequency acquisition of dynamic response data needs is high, data volume is big, so that needing before being stored to original
Data carry out preliminary pretreatment, and common apparatus in the prior art does not have correlation function.The present invention can be according to foot
The demand of ruler circuit road internal structure response data realizes data prediction function, substantially reduces storage and data transmission
Pressure.
It is connect 4. the ripple suppression circuit is located at power supply system front end with external power interface, main function is to lead to
The ripple for crossing multistage capacitor, multistage inductance compensation elimination power supply system, provides stable power supply for other systems of the present apparatus
Output.
5. signal amplification circuit is located at signal enhancement system front end, the voltage detecting circuit main function, which is to detect, to be supplied
The input voltage of electric system simultaneously feeds back to electric power management circuit；The electric power management circuit is according to the feedback tune of voltage detecting circuit
Whole internal gain makes voltage keep stablizing.
6. the signal filter circuit is located at signal enhancement system rear end, main function is the method by hardware filtering
Remove the noise signal in data.
7. the signal acquisition circuit main function is the collection of simulant signal of sensor becoming digital signal；It is described
Data computing cicuit main function is that pretreatment is carried out to the signal of acquisition provides preparation for later period application.
8. the control mode using real-time monitoring of the power supply system the advantage is that it can be according to external world's input
Variation maintains the stable power-supplying of internal each system, the work for keeping device more unstable vulnerable to external interference；The letter
Number enhancing system is mainly used for improving the signal-to-noise ratio of road response signal, and the advantage is that can effectively inhibit ambient noise simultaneously
And the energy of tiny signal is improved, road response signal is acquired by data processing system.
9. the data processing system is mainly used for the acquisition, processing and storage of road response signal, energy the advantage is that
Enough pretreatments that road dynamic response data are realized according to the actual loaded feature of full size circuit.
10. the data communication system is mainly used for providing data collected for external equipment, the advantage is that can
It is independent to realize data exchange with external data.
11. described device shell main function is fixed above system, and is provided with external interface, the advantage is that
It is capable of the connection of effective realization device and extraneous other equipment, system.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the full size circuit dynamic response data acquisition device in the embodiment of the present invention.
Fig. 2 is the crust of the device structural representation of the full size circuit dynamic response data acquisition device in the embodiment of the present invention
Figure.
Fig. 3 is the circuit diagram of the ripple suppression circuit in the embodiment of the present invention.
Fig. 4 is the circuit diagram of the voltage detecting circuit in the embodiment of the present invention.
Fig. 5 is the circuit diagram of the electric power management circuit in the embodiment of the present invention.
Fig. 6 is the circuit diagram of the signal amplifier circuit and signal filter circuit in the embodiment of the present invention.
Fig. 7 is the circuit diagram of the Acquisition Circuit in the embodiment of the present invention.
Each label lists as follows in figure:
1-power supply system, 2-signal enhancement systems, 3-data processing systems, 4-data communication systems, the suppression of 5-ripples
Circuit processed, 6-voltage detecting circuits, 7-electric power management circuits, 8-signal amplifier circuits, 9-signal filter circuits, 10-
Signal acquisition circuit, 11-data storage circuitries, 12-data computing cicuits, 13-power connectors, the connection of 14-sensors
Device, 15-network connectors.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawing and specific implementation
Invention is further described in detail for mode.
With reference to shown in Fig. 1,2,3,4, full size circuit dynamic response data acquisition device is provided with power supply system 1 in device,
Signal enhancement system 2, data processing system 3, data communication system 4；
The power supply system 1 includes electric power management circuit 7, voltage detecting circuit 6 and ripple suppression circuit 5, the line
5 input terminal of wave suppression circuit is connect with external power supply, and the voltage detecting circuit 6 is connect with 5 output end of ripple suppression circuit, institute
Electric power management circuit 7 is stated also to connect with the voltage detecting circuit 6 and ripple suppression circuit 5 respectively；
Wherein the ripple suppression circuit includes operational amplifier U1, capacitor C1, capacitor C2, capacitor C3, resistance R1, resistance
R2, resistance R3, resistance R4；Wherein one end of the R1 is connect with external power supply, the other end of the resistance R1 and the operation
The non-inverting input terminal of amplifier U1 connects；One end of the resistance R2 is connect with the inverting input terminal of the operational amplifier U1,
The other end of resistance R2 is grounded；One end of the resistance R3 is connect with the inverting input terminal of the operational amplifier U1, resistance R3
The other end connect with the output end of operational amplifier U1, the output end of one end of the resistance R4 and the operational amplifier U1
Connection, the resistance R4 other end are connect with ripple suppression circuit output end CH1；The capacitor C1 is separately connected the operational amplifier
The inverting input terminal and output end of U1, one end of the capacitor C2 are connect with the output end of the operational amplifier U1, the other end
Ground connection；One end of the capacitor C3 is connect with ripple suppression circuit output end CH1, other end ground connection；
Wherein the voltage detecting circuit includes operational amplifier U2, capacitor C4, capacitor C5, zener diode Z1, resistance
R5, resistance R6, resistance R7, resistance R8, resistance R9；The wherein inverting input terminal of one end of resistance R5 and the operational amplifier U2
Connection, the other end of resistance R5 are connect with the output end of the operational amplifier U2；One end of the resistance R6 and the operation
The non-inverting input terminal of amplifier U2 connects, and the other end is connect with ripple suppression circuit output end CH1；Resistance R8 connects with resistance R9
One end afterwards is connect with the non-inverting input terminal of the operational amplifier U2, and the other end after resistance R8 connects with resistance R9 passes through electricity
Hold C5 ground connection；One end of resistance R7 is connect with the common end of resistance R8 and resistance R9, the other end ground connection of resistance R7；Capacitor C4's
One end is connect with the output end of the operational amplifier U2, the other end ground connection of capacitor C4, the anode of the zener diode Z1
Ground connection, cathode are connect with the output end of the operational amplifier U2, and the voltage detecting circuit output end CH2 is put with the operation
The output end connection of big device U2；The electric power management circuit is also examined with the ripple suppression circuit output end CH1 and voltage respectively
The CH2 connection of slowdown monitoring circuit output end；
The signal enhancement system 2 includes signal amplifier circuit 8 and signal filter circuit 9, the signal amplification circuit 8
Input terminal is connect with external sensor interface, the input terminal of 8 output end of signal amplification circuit and the signal filter circuit 9
Connection；
The data processing system 3 includes signal acquisition circuit 10, data computing cicuit 12 and data storage circuitry 11, institute
The input terminal for stating signal acquisition circuit 10 is connect with the output end of signal filter circuit 9, the output of the signal acquisition circuit 10
End is connect with the input terminal of the data computing cicuit 12, the output end and data storage circuitry 11 of the data computing cicuit 12
Connection；
The input terminal of the data communication system 4 is connect with the data storage circuitry 11, the data communication system 4
Output end is connect with external network.
Wherein, full size circuit dynamic response data acquisition device, including crust of the device are provided with electricity on described device shell
Source connector 13, network connector 14 and sensor connector 15；
5 input terminal of ripple suppression circuit is connect by the power connector 13 with external power supply；
The output end of the data communication system 4 is connect by the network connector 14 with external network；
8 input terminal of signal amplification circuit is connect by the sensor connector 14 with external sensor interface.
Refering to what is shown in Fig. 5, the electric power management circuit includes voltage checking chip U3, freewheeling diode Z2, afterflow inductance
H1, capacitor C6, capacitor C7, capacitor C8, capacitor C9, capacitor C10, capacitor C11, capacitor C12, capacitor C13, capacitor C14, capacitor
C15, resistance 10, resistance 11, resistance 12, resistance 13, resistance 14, resistance 15；Wherein the capacitor C6 and capacitor C7 parallel connection are latter
End is connect with the first connection jaws of voltage checking chip U3, other end ground connection, the one end the capacitor C8 and voltage checking chip U3
The connection of the second connection jaws, other end ground connection, the third of the voltage detecting circuit output end CH2 and voltage checking chip U3 connects
The connection of line mouth, the third connection jaws of the voltage checking chip U3 also pass through resistance R10 and are grounded, the voltage checking chip U3's
5th connection jaws are connect by capacitor C9 with the 7th connection jaws of the voltage checking chip U3, the voltage checking chip U3's
5th connection jaws are connect by afterflow inductance H1 with the ripple suppression circuit output end CH1, and the afterflow inductance H1 also passes through
Capacitor C10 is connect with the 6th connection jaws of the voltage checking chip U3, and the afterflow inductance H1 also passes sequentially through resistance 11, electricity
12 ground connection of resistance, resistance 11 connect the 6th connection jaws of the voltage checking chip U3 with the common end of resistance 12；The afterflow two
The cathode of pole pipe Z2 is connect with the 5th connection jaws of the voltage checking chip U3, the plus earth of the freewheeling diode Z2,
One end is connect with one end of afterflow inductance H1 after the capacitor C11, capacitor C12, capacitor C13, capacitor C14 parallel connection, another termination
Ground, one end connect other end ground connection, the resistance 14 with one end of afterflow inductance H1 after resistance 13, resistance 14, resistance 15 are connected
It is grounded with the common end of resistance 15 by capacitor C15.
Refering to what is shown in Fig. 6, the signal amplifier circuit and signal filter circuit include operational amplifier U4, signal arrangement
Chip U5, capacitor C16, capacitor C17, capacitor C18, capacitor C19, resistance R16, resistance R17, resistance R18, resistance R19, resistance
R20, resistance R21, resistance R22, resistance R23；The positive input terminal of one end of the resistance R21 and the operational amplifier U4 connect
It connects, the other end of the resistance R21 connects positive pole by resistance R19, and the other end of the resistance R21 also passes through resistance R20
The negative input end of ground connection, the operational amplifier U4 is connect with the first pin that the signal arranges chip U5, the resistance R18
One end connect with the negative input end of the operational amplifier U4, the other end of the resistance R18 is grounded by resistance R17, institute
State the output end connection that resistance R18 also passes through capacitor C16 and electric power management circuit, one end of the resistance R16 and the signal
The second pin connection of chip U5 is arranged, another termination positive pole of the resistance R16, the other end of the resistance R16 is also
It is grounded by capacitor C17, the 5th pin that the signal arranges chip U5 passes through the output end of resistance R22 and operational amplifier U4
Connection, the 6th pin that the signal arranges chip U5 are grounded by capacitor C18, and the signal arranges the 7th pin of chip U5
Pass sequentially through capacitor C19, resistance R23 is connect with the output end of operational amplifier U4.
Refering to what is shown in Fig. 7, the Acquisition Circuit includes signal acquisition chip U5, operational amplifier U6, capacitor C20, capacitor
C21, capacitor C22, resistance R24, resistance R25, resistance R26, resistance R27, resistance R28, resistance R29, diode Z3；Signal acquisition
The first pin of chip U5 is connect by resistance R24 with the signal amplifier circuit, the first pin of signal acquisition chip U5
Also it is grounded by capacitor C21, the third pin of signal acquisition chip U5 is connect by resistance R25 with the electric power management circuit,
The third pin of signal acquisition chip U5 also passes through capacitor C20 and is grounded, and resistance R26 and resistance R27 connect one end and signal acquisition
The 6th pin of chip U5 connects, and the other end is connect with the positive input terminal of operational amplifier U6, the public affairs of resistance R26 and resistance R27
End is grounded by capacitor C22 altogether, the plus earth of the diode Z3, the cathode and resistance R26 and resistance of the diode Z3
The common end of R27 connects, and the negative input end of operational amplifier U6 is grounded by resistance R28, the negative input end of operational amplifier U6
Also it is connect by resistance R29 with the output end of operational amplifier U6.
Preferably, sensor connector 14 is two or more.
Wherein, the ripple suppression circuit 5 includes multistage capacitor, multistage inductance.
It will be apparent to those skilled in the art that can make various other according to the above description of the technical scheme and ideas
Corresponding change and deformation, and all these changes and deformation all should belong to the protection scope of the claims in the present invention
Within.
Claims (7)
1. full size circuit dynamic response data acquisition device, which is characterized in that be provided with power supply system, signal enhancing system in device
System, data processing system, data communication system；
The power supply system includes electric power management circuit, voltage detecting circuit and ripple suppression circuit, the Ripple Suppression electricity
Road input terminal is connect with external power supply, and the voltage detecting circuit is connect with ripple suppression circuit output end, the power management
Circuit is also connect with the voltage detecting circuit and ripple suppression circuit respectively；
Wherein the ripple suppression circuit include operational amplifier U1, capacitor C1, capacitor C2, capacitor C3, resistance R1, resistance R2,
Resistance R3, resistance R4；Wherein one end of the R1 is connect with external power supply, the other end and the operation amplifier of the resistance R1
The non-inverting input terminal of device U1 connects；One end of the resistance R2 is connect with the inverting input terminal of the operational amplifier U1, resistance
The other end of R2 is grounded；One end of the resistance R3 is connect with the inverting input terminal of the operational amplifier U1, and resistance R3's is another
One end is connect with the output end of operational amplifier U1, and the output end of one end of the resistance R4 and the operational amplifier U1 connect
It connects, the resistance R4 other end is connect with ripple suppression circuit output end CH1；The capacitor C1 is separately connected the operational amplifier U1
Inverting input terminal and output end, one end of the capacitor C2 connect with the output end of the operational amplifier U1, another termination
Ground；One end of the capacitor C3 is connect with ripple suppression circuit output end CH1, other end ground connection；
Wherein the voltage detecting circuit includes operational amplifier U2, capacitor C4, capacitor C5, zener diode Z1, resistance R5, electricity
Hinder R6, resistance R7, resistance R8, resistance R9；Wherein one end of resistance R5 is connect with the inverting input terminal of the operational amplifier U2,
The other end of resistance R5 is connect with the output end of the operational amplifier U2；One end of the resistance R6 and the operational amplifier
The non-inverting input terminal of U2 connects, and the other end is connect with ripple suppression circuit output end CH1；Resistance R8 connect with resistance R9 after one
End is connect with the non-inverting input terminal of the operational amplifier U2, and the other end after resistance R8 connects with resistance R9 is connect by capacitor C5
Ground；One end of resistance R7 is connect with the common end of resistance R8 and resistance R9, the other end ground connection of resistance R7；One end of capacitor C4 with
The output end of the operational amplifier U2 connects, and the other end ground connection of capacitor C4, the plus earth of the zener diode Z1 is born
Pole is connect with the output end of the operational amplifier U2, the voltage detecting circuit output end CH2 and the operational amplifier U2
Output end connection；The electric power management circuit also respectively with the ripple suppression circuit output end CH1 and voltage detecting circuit
Output end CH2 connection；
The signal enhancement system includes signal amplifier circuit and signal filter circuit, the signal amplification circuit input terminal with
External sensor interface connection, the signal amplification circuit output end are connect with the input terminal of the signal filter circuit；
It includes signal amplifier circuit and signal filter circuit that the data processing system, which includes signal enhancement system described in signal,
The signal amplification circuit input terminal is connect with external sensor interface, and the signal amplification circuit output end and the signal are filtered
The input terminal of wave circuit connects；
Acquisition Circuit, data computing cicuit and data storage circuitry, the input terminal and signal filtered electrical of the signal acquisition circuit
The output end on road connects, and the output end of the signal acquisition circuit is connect with the input terminal of the data computing cicuit, the number
It is connect according to the output end of counting circuit with data storage circuitry；
The input terminal of the data communication system is connect with the data storage circuitry, the output end of the data communication system with
External network connection.
2. full size circuit dynamic response data acquisition device according to claim 1, which is characterized in that the power management
Circuit includes voltage checking chip U3, freewheeling diode Z2, afterflow inductance H1, capacitor C6, capacitor C7, capacitor C8, capacitor C9, electricity
Hold C10, capacitor C11, capacitor C12, capacitor C13, capacitor C14, capacitor C15, resistance 10, resistance 11, resistance 12, resistance 13, electricity
Hinder 14, resistance 15；One end is connect with the first connection jaws of voltage checking chip U3 after wherein the capacitor C6 and capacitor C7 are in parallel,
Other end ground connection, the one end the capacitor C8 are connect with the second connection jaws of voltage checking chip U3, other end ground connection, the voltage
Detection circuit output end CH2 is connect with the third connection jaws of voltage checking chip U3, and the third of the voltage checking chip U3 connects
Line mouth also passes through resistance R10 and is grounded, and the 5th connection jaws of the voltage checking chip U3 pass through capacitor C9 and the voltage detecting
The 7th connection jaws of chip U3 connect, and the 5th connection jaws of the voltage checking chip U3 pass through afterflow inductance H1 and the ripple
The CH1 connection of suppression circuit output end, the afterflow inductance H1 also pass through capacitor C10 and connect with the 6th of the voltage checking chip U3
The connection of line mouth, the afterflow inductance H1 also passes sequentially through resistance 11, resistance 12 is grounded, and resistance 11 is connected with the common end of resistance 12
The 6th connection jaws of the voltage checking chip U3；The of the cathode of the freewheeling diode Z2 and the voltage checking chip U3
The connection of five connection jaws, the plus earth of the freewheeling diode Z2, the capacitor C11, capacitor C12, capacitor C13, capacitor C14 are simultaneously
One end is connect with one end of afterflow inductance H1 after connection, other end ground connection, one end and continuous after resistance 13, resistance 14, resistance 15 are connected
The common end of one end connection other end ground connection of galvanic electricity sense H1, the resistance 14 and resistance 15 is grounded by capacitor C15.
3. full size circuit dynamic response data acquisition device according to claim 2, which is characterized in that the signal amplification
Device circuit and signal filter circuit include operational amplifier U4, signal arrange chip U5, capacitor C16, capacitor C17, capacitor C18,
Capacitor C19, resistance R16, resistance R17, resistance R18, resistance R19, resistance R20, resistance R21, resistance R22, resistance R23；It is described
One end of resistance R21 is connect with the positive input terminal of the operational amplifier U4, and the other end of the resistance R21 passes through resistance R19
Connect positive pole, the other end of the resistance R21 also passes through resistance R20 and is grounded, the negative input end of the operational amplifier U4 with
The signal arranges the first pin connection of chip U5, the negative input of one end of the resistance R18 and the operational amplifier U4
End connection, the other end of the resistance R18 are grounded by resistance R17, and the resistance R18 also passes through capacitor C16 and power management
The output end of circuit connects, and one end of the resistance R16 is connect with the second pin that the signal arranges chip U5, the resistance
Another termination positive pole of R16, the other end of the resistance R16 also pass through capacitor C17 and are grounded, and the signal arranges chip U5
The 5th pin connect with the output end of operational amplifier U4 by resistance R22, the 6th pin of the signal arrangement chip U5
It is grounded by capacitor C18, the 7th pin that the signal arranges chip U5 passes sequentially through capacitor C19, resistance R23 and operation amplifier
The output end of device U4 connects.
4. full size circuit dynamic response data acquisition device according to claim 3, which is characterized in that the Acquisition Circuit
Including signal acquisition chip U5, operational amplifier U6, capacitor C20, capacitor C21, capacitor C22, resistance R24, resistance R25, resistance
R26, resistance R27, resistance R28, resistance R29, diode Z3；The first pin of signal acquisition chip U5 passes through resistance R24 and institute
Signal amplifier circuit connection is stated, the first pin of signal acquisition chip U5 also passes through capacitor C21 and is grounded, signal acquisition chip U5
Third pin connect with the electric power management circuit by resistance R25, the third pin of signal acquisition chip U5 also passes through electricity
Hold C20 ground connection, the one end of connecting resistance R26 and resistance R27 is connect with the 6th pin of signal acquisition chip U5, the other end and operation
The positive input terminal of amplifier U6 connects, and the common end of resistance R26 and resistance R27 are grounded by capacitor C22, the diode Z3's
The cathode of plus earth, the diode Z3 is connect with the common end of resistance R26 and resistance R27, and bearing for operational amplifier U6 is defeated
Enter end to be grounded by resistance R28, the negative input end of operational amplifier U6 also passes through the output end of resistance R29 Yu operational amplifier U6
Connection.
5. full size circuit dynamic response data acquisition device according to claim 4, which is characterized in that outside including device
Shell is provided with power connector, network connector and sensor connector on described device shell；
The ripple suppression circuit input terminal is connect by the power connector with external power supply；
The output end of the data communication system is connect by the network connector with external network；
The signal amplification circuit input terminal is connect by the sensor connector with external sensor interface.
6. full size circuit dynamic response data acquisition device according to claim 5, which is characterized in that sensor connector
It is two or more.
7. full size circuit dynamic response data acquisition device according to claim 1, which is characterized in that the Ripple Suppression
Circuit includes multistage capacitor, multistage inductance.
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| CN201811471844.9A CN109342860B (en) | 2018-12-04 | 2018-12-04 | Full-scale loop dynamic response data acquisition device |
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