CN109338463B - High-purity silicon carbide single crystal substrate - Google Patents
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Abstract
The application discloses a high-purity silicon carbide single crystal substrate, and belongs to the field of semiconductor materials. The high-purity silicon carbide single crystal substrate at least comprises a silicon carbide single crystal substrate surface layer and a silicon carbide single crystal substrate main body layer, wherein the intrinsic point defect concentration of the silicon carbide single crystal substrate surface layer is smaller than that of the silicon carbide single crystal substrate main body layer, and the silicon carbide single crystal substrate has semi-insulating property. The low concentration of intrinsic point defects on the surface layer of the high-purity silicon carbide single crystal substrate ensures that the lattice adaptation degree of GaN and the silicon carbide single crystal is higher when the high-purity silicon carbide single crystal is used as a substrate for GaN epitaxy, so that the quality of the prepared GaN epitaxial layer is better; and the main body layer of the high-purity silicon carbide single crystal has a certain concentration of internal point defects, so that the semi-insulating property of the high-purity silicon carbide single crystal substrate can be maintained.
Description
Technical Field
The application relates to a high-purity silicon carbide single crystal substrate, belonging to the field of semiconductor materials.
Background
A semi-insulating silicon carbide (silicon carbide) single crystal substrate is a preferred semiconductor base material for preparing GaN high-frequency microwave devices, and the semi-insulating silicon carbide (silicon carbide) single crystal substrate can be used for preparing electronic devices with excellent performance depending on excellent performances such as high resistivity and the like of the semi-insulating silicon carbide single crystal substrate; on the other hand, a high degree of matching, which depends on the lattice constants of silicon carbide and GaN, enables good crystalline quality of the heteroepitaxial layer to be obtained.
In terms of implementation methods, the preparation of the semi-insulating silicon carbide single crystal substrate has two implementation modes of doping and high purity. A large number of deep energy level centers are introduced by doping high-concentration vanadium elements, and the Fermi level is pinned at the forbidden band center, so that the semi-insulating property is realized. At present, research shows that high-concentration vanadium doping can trap electrons in a prepared device to cause a back gate effect, so that the performance of the device is reduced and even the device fails. With the development of the technology, a high-purity semi-insulating silicon carbide single crystal substrate which realizes semi-insulating characteristics by reducing the concentration of shallow-level impurities in the crystal to reduce the effective carrier concentration in the crystal and introducing a certain number of intrinsic point defects as deep-level centers for compensation becomes the mainstream.
The achievement of high resistance characteristics of high purity semi-insulating silicon carbide single crystal substrates is based on a low concentration of electrically active impurities within the crystal and a concentration of intrinsic point defects such as carbon vacancies and complexes thereof. Intrinsic point defects are indispensable characteristics for realizing the electrical characteristics of the high-purity semi-insulating crystal, however, the point defects can introduce larger lattice stress to cause lattice distortion, thereby destroying the integrity of the crystal lattice of the silicon carbide single crystal and influencing the crystal lattice parameters of the silicon carbide single crystal to a certain extent. Considering that the lattice parameter mismatch of GaN and silicon carbide single crystal substrate is smaller, which is one of the main reasons for GaN epitaxial growth, the introduction of point defects will increase the lattice adaptation of GaN and silicon carbide, and further reduce the quality of GaN epitaxial layer.
Disclosure of Invention
In order to solve the above problems, the present application provides a high purity silicon carbide single crystal substrate. The high-purity silicon carbide single crystal substrate balances the relationship between the crystal quality of the GaN epitaxial layer and the electrical characteristics of the high-purity silicon carbide crystal, improves the quality of the high-purity silicon carbide single crystal substrate and the lattice matching degree of the high-purity silicon carbide single crystal substrate and the GaN epitaxial layer, and does not influence the realization of the physical properties of the high-purity semi-insulating silicon carbide single crystal substrate.
The high-purity silicon carbide single crystal substrate is characterized by at least comprising a silicon carbide single crystal substrate surface layer and a silicon carbide single crystal substrate main body layer, wherein the intrinsic point defect concentration of the silicon carbide single crystal substrate surface layer is less than that of the silicon carbide single crystal substrate main body layer, and the silicon carbide single crystal substrate has semi-insulating property.
Optionally, the ratio of the thickness of the surface layer of the silicon carbide single crystal substrate to the thickness of the main body layer of the silicon carbide single crystal substrate is 1: 4-25.
Optionally, the high-purity silicon carbide single crystal substrate is composed of a silicon carbide single crystal substrate surface layer and a silicon carbide single crystal substrate main body layer. Furthermore, the high-purity silicon carbide single crystal substrate is composed of a silicon carbide single crystal substrate surface and a silicon carbide single crystal substrate main body layer.
Optionally, the ratio of the surface layer thickness of the silicon carbide single crystal substrate to the thickness of the silicon carbide single crystal substrate is not more than 31%. Further, the ratio of the surface layer thickness of the silicon carbide single crystal substrate to the thickness of the silicon carbide single crystal substrate is 9% -31%. Still further, the lower limit of the ratio of the thickness of the surface layer of the silicon carbide single crystal substrate to the thickness of the silicon carbide single crystal substrate is selected from 10%, 15%, 20%, 25% or 30%, and the upper limit is selected from 10%, 15%, 20%, 25% or 30%.
Optionally, the thickness of the semi-insulating silicon carbide single crystal substrate is 490-510 μm.
Optionally, the concentration of intrinsic point defects in the surface layer of the silicon carbide single crystal substrate at room temperature is not higher than 1 × 1013cm-3Preferably, the concentration of intrinsic point defects in the surface layer of the silicon carbide single crystal substrate at room temperature is not higher than 1 × 1012cm-3。
Optionally, the concentration of intrinsic point defects of the bulk layer of the silicon carbide single crystal substrate is 1 × 1014～1×1016cm-3Preferably, the concentration of intrinsic point defects of the bulk layer of the silicon carbide single crystal substrate is 1 × 1014～1×1015cm-3。
Optionally, the thickness of the surface layer of the semi-insulating silicon carbide single crystal substrate is not more than 150 μm. Optionally, the thickness of the semi-insulating silicon carbide single crystal surface layer is 20-150 μm. Preferably, the thickness of the surface layer of the high-purity silicon carbide single crystal substrate subjected to annealing treatment is 50-150 μm. Further, the lower limit of the thickness of the surface layer of the high purity silicon carbide single crystal substrate subjected to annealing treatment is selected from 55 μm, 70 μm, 90 μm, 110 μm, 130 μm or 140 μm, and the upper limit is selected from 55 μm, 70 μm, 90 μm, 110 μm, 130 μm or 140 μm. Furthermore, the thickness of the surface layer of the high-purity silicon carbide single crystal substrate subjected to annealing treatment is 80-120 μm.
Optionally, the surface layer of the silicon carbide single crystal substrate is basically free of intrinsic point defects at room temperature, and the concentration of the intrinsic point defects of the main body layer of the silicon carbide single crystal substrate is such that the high-purity silicon carbide single crystal substrate has semi-insulating property.
Optionally, the surface layer of the silicon carbide single crystal substrate only contains intrinsic point defects inherent at the temperature at room temperature, and the concentration of the intrinsic point defects of the main body layer of the silicon carbide single crystal substrate enables the high-purity silicon carbide single crystal substrate to have semi-insulating property.
As an embodiment, the surface layer of the silicon carbide single crystal substrate is substantially free of intrinsic point defects at room temperature, and the bulk layer of the silicon carbide single crystal substrate has a concentration of intrinsic point defects of 1 × 1014～1×1016cm-3The thickness ratio of the surface layer of the silicon carbide single crystal substrate to the main body layer of the silicon carbide single crystal substrate in the high-purity silicon carbide single crystal substrate is 1: 4-25. The surface layer of the silicon carbide single crystal substrate basically does not contain intrinsic point defects at room temperature, the concentration of the intrinsic point defects is extremely low, the intrinsic point defects exist in the crystal all the time unless the intrinsic point defects are at absolute zero temperature, and the concentration of the defects in a certain thickness is the lowest.
Preferably, the crystal lattice of the silicon carbide single crystal of the surface layer of the silicon carbide single crystal substrate has complete integrity.
Optionally, the concentration of the shallow level impurity in the silicon carbide single crystal substrate is 1 × 1014～1×
1016cm-3. Further, the shallow level impurity includes at least one of N, B, Al.
Optionally, the high-purity silicon carbide single crystal substrate is prepared by a method comprising the following steps: and carrying out high-temperature rapid thermal treatment and surface annealing treatment on the high-purity silicon carbide single crystal wafer to obtain the high-purity silicon carbide single crystal substrate.
Optionally, the high-temperature rapid thermal treatment comprises a rapid heating-up stage and a rapid cooling-down stage.
Preferably, the rapid temperature rise heating stage comprises the following process conditions: heating to 1800-2300 deg.C at 30-100 deg.C/s, and maintaining for 60-600 s; the rapid cooling stage comprises the following processing conditions: rapidly cooling to room temperature at the speed of 50-150 ℃/s.
Further, the temperature rise rate of the rapid temperature rise heating stage is 50-80 ℃/s.
Further, the holding temperature of the rapid heating stage is 2000-2200 ℃, and the holding time is 100-500 s. Furthermore, the holding temperature of the rapid heating stage is 2100-2000 ℃, and the holding time is 150-200 s.
Further, the rapid cooling phase comprises: cooling rapidly at a rate of 100-. Further, the rapid cooling phase comprises: cooling rapidly at a rate of 100-. The fast cooling stage can freeze the intrinsic point defects injected in the fast heating stage in the crystal.
According to the high-temperature rapid thermal treatment method, a certain amount of intrinsic point defects are injected into the silicon carbide single crystal wafer, so that excessive intrinsic point defects are prevented from being annihilated in the subsequent surface annealing process, and the semi-insulating property of the prepared silicon carbide single crystal substrate is prevented from being influenced.
Preferably, the surface temperature of the silicon carbide single crystal wafer controlled by the surface annealing treatment is 1200-1800 ℃, and the time of the annealing treatment is 30-90 min.
Further, the surface temperature of the high-purity silicon carbide single crystal wafer controlled by the surface annealing treatment has a lower limit selected from 1250 ℃, 1300 ℃, 1400 ℃, 1500 ℃, 1600 ℃, 1700 ℃ or 1750 ℃ and an upper limit selected from 1250 ℃, 1300 ℃, 1400 ℃, 1500 ℃, 1600 ℃, 1700 ℃ or 1750 ℃.
Further, the lower limit of the time of the high-purity silicon carbide single crystal wafer controlled by the surface annealing treatment is selected from 35min, 45min, 55min, 65min, 75min or 85min, and the upper limit is selected from 35min, 45min, 55min, 65min, 75min or 85 min.
Preferably, the surface temperature of the high-purity silicon carbide single crystal wafer controlled by the surface annealing treatment is 1400-1600 ℃, and the time of the annealing treatment is 45-60 min. Furthermore, the surface temperature of the high-purity silicon carbide single crystal wafer controlled by the surface annealing treatment is 1500-1600 ℃.
Preferably, the surface annealing treatment is to heat the surface of the silicon carbide single crystal wafer after high-temperature rapid thermal treatment by using surface laser; the laser heating step includes: and carrying out surface annealing treatment on the silicon carbide single crystal wafer subjected to high-temperature rapid thermal treatment by laser reciprocating surface scanning, wherein the laser moving speed is 0.5-3000 mm/s.
Further, the lower limit of the laser moving speed is selected from 1mm/s, 1000mm/s, 1500mm/s, 2000mm/s or 2500mm/s, and the upper limit is selected from 5mm/s, 1000mm/s, 1500mm/s, 2000mm/s or 2500 mm/s. Further, the laser moving speed is 0.5-5 mm/s. The laser moving speed enables the laser to heat the surface of the substrate to a preset temperature, but the temperature is not conducted into the silicon carbide single crystal substrate quickly, so that the annealing effect on the surface of the silicon carbide single crystal substrate is realized.
Optionally, the surface annealing treatment includes annealing at least one surface of the silicon carbide single crystal wafer. Further, the surface annealing treatment includes annealing a contact surface with the GaN crystal when the GaN crystal is grown on the silicon carbide single crystal substrate.
Optionally, the surface annealing treatment is heating the surface of the silicon carbide single crystal wafer after high-temperature rapid thermal treatment by using a laser.
Optionally, the laser has a wavelength of less than 352nm, a pulse width of no more than 60ns, and an energy density of no more than 150mJ/cm2. Preferably, the wavelength of the laser is less than 352nm, the pulse width is 20-60ns, and the energy density is 70-110mJ/cm2. The uniformity of the surface of the high-purity silicon carbide single crystal wafer processed by using the parameters of the laser is high.
According to another aspect of the present application, there is provided a semiconductor device comprising the high purity silicon carbide single crystal substrate described in any one of the above.
Preferably, the semiconductor device is an epitaxial wafer or a transistor.
According to still another aspect of the present application, there is provided a use of the high purity silicon carbide single crystal substrate described in any one of the above for producing a semiconductor device.
Preferably, the semiconductor device is an epitaxial wafer or a transistor.
Laser in the laser device reciprocates on the surface of a high-purity silicon carbide single crystal substrate, and when the laser scans a specific position of the silicon carbide single crystal substrate, only the temperature rise of the surface of the silicon carbide single crystal substrate is realized, and the temperature is attenuated along with the thickness of the silicon carbide single crystal substrate. The intrinsic point defects in the surface region are migrated and annihilated by the temperature rise of the surface of the silicon carbide single crystal substrate, and the migration and annihilation of the intrinsic point defects are gradually reduced by the temperature reduction caused by laser annealing as the silicon carbide single crystal substrate is expanded. The intrinsic point defects are not affected by laser annealing in the crystal at a certain distance from the silicon carbide single crystal substrate, and can still maintain high concentration, so that the semi-insulating property of the silicon carbide single crystal substrate is realized.
Benefits of the present application include, but are not limited to:
the low concentration of intrinsic point defects on the surface layer of the high-purity silicon carbide single crystal substrate enables the high-purity silicon carbide single crystal to be used as an epitaxial substrate of GaN epitaxy, the lattice adaptation degree of GaN and the silicon carbide single crystal to be higher, and the quality of a prepared GaN epitaxy layer to be higher; and the main body layer of the high-purity silicon carbide single crystal has a certain concentration of internal point defects, so that the semi-insulating property of the high-purity silicon carbide single crystal substrate can be maintained.
According to the preparation method of the high-purity silicon carbide single crystal substrate, the point defects introduced into a certain region of the surface of the high-purity semi-insulating silicon carbide substrate are removed through a high-temperature rapid heat treatment technology and a surface laser annealing technology, and meanwhile, the internal point defects far away from the surface of the substrate are reserved, so that a defect-free substrate surface layer clean area is realized, the semi-insulating property of the high-purity silicon carbide single crystal substrate is reserved, and the GaN epitaxial layer obtains the best quality.
The high-purity semi-insulating silicon carbide substrate balances the relationship between the crystal quality of the GaN epitaxial layer and the electricity of the high-purity silicon carbide crystal, improves the quality of the high-purity silicon carbide single crystal substrate and the lattice matching degree of the high-purity silicon carbide single crystal substrate and the GaN epitaxial layer, and does not influence the realization of the physical performance of the high-purity semi-insulating silicon carbide single crystal substrate.
Drawings
FIG. 1 is a schematic view of a high-temperature rapid thermal process for producing a high-purity silicon carbide single crystal substrate according to the present application.
FIG. 2 is a schematic view showing a surface annealing treatment for producing a high purity silicon carbide single crystal substrate according to the present application.
FIG. 3 is a schematic view showing the concentration of intrinsic point defects in a high-purity silicon carbide single crystal wafer, a high-purity silicon carbide single crystal wafer subjected to high-temperature rapid thermal treatment, and a high-purity silicon carbide single crystal substrate prepared according to the present invention.
Detailed Description
The present application will be described in detail with reference to examples, but the present application is not limited to these examples.
Unless otherwise specified, the raw materials and the like mentioned in the examples of the present application were purchased commercially.
The analysis method in the examples of the present application is as follows:
the resistivity test was carried out by using a model COREMA-WT non-contact semi-insulating resistivity tester manufactured by Semimap.
The crystal form test adopts HR800 type confocal Raman spectrometer of Horiba company.
The surface type test of the silicon carbide single crystal substrate adopts a MicroProf @ TTV200 full-automatic surface type tester of FRT company.
The element content was measured by an IMS 7f-Auto type secondary ion mass spectrometer from Cameca.
The preparation of the high-purity silicon carbide single crystal wafer according to the present application can be carried out by a method in the art, and the following method for preparing a high-purity silicon carbide single crystal wafer can be used, the method comprising the steps of:
① placing a certain amount of silicon carbide powder in a graphite crucible, wherein the purity of the silicon carbide powder is above 99.9999%, and the concentration of donor impurities with shallow energy level such as nitrogen is 1 × 1016cm-3The concentration of shallow level acceptor impurities such as boron and aluminum should be 1 × 1016cm-3The following;
secondly, placing seed crystals for growing the silicon carbide single crystals on the upper part of the silicon carbide powder in the graphite crucible, and then sealing the graphite crucible; after the sealed graphite crucible is placed in the graphite heat-insulating felt, the whole graphite crucible is moved into single crystal growth equipment, and then a hearth is sealed;
③, vacuumizing the pressure in the hearth to 10 DEG-5Pa for 5-10h to remove residual impurities in the furnace chamber, and gradually introducing into the furnace chamberA protective atmosphere, such as argon or helium;
fourthly, the pressure of the hearth is increased to 10 to 100mbar at the speed of 30 to 50mbar/h, simultaneously the temperature in the hearth is increased to 2100 ℃ and 2200 ℃ at the speed of 10 to 20 ℃/h, and the temperature is kept for 50 to 100h, thus finishing the growth process of the silicon carbide single crystal;
and fifthly, after the growth process of the single crystal is finished, stopping heating the hearth, naturally reducing the temperature of the hearth to room temperature, opening the hearth and taking out the graphite crucible to obtain the high-purity silicon carbide single crystal, and continuing cutting and polishing processes to obtain the high-purity silicon carbide single crystal.
EXAMPLE 1 preparation of high-purity silicon carbide single crystal substrate
As an embodiment, a method for preparing a high purity silicon carbide single crystal wafer, the method comprising the steps of:
① placing a certain amount of silicon carbide powder in a graphite crucible, wherein the purity of the silicon carbide powder is above 99.9999%, and the concentration of donor impurities with shallow energy level such as nitrogen is 1 × 1016cm-3The concentration of shallow level acceptor impurities such as boron and aluminum should be 1 × 1016cm-3The following;
secondly, placing seed crystals for growing the silicon carbide single crystals on the upper part of the silicon carbide powder in the graphite crucible, and then sealing the graphite crucible; after the sealed graphite crucible is placed in the graphite heat-insulating felt, the whole graphite crucible is moved into single crystal growth equipment, and then a hearth is sealed;
③, vacuumizing the pressure in the hearth to 10 DEG-5Pa and keeping for 8 hours to remove residual impurities in the furnace chamber, and gradually introducing argon into the furnace chamber;
fourthly, the pressure of the hearth is increased to 50mbar at the rate of 40mbar/h, meanwhile, the temperature in the hearth is increased to 2100-;
and fifthly, after the growth process of the single crystal is finished, stopping heating the hearth, naturally reducing the temperature of the hearth to room temperature, opening the hearth and taking out the graphite crucible to obtain the high-purity silicon carbide single crystal, and continuing cutting and polishing to obtain the high-purity silicon carbide single crystal wafer No. 1.
The high-purity silicon carbide single crystal substrate is prepared by using the high-purity silicon carbide single crystal wafer 1# prepared by the method, and the preparation method comprises the following steps:
1) and carrying out high-temperature rapid thermal treatment on the prepared high-purity silicon carbide single crystal wafer and carrying out reciprocating scanning annealing on the surface of the high-purity silicon carbide single crystal wafer by using a laser to obtain the high-purity silicon carbide single crystal substrate.
The temperature of the surface of the high-purity silicon carbide single crystal wafer is controlled by controlling the values of the power, the defocusing amount, the laser heat treatment area and the like of a laser.
A schematic diagram of the high-temperature rapid thermal process for producing a high-purity silicon carbide single crystal substrate of the present embodiment is shown in FIG. 1, where T is temperature and T is time.
Fig. 2 is a schematic view of a surface annealing process for producing a high-purity silicon carbide single crystal substrate according to this embodiment, in which 1 denotes a laser, 2 denotes a high-purity silicon carbide single crystal wafer, and the laser 1 reciprocates at a constant rate on the surface of the high-purity silicon carbide single crystal wafer 2 to heat the surface of the high-purity silicon carbide single crystal wafer 2.
The variation of the concentration of intrinsic point defects from a semi-insulating silicon carbide single crystal wafer to a high purity silicon carbide single crystal substrate product is schematically shown in fig. 3, wherein the concentration of intrinsic point defects in the high purity silicon carbide single crystal wafer, the high purity silicon carbide single crystal wafer subjected to high temperature rapid thermal treatment and the high purity silicon carbide single crystal substrate is schematically shown in fig. 3a, fig. 3b and fig. 3c, respectively. In FIG. 3, 3 represents intrinsic point defects, 4 is a surface layer of a high purity silicon carbide single crystal substrate, and 5 is a bulk layer of a high purity silicon carbide single crystal. The high temperature rapid thermal process of the present application implants a certain number of intrinsic point defects 3 (see fig. 3b) into a high purity silicon carbide single crystal wafer (see fig. 3a) to avoid the annihilation of excess intrinsic point defects 3 during the subsequent surface annealing process, which affects the semi-insulating properties of the prepared high purity silicon carbide single crystal substrate (see fig. 3 c). The preparation of the high-purity silicon carbide single crystal substrate (as shown in fig. 3c) of the present application removes point defects introduced into a certain region of the surface 4 of the high-purity semi-insulating silicon carbide substrate by a high-temperature rapid thermal treatment technology and a surface laser annealing technology, and simultaneously retains internal point defects apart from the surface of the substrate, i.e., a pure silicon carbide single crystal body layer 5, thereby realizing a clean region of the substrate surface layer 4 without defects and retaining the semi-insulating property of the semi-insulating silicon carbide substrate, and thus enabling the GaN epitaxial layer to obtain the best quality.
Annealing the high-purity silicon carbide single crystal substrate by using KrF pulse laser irradiation, and controlling the energy density of the high-purity silicon carbide single crystal substrate to be not more than 150mJ/cm2。
According to the method and the specific parameters shown in Table 1, the high-purity silicon carbide single crystal substrate 1#, the high-purity silicon carbide single crystal substrate 2#, the high-purity silicon carbide single crystal substrate 3#, the high-purity silicon carbide single crystal substrate 4# and the high-purity silicon carbide single crystal substrate 5# are respectively prepared from the high-purity silicon carbide single crystal wafer 1 #. Specific production parameters and substrate properties of the high purity silicon carbide single crystal substrates # 1 to # 5 are shown in table 1.
TABLE 1
The resistivity, the shallow level impurity content, the intrinsic point concentration of the surface layer of the silicon carbide substrate, the intrinsic point concentration of the bulk layer of the silicon carbide substrate, and the like of the prepared high-purity silicon carbide single crystal substrate 1#, high-purity silicon carbide single crystal substrate 2#, high-purity silicon carbide single crystal substrate 3#, high-purity silicon carbide single crystal substrate 4#, and high-purity silicon carbide single crystal substrate 5# are respectively tested, and the test results are shown in table 1. As is clear from the data in Table 1, the high purity silicon carbide single crystal substrates 1# -5# had high resistivity and semi-insulating properties. The intrinsic point defect concentration of the surface layer of the silicon carbide single crystal substrate of the high-purity silicon carbide single crystal substrate 1# -5# is less than that of the bulk layer of the silicon carbide single crystal substrate, and the prepared silicon carbide single crystal substrate 1# -5# has semi-insulating property. The concentration of intrinsic point defects on the surface of the high-purity silicon carbide single crystal substrate 1# is extremely low, the high-purity silicon carbide single crystal substrate has good lattice integrity, and the concentration of intrinsic point defects on the main body layer of the high-purity silicon carbide single crystal substrate 1# enables the high-purity silicon carbide single crystal substrate to have semi-insulating property.
The resistivity of the 4-12 inch semi-insulating silicon carbide single crystal substrate prepared by the method can reach 2 × 1011The resistivity is controlled within 2 orders of magnitude in radial distribution, so that the resistivity of the semi-insulating silicon carbide single crystal substrate is uniformly distributed. The bow and warp of the 4-12 inch semi-insulating silicon carbide single crystal substrate are tested, and can be controlled within 45 mu m.
Example 2 preparation of GaN Single Crystal and Performance testing
The same-sized high purity silicon carbide single crystal substrates 1# -5# and high purity silicon carbide single crystal wafers 1# prepared in example 1 were used as bases for preparing GaN single crystal epitaxial wafers, respectively, according to a conventional method in the art. The crystal quality of the GaN single crystal produced from the high purity silicon carbide single crystal substrate 1# -5# was higher than that of the GaN single crystal epitaxial wafer produced on the basis of the high purity silicon carbide single crystal wafer 1#, and the specific data are shown in table 2.
TABLE 2
The above description is only an example of the present application, and the protection scope of the present application is not limited by these specific examples, but is defined by the claims of the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the technical idea and principle of the present application should be included in the protection scope of the present application.
Claims (14)
1. A high-purity silicon carbide single crystal substrate is characterized by comprising a silicon carbide single crystal substrate surface layer and a silicon carbide single crystal substrate main body layer,
the surface layer of the silicon carbide single crystal substrate basically does not contain intrinsic point defects at room temperature, and the room temperature concentration of the intrinsic point defects on the surface layer of the silicon carbide single crystal substrate is not higher than 1 × 1013cm-3The concentration of intrinsic point defects of the bulk layer of the silicon carbide single crystal substrate is 1 × 1014～1×1016cm-3And the concentration of intrinsic point defects of the silicon carbide single crystal substrate main body layer enables the high-purity silicon carbide single crystal substrate to have semi-insulating property.
2. The high-purity silicon carbide single crystal substrate according to claim 1, wherein the ratio of the thickness of the surface layer of the silicon carbide single crystal substrate to the thickness of the bulk layer of the silicon carbide single crystal substrate is 1:4 to 25.
3. The high-purity silicon carbide single crystal substrate according to claim 1, wherein the surface layer of the silicon carbide single crystal substrate has a room temperature concentration of intrinsic point defects of not higher than 1 × 10 at room temperature12cm-3The concentration of intrinsic point defects of the bulk layer of the silicon carbide single crystal substrate is 1 × 1014～1×1015cm-3。
4. A high purity silicon carbide single crystal substrate according to claim 1, wherein the surface layer of the silicon carbide single crystal substrate has a thickness of not more than 150 μm.
5. The high purity silicon carbide single crystal substrate according to claim 4, wherein the surface layer of the silicon carbide single crystal substrate has a thickness of 20 to 150 μm.
6. A high purity silicon carbide single crystal substrate according to claim 2 wherein the surface layer of said silicon carbide single crystal substrate is substantially free of intrinsic point defects at room temperature, and the concentration of intrinsic point defects in the bulk layer of said silicon carbide single crystal substrate is such that said high purity silicon carbide single crystal substrate is semi-insulating.
7. The high-purity silicon carbide single crystal substrate according to any one of claims 1 to 6, wherein the substrate is produced by the following production method:
and carrying out high-temperature rapid thermal treatment and surface annealing treatment on the high-purity silicon carbide single crystal wafer to obtain the high-purity silicon carbide single crystal substrate.
8. The high-purity silicon carbide single crystal substrate according to claim 7, wherein the high-temperature rapid thermal treatment comprises a rapid temperature rise heating stage and a rapid temperature fall stage;
the rapid heating-up stage comprises the following steps: heating to 1800-2200 ℃ at the rate of 30-100 ℃/s, and keeping the temperature for 60-600 s;
the rapid cooling stage comprises the following steps: rapidly cooling to room temperature at the speed of 50-150 ℃/s.
9. A high purity silicon carbide single crystal substrate according to claim 7 wherein the surface temperature of the silicon carbide single crystal wafer controlled by the surface annealing treatment is 1200-1800 ℃ and the time of the annealing treatment is 30-90 min.
10. The high-purity silicon carbide single crystal substrate according to claim 9, wherein the surface annealing treatment is heating the surface of the silicon carbide single crystal wafer subjected to the high-temperature rapid thermal treatment using a surface laser;
the laser heating step includes: and carrying out surface annealing treatment on the silicon carbide single crystal wafer subjected to high-temperature rapid thermal treatment by laser reciprocating surface scanning, wherein the laser moving speed is 0.5-3000 mm/s.
11. A semiconductor device comprising the high purity silicon carbide single crystal substrate as set forth in any one of claims 1 to 10.
12. The semiconductor device according to claim 11, which is an epitaxial wafer or a transistor.
13. Use of the high purity silicon carbide single crystal substrate as set forth in any one of claims 1 to 10 for producing a semiconductor device.
14. Use according to claim 13, wherein the semiconductor device is an epitaxial wafer or a transistor.
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| CN201811204666.3A CN109338463B (en) | 2018-10-16 | 2018-10-16 | High-purity silicon carbide single crystal substrate |
| EP18922090.8A EP3666935B1 (en) | 2018-10-16 | 2018-12-26 | High-purity silicon carbide single crystal substrate and preparation method therefor |
| JP2019571537A JP7239182B2 (en) | 2018-10-16 | 2018-12-26 | High-purity silicon carbide single crystal substrate and its manufacturing method and application |
| KR1020197037937A KR102345680B1 (en) | 2018-10-16 | 2018-12-26 | High-purity silicon carbide single crystal substrate and its manufacturing method and application |
| PCT/CN2018/123710 WO2020077848A1 (en) | 2018-10-16 | 2018-12-26 | High-purity silicon carbide single crystal substrate and preparation method therefor |
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