CN109280966A - Adulterate the high quality Semi-insulating silicon carbide mono-crystal of a small amount of vanadium and the preparation method of substrate - Google Patents
Adulterate the high quality Semi-insulating silicon carbide mono-crystal of a small amount of vanadium and the preparation method of substrate Download PDFInfo
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Abstract
This application discloses a kind of preparation methods of high quality Semi-insulating silicon carbide mono-crystal and substrate for adulterating a small amount of vanadium, belong to field of semiconductor materials.The preparation method of the Semi-insulating silicon carbide mono-crystal includes the following steps: to thermal-field device removal of impurities, mixing, long brilliant and annealing.The technical costs and fund cost of the preparation method of the Semi-insulating silicon carbide mono-crystal are low.The resistivity of the single-crystal silicon carbide of preparation determines that, since these impurity all occupy lattice position, with very high thermal stability, this also means that crystal can be obtained with highly stable resistivity by remaining shallow level impurity and a small amount of vanadium.And there is high resistivity evenness, low stress by the single-crystal silicon carbide substrate of single-crystal silicon carbide preparation, so that single-crystal silicon carbide substrate has excellent face type quality, to ensure that the stability and consistency of substrate quality during subsequent epitaxial.
Description
Technical field
This application involves a kind of preparation methods of high quality Semi-insulating silicon carbide mono-crystal and substrate for adulterating a small amount of vanadium, belong to
Field of semiconductor materials.
Background technique
Semi-insulating silicon carbide (SiC) single crystalline substrate is due to the big, resistivity with forbidden bandwidth and thermal conductivity height, disruptive field intensity
The excellent physical property such as big and the preferred semiconductor material for becoming preparation GaN base high-frequency microwave device.Not with 5G technology
Disconnected development, market end constantly expands the quantity required of semi-insulating silicon carbide single crystalline substrate, prior, and batch is commercialized to answer
With the quality requirement to silicon carbide semi-insulating single crystal substrate, higher requirements are also raised.
The Semi-insulating silicon carbide mono-crystal preparation of current industrialization is passed through on the basis of physical vapor method (PVT)
The foreign matter of vanadium for introducing high concentration realizes semi-insulating characteristic as deep energy level compensation center, and the single-crystal silicon carbide thus prepared is known as mixing
Miscellaneous Semi-insulating silicon carbide mono-crystal；Or by constantly reducing the shallow level impurity concentration in crystal in crystal preparation process and drawing
Enter a certain number of intrinsic point defects and realize its semi-insulating characteristic, the single-crystal silicon carbide thus prepared is known as high-purity semi-insulating carbonization
Silicon single crystal.
Semi-insulating silicon carbide mono-crystal is adulterated during the preparation process due to there is high vanadium concentrations introducing, is easy to form vanadium in crystal
Sediment and induce micropipe defects, reduce crystal quality；In addition, research shows that the vanadium of high concentration is used as electronics to capture in the devices
Center is obtained, back-gate effect can be caused, reduces and even destroys device performance.Therefore, as substrate technology of preparing and device prepare skill
The development of art, high-purity semi-insulating silicon carbide single crystalline substrate are increasingly becoming mainstream.It is lower shallow in high-purity semi-insulating silicon carbide monocrystalline
Level impurities can reduce the efficient carrier concentration in crystal, while the certain amount of intrinsic point defects by introducing will take
Rice energy level is at forbidden band center, to realize the semi-insulating characteristic of crystal.However, intrinsic point defects are in crystal with higher
Migration rate, at a certain temperature (such as GaN epitaxial layer preparation temperature under the conditions of) diffusion mobility can occur and bury in oblivion, this meeting
Cause the unstability of resistance substrate rate, equally the stability of device performance is impacted.
Adulterating vanadium concentration [V] in Semi-insulating silicon carbide mono-crystal is usually 1 × 1017~1 × 1018cm-3, corresponding nitrogen concentration
[N] is higher than 1017cm-3Magnitude, the high vanadium concentrations in preparation process are doped with higher technical barrier, and prepare in crystal
It is easily formed and contains a large amount of defects and uncontrollable shallow level impurity concentration, cause crystal quality uncontrollable.High-purity semi-insulating silicon carbide
[N] is 10 in monocrystalline15cm-3Magnitude, corresponding point defect concentration are 1 × 1015cm-3Magnitude or more, the nitrogen in preparation process
Equal shallow level impurities concentration removal needs higher technical costs and fund cost.
Summary of the invention
To solve the above-mentioned problems, this application provides a kind of high quality Semi-insulating silicon carbide mono-crystal for adulterating a small amount of vanadium and
The preparation method of substrate.The technical costs and fund cost of the preparation method are low, and the single-crystal silicon carbide prepared has higher electricity
Resistance rate stability, and high-concentration dopant vanadium caused back-gate effect in the devices is not present；The single-crystal silicon carbide substrate of preparation
Uniform resistivity, internal stress are minimum, ensure that during subsequent epitaxial the stability of single-crystal silicon carbide substrate quality with it is consistent
Property.
The preparation method of the high quality Semi-insulating silicon carbide mono-crystal of a small amount of vanadium of the doping, which is characterized in that including following steps
It is rapid:
1) thermal-field device cleans；
2) mixing: deep level dopant is doped in sic powder；
3) long brilliant: the carborundum powder of step 2) doping deep level dopant obtained is placed in the thermal field handled through step 1)
After device, start long crystalline substance, the concentration of the deep energy level Doping Center element after long crystalline substance is 5 × 1015-1×1017cm-3；
4) it anneals: will be made annealing treatment by the single-crystal silicon carbide first product of step 3) processing, obtain the carbonization
Silicon single crystal.
Optionally, the Semi-insulating silicon carbide mono-crystal includes that shallow level impurity, deep level dopant and a small amount of intrinsic point lack
It falls into, the deep level dopant and the intrinsic point defects compensate shallow level impurity, the concentration of the deep level dopant jointly
Less than the concentration of deep level dopant in doping Semi-insulating silicon carbide mono-crystal, the concentration of the intrinsic point defects is not higher than at room temperature
1×1015cm-3, will not influence carborundum crystals electrical performance stability.
The concentration of the intrinsic point defects is not higher than 1 × 10 at room temperature14cm-3, will not influence carborundum crystals electric property
Stability.
Optionally, the sum of concentration of the shallow level impurity is lower than 1 × 1017cm-3, the concentration of the deep level dopant
Lower than 1 × 1017cm-3, the concentration of the intrinsic point defects is not higher than 1 × 10 at room temperature15cm-3 1×1014cm-3。
Optionally, the sum of concentration of the shallow level impurity is higher than 1 × 1015cm-3, the concentration of the deep level dopant
It is 5 × 1015~1 × 1017cm-3, the concentration of the intrinsic point defects at room temperature is not higher than 1 × 1014cm-3.Further, described
The sum of concentration of shallow level impurity is greater than 1 × 1015cm-3, the concentration of the deep level dopant is 5 × 1015~1 × 1017cm-3, the concentration of the intrinsic point defects at room temperature is less than 1 × 1014cm-3。
Preferably, the concentration of the shallow level impurity is not less than 5 × 1015cm-3.Further, the shallow level impurity
The sum of concentration is greater than 5 × 1015cm-3。
It is highly preferred that the concentration of the shallow level impurity is not less than 1 × 1016cm-3.Further, the shallow level impurity
The sum of concentration be greater than 1 × 1016cm-3。
Preferably, the concentration of the deep level dopant is 1 × 1016cm-3~5 × 1016cm-3。
Preferably, primary concentration of the intrinsic point defects concentration not higher than intrinsic point defects at room temperature.Institute in the application
The primary concentration for the intrinsic point defects stated is not wrap during growing single-crystal silicon carbide from the concentration of the intrinsic point defects of thermosetting
Include the intrinsic point defects concentration introduced in single-crystal silicon carbide subsequent processing.
Preferably, the shallow level impurity includes one of IIIA and VA major element or a variety of.Further, described
Shallow level impurity includes one of nitrogen, boron and aluminium or a variety of.Preferably, the shallow level impurity includes nitrogen, boron and aluminium.
Optionally, V B race element at least one of of the deep level dopant in the periodic table of elements.It is preferred that
Ground, the deep level dopant are vanadium.
Optionally, the thermal-field device includes graphite insulation construction and graphite crucible.Further, the graphite heat preservation knot
Structure is graphite insulation quilt.
Preferably, the thermal-field device removal of impurities of the step 1) includes: after sic powder is placed on graphite crucible, in temperature
20-100h is kept under 1800-2500 DEG C of degree, pressure 5-50mbar.Further, the thermal-field device of the step 1), which cleans, wraps
It includes: after sic powder is placed on graphite crucible, keeping 50-100h at 2200-2400 DEG C of temperature, pressure 20-30mbar.
Optionally, the concentration of the deep level dopant element in the mixing of the step 2) is 1 × 1016cm-3~1 ×
1017cm-3.Further, the concentration of the deep level dopant in the mixing of the step 2) is 2 × 1016cm-3~5 × 1016cm-3。
Optionally, the long brilliant step in the step 3) includes: high temperature pretreatment stage and crystal growing stage；
The condition of the high temperature pretreatment stage are as follows: 1200 DEG C -2000 DEG C of temperature, pressure 800-1000mbar, when holding
Between 5-50h；
The condition of the crystal growing stage are as follows: improved with the rate of 10-50 DEG C/min to 2200 DEG C or more of temperature, simultaneously will
Pressure is down to 5-50mbar.The long crystal method makes a small amount of vanadium doping sic powder in graphite crucible sufficiently distil.
Further, the long brilliant step in the step 3) includes: high temperature pretreatment stage and crystal growing stage；
The condition of the high temperature pretreatment stage are as follows: kept at 1800 DEG C -2000 DEG C of temperature and pressure 800-900mbar
Time 30-50h；
The condition of the crystal growing stage are as follows: improved with the rate of 10-30 DEG C/min to 2200 DEG C or more of temperature, simultaneously will
Pressure is down to 5-50mbar.
Optionally, the annealing condition of the step 4) are as follows: the single-crystal silicon carbide product of step 3) is placed in annealing furnace
In, 10-50h is kept at a temperature of 1800-2200 DEG C.Further, the annealing condition of the step 4) are as follows: by step 3)
Single-crystal silicon carbide product be placed in annealing furnace, keep 30-50h at a temperature of 2000-2200 DEG C.
Optionally, resistivity Change in Mean of the single-crystal silicon carbide after 900-1200 DEG C of temperature keeps 0.5-10h
Value is less than 55%.
Preferably, resistivity Change in Mean value of the single-crystal silicon carbide after 900-1200 DEG C of temperature keeps 0.5-10h
Less than 50%；Further, resistivity Change in Mean of the single-crystal silicon carbide after 900-1200 DEG C of temperature keeps 0.5-10h
Value is less than 30%.
" being not higher than ", " being not less than ", " being higher than " and " being lower than " in the application include endpoint value.
According to the another aspect of the application, a kind of Semi-insulating silicon carbide mono-crystal is provided, which is characterized in that by any of the above-described
Method described in is prepared.
According to the another aspect of the application, provide Semi-insulating silicon carbide mono-crystal described in one kind in epitaxial wafer and/or
It is applied in transistor.
Optionally, the single-crystal silicon carbide is 4H-SiC, 6H-SiC or 3C-SiC.Further, the silicon carbide
Monocrystalline is 4H-SiC.
According to the another aspect of the application, a kind of high quality Semi-insulating silicon carbide mono-crystal substrate for adulterating a small amount of vanadium is provided
Preparation method, which is characterized in that the high quality Semi-insulating silicon carbide mono-crystal of the above-mentioned a small amount of vanadium of doping is cut, is thrown
Light obtains the Semi-insulating silicon carbide mono-crystal substrate.
Optionally, the single-crystal silicon carbide substrate is less than through the resistivity Change in Mean value of epitaxy technique annealing front and back
55%.
Optionally, the single-crystal silicon carbide substrate keeps the resistivity of 0.5-10h before and after the processing through 900-1200 DEG C of temperature
Change in Mean value is less than 55%.
Further, the single-crystal silicon carbide substrate keeps the resistance of 0.5-10h before and after the processing through 900-1200 DEG C of temperature
Rate Change in Mean value is less than 50%.Further, the single-crystal silicon carbide substrate is kept at 0.5-10h through 900-1200 DEG C of temperature
The resistivity Change in Mean value of front and back is managed less than 30%.
According to the application's in another aspect, providing a kind of Semi-insulating silicon carbide mono-crystal and/or by above-mentioned preparation method
Semi-insulating silicon carbide mono-crystal substrate obtained is applied in preparing epitaxial wafer and/or transistor.
Herein described single-crystal silicon carbide is by reducing the shallow level impurity in single-crystal silicon carbide while introducing a small amount of
Deep level dopant substitutes the intrinsic point defects in crystal, realizes its semi-insulating characteristic.
As an implementation, the Semi-insulating silicon carbide mono-crystal is prepared by the method included the following steps:
(1) the graphite insulation quilt and graphite crucible used to long crystalline substance carries out high temperature purification.Silicon carbide is placed in graphite crucible
Powder, at 50-500 μm, quantity controls the 50%-80% in crucible volume for powder particles control.Graphite crucible is placed in graphite
After keeping the temperature and being packaged in silicon carbide long crystal furnace, the high-temperature process 20-100h at 1800-2500 DEG C of temperature, pressure 5-50mbar.It should
Step makes the powder in crucible distil and forms high-temperature gas, and high-temperature gas can infiltrate graphite crucible during loss
With in graphite insulation quilt and the impurity elements such as nitrogen of expelling it to adsorb, to obtain the graphite material of high-purity.
(2) vanadium is uniformly doped in sic powder.Vanadium mixing in sic powder synthesis process
It is miscellaneous to be carried out by way of being mixed with sic powder, mixed carbonization is embedded in after can also being built in crystal vessel
In silicon powder material.Vanadium doping concentration in order to control the subsequent vanadium doping concentration being introduced into single-crystal silicon carbide, in sic powder
It should be controlled accordingly, 0.01-1g vanadium should be placed in every 1kg reaction source powder, after reaction in sic powder
Concentration should be 1 × 1016cm-3~1 × 1017cm-3Magnitude, to realize the content range purpose of a small amount of vanadium during subsequent long crystalline substance.
Specifically, sic powder passes through with vanadium after mixing, or the carborundum powder after vanadium doping concentration is placed in crystal vessel
Material reaction process can refer to published patent document.
(3) after obtaining the sic powder containing certain doping vanadium concentration by reaction, by a small amount of vanadium doping carborundum powder
Material is placed in graphite crucible and is encapsulated into long crystal furnace thorax, starts crystal growth.Crystal growing process include 1200 DEG C -2000 DEG C,
The high temperature of 800-1000mbar, 5-50h are pre-processed to remove the impurity such as the nitrogen adsorbed in burner hearth.The application introduces a small amount of vanadium unit
Element, therefore compared to high-purity semi-insulating silicon carbide monocrystalline, the purification process of this step can be with biggish simplification, and only needing will be excessive
Nitrogen removal, the preparation process compared to high-purity semi-insulating silicon carbide monocrystalline can reduce technical costs and seed crystal cost.
After completing the purification pretreatment in burner hearth, temperature is improved with the rate of 10-30 DEG C/min to 2200 DEG C or more of temperature, simultaneously
Pressure is down to 5-50mbar, so that a small amount of vanadium doping sic powder in graphite crucible sufficiently distils.Gas phase after distillation
And the vanadium released is as temperature gradient is transmitted at seed crystal and is crystallized.It is grown according to heavy doping Semi-insulating silicon carbide mono-crystal
Process is it is found that vanadium can occupy a part of lattice position of crystal growth interface in crystal growing process, to realize vanadium unit
The doping of element.Since the vanadium contained in a small amount of vanadium doping sic powder has been limited in 1 × 1016cm-3~1 ×
1017cm-3Content, after gas phase transmission process, loss and vanadium and sic powder due to transmission process are tied again
It closes, finally adulterating the vanadium concentration entered in crystal should be 5 × 1015cm-3~1 × 1017cm-3Between.These enter carbon
The vanadium of SiClx monocrystalline can exist as alms giver, can also exist as acceptor, to compensate shallow in single-crystal silicon carbide
Level impurities.
(4) after silicon carbide monocrystal growth, single-crystal silicon carbide is taken out into graphite crucible.Due in silicon carbide monocrystal growth
Growth interface is in higher temperature in the process, and part of atoms disengaging lattice position is formed certain density intrinsic at growth interface
Point defect.Single-crystal silicon carbide is placed in annealing furnace, the annealing of 10-50h is carried out at a temperature of 1800-2000 DEG C, it can
Remove intrinsic point defects.In annealing process, the intrinsic point defects being present in single-crystal silicon carbide are buried in oblivion, intrinsic point by migration
The concentration of defect drops to the level for not influencing crystal electric property.
The resistivity of the single-crystal silicon carbide of the application preparation is determined by remaining shallow level impurity and a small amount of vanadium.By
Lattice position is all occupied in shallow level impurity and a small amount of vanadium, with very high thermal stability, this also means that this
Single-crystal silicon carbide/single-crystal silicon carbide substrate of application method preparation can be obtained with highly stable resistivity.
The beneficial effect of the application includes but is not limited to:
1) technical costs of the preparation method of the Semi-insulating silicon carbide mono-crystal of the application and fund cost are low.
2) semi-insulating single crystal/single crystalline substrate of a small amount of vanadium is adulterated in the present processes preparation, by single-crystal silicon carbide
Shallow level impurity is introduced into the intrinsic point defects in a small amount of vanadium doping substitution crystal simultaneously, realizes its semi-insulating characteristic.
3) Semi-insulating silicon carbide mono-crystal/single crystalline substrate resistivity of the present processes preparation is miscellaneous by remaining shallow energy level
Matter and a small amount of vanadium determine, since these impurity all occupy lattice position, with very high thermal stability, this is also just meaned
Crystal can obtain with highly stable resistivity, and have high resistivity evenness.
4) preparation of the single-crystal silicon carbide of the application combines existing doping Semi-insulating silicon carbide mono-crystal and high-purity semi-insulating
Single-crystal silicon carbide technology of preparing, by controlling the concentration of shallow level impurity concentration and deep level dopant in carborundum crystals,
Semi-insulating silicon carbide mono-crystal and substrate with more high resistivity stability may be implemented, while can be to avoid because of high-concentration dopant
Caused by sediment defect and electron capture problem, to improve the quality of single-crystal silicon carbide substrate and help to use the lining
The promotion of the device performance at bottom.
5) single-crystal silicon carbide substrate of the present processes preparation, available good electrical performance stability；Meanwhile
The absolute value variation of face type test before and after being annealed to substrate, curvature and angularity is far smaller than required by epitaxy technique
Annealing before and after 5 μm of control line, show that substrate interior stress is minimum, can guarantee that substrate has excellent face type quality, from
And it ensure that the stability and consistency of substrate quality during subsequent epitaxial.
Detailed description of the invention
Fig. 1 is the single-crystal silicon carbide substrate 1# resistance substrate rate Surface scan figure before annealing.
Fig. 2 is the single-crystal silicon carbide substrate 1# resistance substrate rate Surface scan figure after annealing.
Specific embodiment
The application is described in detail below with reference to embodiment, but the application is not limited to these embodiments.
Unless otherwise instructed, raw material being related in embodiments herein etc. is bought by commercial sources.
Analysis method is as follows in embodiments herein:
The test of single-crystal silicon carbide crystal form uses the HR800 type Confocal laser-scanning microscopy instrument of Horiba company.
The face type test of single-crystal silicon carbide substrate is tested using the MicroProf@TTV200 type full-automatic dough type of FRT company
Instrument.
Resistivity measurement uses the contactless semi-insulating resistivity tester of COREMA-WT type of Semimap company.
Constituent content test uses the IMS 7f-Auto type ion microprobe device of Cameca company.The reality of the application
It applies in mode, the preparation flow of single-crystal silicon carbide includes the following steps:
1) thermal-field device cleans: carrying out high temperature purification to graphite insulation quilt and graphite crucible；
2) mixing: vanadium is uniformly doped in sic powder, and the vanadium concentration in carborundum powder is 1 × 1016cm-3~1 × 1017cm-3；
3) long brilliant: the carborundum powder of step 2) doping vanadium obtained is placed on after the graphite crucible of step 1) processing,
Start long crystalline substance, the long brilliant step includes high temperature pretreatment stage and crystal growing stage, it is long it is brilliant after vanadium concentration be 5 ×
1015cm-3~1 × 1017cm-3；
4) it anneals: will be made annealing treatment by the single-crystal silicon carbide of step 3) processing, obtain the semi-insulating carbon
SiClx monocrystalline.
The preparation of 1 Semi-insulating silicon carbide mono-crystal of embodiment-thermal-field device removal of impurities
Thermal-field device includes graphite crucible and graphite insulation quilt, will prepare the graphite insulation quilt and stone that single-crystal silicon carbide uses
Black crucible carries out high temperature purification.High temperature purification step includes: that sic powder will be placed in graphite crucible, and powder particles control exists
50-500 μm, quantity controls the 50%-80% in crucible volume.Graphite crucible is placed in graphite insulation quilt and is packaged in silicon carbide
After long crystal furnace, a period of time is kept under certain temperature, pressure, carries out thermal-field device removal of impurities.Thermal field 1#, thermal field 2#, thermal field 3#,
The specific treatment temperature of thermal field 4# and thermal field 5#, pressure and time are as shown in table 1, and the thermal-field device in table 1 includes graphite crucible
With graphite insulation quilt.
Table 1
| Temperature/DEG C | Pressure/mbar | Time/h | |
| Thermal field 1# | 2300 | 30 | 50 |
| Thermal field 2# | 1800 | 5 | 100 |
| Thermal field 3# | 1900 | 10 | 80 |
| Thermal field 4# | 2400 | 40 | 30 |
| Thermal field 5# | 2500 | 50 | 20 |
Thermal field 1#, thermal field 2#, thermal field 3#, thermal field 4# and thermal field 5# treatment process in graphite crucible in carborundum powder
Material distils and forms high-temperature gas, and high-temperature gas can infiltrate in graphite crucible and graphite insulation quilt simultaneously during loss
The impurity elements such as the nitrogen for expelling it to adsorb, so that the graphite material of high-purity is obtained, to remove thermal field 1#, the thermal field of preparation
Impurity in 2#, thermal field 3#, thermal field 4# and thermal field 5#, thus control introduced during preparing Semi-insulating silicon carbide mono-crystal it is miscellaneous
Matter.
Preparation-mixing of 2 Semi-insulating silicon carbide mono-crystal first product of embodiment, long crystalline substance
Sic powder and vanadium are doped, a small amount of vanadium doping sic powder is made, every 1kg reacts silicon carbide
0.01-1g vanadium should be placed in powder, concentration of the vanadium in sic powder should be 1 × 10 after reaction16cm-3~1 ×
1017cm-3Magnitude, to realize the content range of the vanadium during subsequent long crystalline substance.
A small amount of vanadium doping carborundum powder is respectively placed in embodiment 1 treated thermal field 1#, thermal field 2#, thermal field 3#, heat
In the graphite crucible of field 4# and thermal field 5#, and it is encapsulated into long crystal furnace thorax, carries out long brilliant step.Illustrate long brilliant step by taking thermal field 1# as an example
Suddenly, the specific crystal growing condition of long brilliant step is as shown in table 2.
Long brilliant step in the present embodiment includes high temperature pretreatment stage and crystal growing stage, and high temperature pretreatment stage is by burner hearth
The removal of the impurity such as the nitrogen of interior absorption is clean, since the purpose of the present embodiment is the vanadium a small amount of by introducing, compared to
Excessive nitrogen can need to only be removed with biggish simplification and be by high-purity semi-insulating silicon carbide monocrystalline, the purification process of this step
Can, the preparation process compared to high-purity semi-insulating silicon carbide monocrystalline can reduce technical costs and seed crystal cost.
After completing the purification pretreatment in burner hearth, the state modulator of the crystal growing stage of the application makes lacking in graphite crucible
Amount vanadium doping sic powder sufficiently distils, and gas phase after distillation and the vanadium released are as temperature gradient is transmitted to seed crystal
Place simultaneously crystallizes.According to heavy doping Semi-insulating silicon carbide mono-crystal growth course it is found that vanadium can occupy in crystal growing process
A part of lattice position of crystal growth interface, to realize the doping of vanadium.Due to what is contained in a small amount of vanadium doping sic powder
Vanadium has been limited in 1 × 1016cm-3~1 × 1017cm-3Content, after gas phase transmission process, due to transmission process
Loss, vanadium and sic powder in conjunction with final doping enters the vanadium concentration in single-crystal silicon carbide 5 × 1015cm-3~1 × 1017cm-3Between.These vanadiums for entering single-crystal silicon carbide can exist as alms giver, also can be as by main memory
So that the shallow level impurity in single-crystal silicon carbide is fallen in compensation.
Preparation-annealing of 3 Semi-insulating silicon carbide mono-crystal of embodiment
Single-crystal silicon carbide first product prepared by embodiment 2 is continued to make annealing treatment, semi-insulating silicon carbide list is prepared
It is brilliant.By taking single-crystal silicon carbide first product made of thermal field 1# carries out long brilliant step is made annealing treatment as an example, illustrate annealing stage.It will be real
The thermal field 1# for applying example 2 passes through Semi-insulating silicon carbide mono-crystal first product made from the long brilliant step of table 2 respectively and carries out annealing difference
Single-crystal silicon carbide 1#, single-crystal silicon carbide 2#, single-crystal silicon carbide 3#, single-crystal silicon carbide 4# and single-crystal silicon carbide 5# is made, specifically moves back
Fiery treatment conditions are as shown in table 2.
After silicon carbide monocrystal growth, single-crystal silicon carbide is taken out into graphite crucible.Due to raw in crystal growing process
Long interface is in higher temperature, and part of atoms is detached from lattice position and forms certain density intrinsic point defects at growth interface.
Single-crystal silicon carbide is placed in annealing furnace, the annealing of 10-50h is carried out at a temperature of 1800-2000 DEG C, can remove intrinsic
Point defect.In annealing process, the intrinsic point defects that are present in single-crystal silicon carbide are buried in oblivion by migration, intrinsic point defects it is dense
Degree is dropped to not higher than its primary concentration at room temperature, and does not influence the level of crystal electrical performance stability.So far, the application
The resistivity of the single-crystal silicon carbide of preparation is determined by remaining shallow level impurity and a small amount of vanadium.Due to shallow level impurity and
A small amount of vanadium all occupies lattice position, and with very high thermal stability, this also means that the silicon carbide list of the application
Crystalline substance can be obtained with highly stable resistivity.
Table 2
Since growth interface is in higher temperature in crystal growing process, part of atoms is detached from lattice at growth interface
Position forms certain density point defect.By the annealing of the application, be present in point defect in crystal by migration and
Bury in oblivion, so that concentration drops to the level for not influencing crystal electric property.So far, the resistivity of crystal is miscellaneous by remaining shallow energy level
Matter and a small amount of vanadium determine.Since these impurity all occupy lattice position, with very high thermal stability, this also just anticipates
Taste crystal can obtain with highly stable resistivity.
The characterization of 4 Semi-insulating silicon carbide mono-crystal of embodiment
Resistivity, crystal form, impurity content, intrinsic point defects and the resistivity of single-crystal silicon carbide prepared by testing example 3,
Test result shows that single-crystal silicon carbide obtained has half insulation, and resistivity is high, by epitaxy technique annealing (900-1200
DEG C/0.5-10h) after resistivity Change in Mean value less than 55%.With single-crystal silicon carbide 1#, single-crystal silicon carbide 2#, silicon carbide
Illustrate that the resistivity tested, crystal form, impurity content, intrinsic point lack for monocrystalline 3#, single-crystal silicon carbide 4# and single-crystal silicon carbide 5#
It falls into resistivity as a result, as shown in table 3, wherein shallow level impurity content includes N, B and Al.
Table 3
The performance test of 5 Semi-insulating silicon carbide mono-crystal substrate of embodiment
Testing example 3 prepares single-crystal silicon carbide and is cut, ground and polished obtained 4-8 inches of semi-insulating carbon respectively
Semi-insulating silicon carbide mono-crystal substrate obtained is made annealing treatment, while testing single-crystal silicon carbide substrate by SiClx single crystalline substrate
Resistivity and face type, test result before and after annealing show that single-crystal silicon carbide substrate prepared by embodiment 3 has good electricity
Stability is learned, and the internal stress of substrate is minimum.
It is illustrated for 4 inches made from the single-crystal silicon carbide 1# of single-crystal silicon carbide substrate 1#.Single-crystal silicon carbide lining
Bottom 1# is after 1200 DEG C of annealing 2h.Resistivity Surface scan figure before testing single-crystal silicon carbide substrate 1# annealing is as shown in Figure 1, carbon
Resistivity Surface scan figure after SiClx single crystalline substrate 1# annealing is as shown in Figure 2.Test resistance rate mean value is by 4.22 × 1011Ω·cm
Become 3.17 × 1011Ω cm, resistivity decaying < 50%；Meanwhile the face before and after being annealed to single-crystal silicon carbide substrate 1#
The WARP value of type test, single-crystal silicon carbide substrate 1# annealing front and back becomes 8.42 μm from 8.35 μm, and BOW value is become from 9.62 μm
9.87 μm, the absolute value variation of curvature and angularity is far smaller than 5 μm before and after annealing required by epitaxy technique of control line,
Show that single-crystal silicon carbide substrate internal stress is minimum, can guarantee that substrate has excellent face type quality, to ensure that subsequent
The stability and consistency of single-crystal silicon carbide substrate quality in epitaxial process.
The above, only embodiments herein, the protection scope of the application is not by these specific embodiments
Limitation, but determined by following claims.To those skilled in the art, the application can have various
Change and variation.All any modification, equivalent replacement, improvement and so within the technical idea and principle of the application, should all
Comprising within the scope of protection of this application.
Claims (11)
1. a kind of preparation method for the high quality Semi-insulating silicon carbide mono-crystal for adulterating a small amount of vanadium, which is characterized in that including following steps
It is rapid:
1) thermal-field device cleans；
2) mixing: a certain amount of deep level dopant is doped in sic powder；
3) long brilliant: the carborundum powder of step 2) doping deep level dopant obtained is placed in the thermal-field device handled through step 1)
Afterwards, start long crystalline substance, the concentration of the deep energy level Doping Center element after long crystalline substance is 5 × 1015cm-3~1 × 1017cm-3；
4) it anneals: will be made annealing treatment by the single-crystal silicon carbide first product of step 3) processing, obtain the semi-insulating carbon
SiClx monocrystalline.
2. preparation method according to claim 1, which is characterized in that the Semi-insulating silicon carbide mono-crystal includes that shallow energy level is miscellaneous
Matter, deep level dopant and a small amount of intrinsic point defects, the deep level dopant and the intrinsic point defects compensate shallow energy jointly
Grade impurity, the concentration of the deep level dopant are less than the concentration of deep level dopant in doping Semi-insulating silicon carbide mono-crystal, institute
The concentration for stating intrinsic point defects is not higher than 1 × 10 at room temperature15cm-3, will not influence carborundum crystals electrical performance stability.
3. preparation method according to claim 2, which is characterized in that the sum of concentration of the shallow level impurity lower than 1 ×
1017cm-3, the concentration of the deep level dopant is lower than 1 × 1017cm-3, the concentration of the intrinsic point defects is high at room temperature
In 1 × 1014cm-3；
Preferably, the shallow level impurity includes one of IIIA and VA major element in the periodic table of elements or a variety of.
4. preparation method according to claim 2, which is characterized in that the deep level dopant is in the periodic table of elements
At least one of V B race element；Preferably, the deep level dopant is vanadium.
5. preparation method according to claim 1, which is characterized in that the thermal-field device includes graphite insulation construction and stone
Black crucible；
Preferably, the thermal-field device removal of impurities of the step 1) includes: after sic powder is placed on graphite crucible, in temperature
20-100h is kept under 1800-2500 DEG C and pressure 5-50mbar.
6. preparation method according to claim 1, which is characterized in that the deep level dopant in the mixing of the step 2)
Concentration be 1 × 1016cm-3~1 × 1017cm-3。
7. preparation method according to claim 1, which is characterized in that the long brilliant step in the step 3) includes: high temperature
Pretreatment stage and crystal growing stage；
The high temperature pretreatment stage include: at 1800 DEG C -2000 DEG C of temperature and pressure 800-900mbar the retention time
30-50h；
The condition of the crystal growing stage are as follows: improved with the rate of 10-30 DEG C/min to 2200 DEG C or more of temperature, while by pressure
It is down to 5-50mbar.
8. preparation method according to claim 1, which is characterized in that the annealing condition of the step 4) are as follows: will walk
It is rapid 3) made from single-crystal silicon carbide first product be placed in annealing furnace, keep 10-50h at a temperature of 1800-2200 DEG C.
9. a kind of high quality Semi-insulating silicon carbide mono-crystal for adulterating a small amount of vanadium, which is characterized in that by any one of claim 1-8
The method is prepared.
10. a kind of preparation method for the high quality Semi-insulating silicon carbide mono-crystal substrate for adulterating a small amount of vanadium, which is characterized in that by right
It is required that the high quality Semi-insulating silicon carbide mono-crystal of a small amount of vanadium of doping described in 9 is cut, ground and polished, obtain described
Semi-insulating silicon carbide mono-crystal substrate.
11. Semi-insulating silicon carbide mono-crystal as claimed in claim 9 and/or as made from the preparation method of claim 10 it is semi-insulating
Single-crystal silicon carbide substrate is applied in preparing epitaxial wafer and/or transistor.
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| CN201811204702.6A CN109280966B (en) | 2018-10-16 | 2018-10-16 | Adulterate the high quality Semi-insulating silicon carbide mono-crystal of a small amount of vanadium and the preparation method of substrate |
| KR1020197037935A KR102375530B1 (en) | 2018-10-16 | 2018-12-26 | Semi-insulating silicon carbide single crystal doped with a small amount of vanadium, substrate, manufacturing method |
| EP18922091.6A EP3666936A4 (en) | 2018-10-16 | 2018-12-26 | Semi-insulating silicon carbide single crystal doped with small amount of vanadium, substrate prepared therefrom, and preparation method therefor |
| JP2019571538A JP7235318B2 (en) | 2018-10-16 | 2018-12-26 | SEMI-INSULATING SILICON CARBIDE SINGLE CRYSTAL DOPED WITH MINOR VANADIUM, SUBSTRATE AND MANUFACTURING METHOD |
| PCT/CN2018/123707 WO2020077846A1 (en) | 2018-10-16 | 2018-12-26 | Semi-insulating silicon carbide single crystal doped with small amount of vanadium, substrate prepared therefrom, and preparation method therefor |
| TW108136953A TWI703242B (en) | 2018-10-16 | 2019-10-14 | Semi-insulating silicon carbide single crystal doped with a small amount of vanadium, substrate and preparation method |
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| CN113718336A (en) * | 2021-07-26 | 2021-11-30 | 山东天岳先进科技股份有限公司 | Ferromagnetic silicon carbide crystal and preparation method thereof |
| CN113981536A (en) * | 2020-07-27 | 2022-01-28 | 环球晶圆股份有限公司 | Silicon carbide ingot and preparation method thereof |
| CN117585678A (en) * | 2023-11-30 | 2024-02-23 | 宁波合盛新材料有限公司 | Nitrogen absorption treatment method for new thermal field for synthesizing silicon carbide powder by PVT furnace |
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