CN109272955B - GIP routing graph processing method and GIP routing graph processing device - Google Patents
GIP routing graph processing method and GIP routing graph processing device Download PDFInfo
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- CN109272955B CN109272955B CN201811315329.1A CN201811315329A CN109272955B CN 109272955 B CN109272955 B CN 109272955B CN 201811315329 A CN201811315329 A CN 201811315329A CN 109272955 B CN109272955 B CN 109272955B
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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Abstract
The application provides a GIP routing diagram processing method and a GIP routing diagram processing device, and relates to the technical field of GIP routing design. The GIP routing diagram processing method is used for processing the GIP routing diagram of the array substrate of the liquid crystal display panel, and comprises the following steps: acquiring a GIP routing graph to be processed, wherein the GIP routing graph comprises connecting lines of all GIP units corresponding to pixels in a special-shaped area, and the connecting lines comprise a plurality of line segments; performing association processing on each line segment with the same attribute information; and when a processing instruction for adjusting any line segment is received, adjusting the line segment and other line segments related to the line segment according to the processing instruction. By the method, the problem of low efficiency in adjusting the GIP wiring diagram in the prior art can be solved, and the efficiency of designing the GIP wiring is improved so as to improve the production efficiency of the liquid crystal display panel.
Description
Technical Field
The application relates to the technical field of GIP routing design, in particular to a GIP routing diagram processing method and a GIP routing diagram processing device.
Background
With the continuous development of display technology and the continuous improvement of quality requirements of users, the display screen of the electronic device is required to have more shapes. For example, in a display screen of a mobile phone, the screen is required to cover the surface of the mobile phone as much as possible, and a front camera, a photosensitive device, and the like are required to be placed at the same time. As shown in fig. 1 and fig. 2, a concave irregular area may be disposed at the top of the effective display area of the screen, and the portion of the non-display area corresponding to the irregular area is used for placing the front camera, the photosensitive device, and the like. The display area corresponding to the special-shaped area is composed of a large number of pixels which are arranged in a ladder shape.
In the prior art, each row of pixels is driven by a GIP (Gate IC in Panel, scan line driver circuit integrated in the Panel) unit, and therefore, GIP units corresponding to each row of pixels in the above-mentioned special-shaped area are also arranged in a corresponding ladder shape.
The inventor finds that the drawn GIP routing diagram is complex due to the stepped arrangement mode in the design process, so that the problem of low efficiency exists when the connecting lines in the GIP routing diagram need to be adjusted, and the efficiency of GIP routing design is greatly reduced.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a GIP routing diagram processing method and a GIP routing diagram processing apparatus, so as to solve the problem of low efficiency in adjusting a GIP routing diagram in the prior art, and further improve the efficiency of designing a GIP routing, so as to improve the production efficiency of a liquid crystal display panel.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical solutions:
a GIP routing diagram processing method is used for processing a GIP routing diagram of an array substrate of a liquid crystal display panel, and comprises the following steps:
acquiring a GIP routing graph to be processed, wherein the GIP routing graph comprises connecting lines of all GIP units corresponding to pixels in a special-shaped area, and the connecting lines comprise a plurality of line segments;
performing association processing on each line segment with the same attribute information;
and when a processing instruction for adjusting any line segment is received, adjusting the line segment and other line segments related to the line segment according to the processing instruction.
In a preferred option of the embodiment of the present application, in the GIP routing diagram processing method, the step of performing association processing on the line segments having the same attribute information includes:
acquiring attribute information of each line segment;
dividing each line segment with the same attribute information into a set to obtain a plurality of sets;
and for each set, associating the line segments in the set.
In a preferred option of the embodiment of the present application, in the GIP routing diagram processing method, the attribute information includes shape information; the step of dividing the line segments having the same attribute information into a set includes:
segments having the same shape are divided into a set.
In a preferred option of the embodiment of the present application, in the GIP routing diagram processing method, the attribute information includes length information; the step of dividing the line segments having the same attribute information into a set includes:
segments having the same length are divided into a set.
In a preferred option of the embodiment of the present application, in the GIP routing diagram processing method, the step of performing association processing on the line segments having the same attribute information includes:
responding to the operation of a user on different line segments to determine whether the line segments have the same attribute information;
and performing association processing on the line segments determined to have the same attribute information.
The embodiment of the present application further provides a GIP routing diagram processing apparatus, configured to process a GIP routing diagram of an array substrate of a liquid crystal display panel, where the apparatus includes:
the routing diagram acquisition module is used for acquiring a GIP routing diagram to be processed, wherein the GIP routing diagram comprises connecting lines of all GIP units corresponding to pixels in a special-shaped area, and the connecting lines comprise a plurality of line segments;
the line segment association module is used for associating all line segments with the same attribute information;
and the line segment adjusting module is used for adjusting the line segment and other line segments related to the line segment according to the processing instruction when receiving the processing instruction for adjusting any line segment.
In a preferred option of the embodiment of the present application, in the GIP routing diagram processing apparatus, the line segment association module:
the information acquisition submodule is used for acquiring attribute information of each line segment;
the set dividing submodule is used for dividing each line segment with the same attribute information into a set so as to obtain a plurality of sets;
and the line segment association submodule is used for associating each line segment in each set.
In a preferred option of the embodiment of the present application, in the GIP routing diagram processing apparatus, the attribute information includes shape information; the set partitioning sub-module includes:
a first set dividing unit for dividing each line segment having the same shape into one set.
In a preferred option of the embodiment of the present application, in the GIP routing diagram processing apparatus, the attribute information includes length information; the set partitioning sub-module includes:
and a second set dividing unit for dividing the line segments having the same length into a set.
In a preferred option of the embodiment of the present application, in the GIP routing diagram processing apparatus, the line segment association module:
the information determination submodule is used for responding to the operation of a user on different line segments so as to determine whether the line segments have the same attribute information;
and the association processing submodule is used for associating the line segments determined to have the same attribute information.
According to the GIP routing diagram processing method and the GIP routing diagram processing device, whether each line segment in the GIP routing diagram is the same or not is subjected to correlation processing according to the attribute information, so that when a processing instruction for adjusting any line segment is received, the line segment and other line segments related to the line segment can be adjusted together based on the processing instruction, the problem that efficiency is low due to the fact that each line segment needs to be adjusted is solved, the efficiency for designing the GIP routing is greatly improved, and the production efficiency of a liquid crystal display panel is improved.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a schematic view of a prior art contoured screen.
Fig. 2 is a schematic diagram of the pixel distribution in the area a in fig. 1.
Fig. 3 is a block diagram of an electronic device according to an embodiment of the present disclosure.
Fig. 4 is a schematic diagram of GIP unit cascade connection provided in the embodiment of the present application.
Fig. 5 is a port schematic diagram of a GIP unit according to an embodiment of the present disclosure.
Fig. 6 is a flowchart illustrating a GIP routing diagram processing method according to an embodiment of the present disclosure.
Fig. 7 is a schematic comparison diagram before and after width adjustment processing is performed on signal lines in the GIP routing diagram according to the embodiment of the present disclosure.
Fig. 8 is a sub-flowchart of step S130 in fig. 6.
Fig. 9 is another sub-flowchart of step S130 in fig. 6.
Fig. 10 is a block diagram illustrating functional modules of a GIP routing diagram processing device according to an embodiment of the present disclosure.
Fig. 11 is a block diagram illustrating sub-function modules included in a line segment association module according to an embodiment of the present disclosure.
Fig. 12 is another block diagram illustrating sub-functional modules included in the line segment association module according to an embodiment of the present disclosure.
Icon: 10-an electronic device; 12-a memory; 14-a processor; 100-GIP routing diagram processing device; 110-routing diagram acquisition module; 130-line segment association module; 131-an information acquisition submodule; 132-set partitioning submodule; 133-line segment association submodule; 135-information determination submodule; 136-association processing submodule; 150-a line segment adjusting module; 200-GIP unit; 210-a drive input; 220-a scan output; 230-turn on input; 240-turn on the output; 250-a reset input; 260-reset output terminal; 300-signal lines; 310 — a first line segment; 320-a second line segment; 330-third line segment.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. In the description of the present application, the terms "first," "second," and the like are used solely to distinguish one from another and are not to be construed as merely or implying relative importance.
As shown in fig. 3, an embodiment of the invention provides an electronic device 10 for processing a GIP trace map of an array substrate of a liquid crystal display panel. The electronic device 10 may include a memory 12, a processor 14, and a GIP routing diagram processing apparatus 100.
In detail, the memory 12 and the processor 14 are electrically connected directly or indirectly to enable data transmission or interaction. For example, they may be electrically connected to each other by one or more communication buses. The GIP trace graph processing apparatus 100 includes at least one software functional module which can be stored in the memory 12 in the form of software or firmware (firmware). The processor 14 is configured to execute an executable computer program stored in the memory 12, for example, a software function module and a computer program included in the GIP trace graph processing apparatus 100, so as to implement a GIP trace graph processing method, thereby processing the GIP trace graph of the array substrate of the liquid crystal display panel.
The Memory 12 may be, but is not limited to, a Random Access Memory (RAM), a Read Only Memory (ROM), a Programmable Read-Only Memory (PROM), an Erasable Read-Only Memory (EPROM), an electrically Erasable Read-Only Memory (EEPROM), and the like. Wherein the memory 12 is used for storing a program, and the processor 14 executes the program after receiving the execution instruction.
The processor 14 may be an integrated circuit chip having signal processing capabilities. The Processor 14 may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), a System on Chip (SoC), and the like; but may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components. The various methods, steps and logic blocks disclosed in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
It will be appreciated that the configuration shown in FIG. 3 is merely illustrative and that the electronic device 10 may include more or fewer components than shown in FIG. 3 or may have a different configuration than shown in FIG. 3. The components shown in fig. 3 may be implemented in hardware, software, or a combination thereof.
Optionally, the specific type of the electronic device 10 is not limited, and may be set according to actual application requirements, for example, the electronic device 10 may include, but is not limited to, a computer, a tablet computer, a mobile phone, and other terminal devices.
Optionally, specific content of the GIP routing graph is not limited, and may be set according to practical application requirements, for example, different types of units may cause different corresponding connection lines. In an embodiment, with reference to fig. 4 and 5, the GIP routing diagram may include a plurality of GIP units 200 connected in cascade, where each GIP unit 200 may have 6 ports, which are a driving input 210, a scanning output 220, an enabling input 230, an enabling output 240, a reset input 250, and a reset output 260.
In detail, the driving input terminal 210 is used for receiving a driving signal output by the connected signal line 300, that is, each GIP unit 200 is connected to the signal line 300 to obtain the driving signal. The scan output terminal 220 is used for sending a scan signal to a corresponding pixel (scan line). The turn-on input terminal 230 is used to receive a turn-on signal output from the previous GIP unit 200 connected thereto. The start output terminal 240 is configured to output a start signal to a subsequent GIP unit 200 connected thereto after outputting a scan signal, so that the subsequent GIP unit 200 sends the scan signal according to the driving signal after receiving the start signal. The reset input terminal 250 is used to receive a reset signal output from the connected subsequent GIP cell 200. The reset output terminal 260 is configured to output a reset signal to a previous GIP unit 200 connected thereto after outputting a scan signal, so that the previous GIP unit 200 stops transmitting the scan signal after receiving the reset signal.
With reference to fig. 6, an embodiment of the present invention further provides a GIP trace map processing method applicable to the electronic device 10, for processing the GIP trace map of the array substrate of the liquid crystal display panel. The method steps defined by the flow related to the GIP routing diagram processing method can be implemented by the processor 14. The specific flow shown in fig. 6 will be described in detail below.
Step S110, a GIP routing graph to be processed is obtained.
In this embodiment, the GIP routing diagram may include a connection line of each GIP unit 200 corresponding to a pixel in the special-shaped area, where the connection line includes a plurality of line segments.
The specific type of the connection line may also be different according to the type of the GIP unit 200, and may be any one or more of the above-mentioned 6 ports, for example. In the present embodiment, the signal line 300 connected to the driving input terminal 210 is exemplified, and the signal line 300 is formed by each line segment connecting two adjacent GIP units 200.
In step S130, each line segment having the same attribute information is associated.
As a result of long-term research by the inventors, it has been found that, in general, when adjusting each line segment, each line segment having the same attribute information needs to be subjected to the same processing, for example, the same width adjustment is required.
Therefore, on the basis of ensuring that the line segments obtained by the adjustment processing meet the design requirements, in order to improve the efficiency of the adjustment processing on the line segments, the line segments with the same attribute information can be associated, so that the line segments with the same attribute information can be processed together.
Step S150, when receiving a processing instruction for performing adjustment processing on any of the line segments, performs adjustment processing on the line segment and other line segments associated with the line segment together according to the processing instruction.
In this embodiment, after the association processing is performed on the line segments having the same attribute information in step S130, a judgment needs to be performed to determine whether a processing instruction for performing adjustment processing on the line segments is received, and if the processing instruction is not received, the adjustment processing may not be performed; if a processing instruction for adjusting any line segment is received, the line segment and other line segments related to the line segment can be adjusted together according to the processing instruction, so that the problem of low efficiency caused by the need of respectively issuing the processing instruction to the line segment and other line segments related to the line segment for adjustment processing is solved.
In an alternative example, as shown in fig. 7, the signal line 300 may include 3 line segments, i.e., a first line segment 310, a second line segment 320, and a third line segment 330. The number of the first line segment 310, the number of the second line segment 320, and the number of the third line segment 330 are 3.
Specifically, when three processing commands are received, i.e., 1-fold enlargement of the width of the first line segment 310, 2-fold enlargement of the width of the first second line segment 320, and 3-fold enlargement of the width of the first third line segment 330, the three processing commands may collectively enlarge the widths of the 3 first line segments 310 by 1, the widths of the 3 second line segments 320 by 2, and the widths of the 3 third line segments 330 by 3.
It should be noted that, in practical applications, the number of the GIP units 200 is particularly large, for example, may be tens or hundreds, in which case the routing of the GIP units 200 is very complex, and the GIP routing diagram processing method can greatly ensure the convenience of the adjustment processing, and particularly has a very high use value in an environment where the liquid crystal display panel is widely used.
Optionally, the manner of performing the association processing in step S130 is not limited, and may be set according to the actual application requirement, for example, different processing methods may be provided according to different specific types of the attribute information. The specific type of the attribute information may include, but is not limited to, the nature of the line segment itself, the definition of the line segment given by the user, and the like.
In an alternative example, in conjunction with fig. 8, step S130 may include step S131, step S132, and step S133 to perform association processing according to the nature of the line segment itself.
Step S131, attribute information of each line segment is acquired.
In this embodiment, in order to perform association processing on different line segments, the attribute information of each line segment may be acquired first.
The specific content of the attribute information is not limited as long as the property of the corresponding line segment can be effectively reflected, and may include, but is not limited to, the shape, length, etc. of the line segment, for example. That is, the attribute information may include shape information and/or length information.
Step S132, dividing each line segment with the same attribute information into a set to obtain a plurality of sets.
In this embodiment, the way of performing set division may also be different according to different specific contents of the attribute information. For example, if the attribute information includes shape information, the line segments having the same shape may be divided into a set; if the attribute information includes length information, each line segment with the same length can be divided into a set; if the attribute information includes shape information and length information, the line segments having the same shape and the same length may be divided into a set.
The mode of set division is not limited, and can be selected according to the actual application requirements, as long as each line segment divided into a uniform set needs to be adjusted when being adjusted, so as to ensure the accuracy of adjustment processing.
Step S133 associates the line segments in each set with each other.
In this embodiment, since the requirements for the adjustment processing of the line segments in each set obtained by the processing in step S132 are generally the same, the line segments in each set may be associated so that the processing instruction for any line segment is valid for each line segment in the set corresponding to the line segment, so that the line segments in the set are processed together.
It should be noted that the specific execution order of step S132 and step S133 is not limited, and for example, in an alternative example, after all the line segments included in the connecting line are completely set-divided, association processing may be performed on each set. For another example, in another alternative example, each set is divided, and then each line segment in the set is subjected to association processing.
In another alternative example, in conjunction with fig. 9, step S130 may include step S135 and step S136 to perform association processing according to the definition of the line segment given by the user.
Step S135, responding to the user' S operation on different line segments, to determine whether the line segments have the same attribute information.
In step S136, each line segment determined to have the same attribute information is subjected to association processing.
In this embodiment, it is considered that in practical applications, there may be line segments that need to be subjected to the same adjustment processing (e.g., width adjustment) even if they are different in shape or length, and therefore, it is possible to determine whether or not there is the same attribute information between the line segments based on the user's operation.
For example, in an alternative example, a user may select some continuous line segments as line segments having the same attribute information according to actual needs, and then perform association processing on each of the continuous line segments to ensure that each of the continuous line segments can be processed together based on one processing instruction.
With reference to fig. 10, an embodiment of the present invention further provides a GIP trace map processing apparatus 100 applicable to the electronic device 10, for processing a GIP trace map of an array substrate of a liquid crystal display panel. The GIP trace map processing apparatus 100 may include a trace map obtaining module 110, a line segment associating module 130, and a line segment adjusting module 150.
The routing diagram obtaining module 110 is configured to obtain a GIP routing diagram to be processed, where the GIP routing diagram includes a connection line of each GIP unit 200 corresponding to a pixel in a special-shaped area, and the connection line includes a plurality of line segments. In this embodiment, the trace diagram obtaining module 110 can be configured to execute the step S110 shown in fig. 6, and reference can be made to the foregoing description of the step S110 for relevant contents of the trace diagram obtaining module 110.
The line segment association module 130 is configured to associate line segments with the same attribute information. In this embodiment, the line segment associating module 130 may be configured to perform step S130 shown in fig. 6, and reference may be made to the foregoing description of step S130 for relevant contents of the line segment associating module 130.
The line segment adjusting module 150 is configured to, when receiving a processing instruction for adjusting any of the line segments, perform adjustment processing on the line segment and other line segments associated with the line segment according to the processing instruction. In this embodiment, the line segment adjusting module 150 may be configured to perform step S150 shown in fig. 6, and reference may be made to the foregoing description of step S130 for relevant contents of the line segment adjusting module 150.
With reference to fig. 11, in this embodiment, the line segment associating module 130 may include an information obtaining sub-module 131, a set dividing sub-module 132, and a line segment associating sub-module 133.
The information obtaining sub-module 131 is configured to obtain attribute information of each line segment. In this embodiment, the information obtaining sub-module 131 may be configured to perform step S131 shown in fig. 8, and reference may be made to the foregoing description of step S131 for relevant contents of the information obtaining sub-module 131.
The set dividing submodule 132 is configured to divide the line segments with the same attribute information into a set, so as to obtain multiple sets. In this embodiment, the set dividing sub-module 132 may be configured to perform step S132 shown in fig. 8, and reference may be made to the foregoing description of step S132 for relevant contents of the set dividing sub-module 132.
The line segment association submodule 133 is configured to associate, for each set, each line segment in the set. In this embodiment, the line segment associating submodule 133 may be configured to execute step S133 shown in fig. 8, and reference may be made to the foregoing description of step S133 for relevant contents of the line segment associating submodule 133.
The attribute information may include shape information and/or length information, and correspondingly, the set dividing sub-module 132 may include a first set dividing unit and/or a second set dividing unit.
The first set dividing unit is configured to divide the line segments having the same shape into a set. The second set dividing unit is configured to divide the line segments having the same length into a set.
With reference to fig. 12, in this embodiment, the line segment associating module 130 may also include an information determining sub-module 135 and an associating sub-module 136.
The information determination sub-module 135 is used for responding to the operation of the user on different line segments to determine whether the line segments have the same attribute information. In this embodiment, the information determination sub-module 135 may be configured to perform step S135 shown in fig. 9, and reference may be made to the foregoing description of step S135 for relevant contents of the information determination sub-module 135.
The association processing sub-module 136 is configured to perform association processing on the line segments determined to have the same attribute information. In this embodiment, the association processing sub-module 136 may be configured to execute step S136 shown in fig. 9, and reference may be made to the foregoing description of step S136 for relevant contents of the association processing sub-module 136.
In summary, according to the GIP routing diagram processing method and the GIP routing diagram processing apparatus 100 provided by the present application, each line segment in the GIP routing diagram is associated according to whether the attribute information is the same, so that when a processing instruction for adjusting any line segment is received, the line segment and other line segments associated with the line segment can be adjusted together based on the processing instruction, thereby avoiding the problem of low efficiency caused by the need of adjusting each line segment, greatly improving the efficiency of designing the GIP routing, and improving the production efficiency of the liquid crystal display panel.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method can be implemented in other ways. The apparatus and method embodiments described above are illustrative only, as the flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In addition, the functional modules in the embodiments of the present invention may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, an electronic device, or a network device) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes. It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A GIP routing diagram processing method is used for processing a GIP routing diagram of an array substrate of a liquid crystal display panel, and is characterized by comprising the following steps:
acquiring a GIP routing graph to be processed, wherein the GIP routing graph comprises connecting lines connected with all GIP units corresponding to pixels of a special-shaped area, and the connecting lines comprise a plurality of line segments;
performing association processing on each line segment with the same attribute information;
and when a processing instruction for adjusting any line segment is received, adjusting the line segment and other line segments related to the line segment according to the processing instruction.
2. The GIP routing diagram processing method according to claim 1, wherein the step of associating the line segments having the same attribute information includes:
acquiring attribute information of each line segment;
dividing each line segment with the same attribute information into a set to obtain a plurality of sets;
and for each set, associating the line segments in the set.
3. The GIP routing diagram processing method of claim 2, wherein the attribute information includes shape information; the step of dividing the line segments having the same attribute information into a set includes:
segments having the same shape are divided into a set.
4. The GIP routing diagram processing method of claim 2, wherein the attribute information includes length information; the step of dividing the line segments having the same attribute information into a set includes:
segments having the same length are divided into a set.
5. The GIP routing diagram processing method according to claim 1, wherein the step of associating the line segments having the same attribute information includes:
responding to the operation of a user on different line segments to determine whether the line segments have the same attribute information;
and performing association processing on the line segments determined to have the same attribute information.
6. A GIP routing diagram processing device is used for processing a GIP routing diagram of an array substrate of a liquid crystal display panel, and is characterized by comprising:
the routing diagram acquisition module is used for acquiring a GIP routing diagram to be processed, wherein the GIP routing diagram comprises connecting lines connected with all GIP units corresponding to pixels of the special-shaped area, and the connecting lines comprise a plurality of line segments;
the line segment association module is used for associating all line segments with the same attribute information;
and the line segment adjusting module is used for adjusting the line segment and other line segments related to the line segment according to the processing instruction when receiving the processing instruction for adjusting any line segment.
7. The GIP routing graph processing apparatus according to claim 6, wherein the line segment associating module:
the information acquisition submodule is used for acquiring attribute information of each line segment;
the set dividing submodule is used for dividing each line segment with the same attribute information into a set so as to obtain a plurality of sets;
and the line segment association submodule is used for associating each line segment in each set.
8. The GIP routing graph processing apparatus of claim 7, wherein the attribute information comprises shape information; the set partitioning sub-module includes:
a first set dividing unit for dividing each line segment having the same shape into one set.
9. The GIP routing graph processing apparatus of claim 7, wherein the attribute information comprises length information; the set partitioning sub-module includes:
and a second set dividing unit for dividing the line segments having the same length into a set.
10. The GIP routing graph processing apparatus according to claim 6, wherein the line segment associating module:
the information determination submodule is used for responding to the operation of a user on different line segments so as to determine whether the line segments have the same attribute information;
and the association processing submodule is used for associating the line segments determined to have the same attribute information.
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