CN109239736B - Phased array antenna beam pointing error correction method - Google Patents
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
- G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
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- G01S19/23—Testing, monitoring, correcting or calibrating of receiver elements
- G01S19/235—Calibration of receiver components
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- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
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Abstract
The invention provides a phased array antenna beam pointing error correction method based on linear interpolation. The method is used as a part in the calculation of the beam control code of the large-scale phased array antenna, realizes the function of correcting the pointing error of the antenna beam, effectively reduces the calculation complexity, is beneficial to the realization of FPGA, and has strong practicability in the application field of the phased array antenna with narrow antenna beam and high requirement on pointing error.
Description
Technical Field
The invention relates to calculation of a beam control code of a large-scale phased array antenna, in particular to a beam pointing error correction method.
Background
The phased array antenna is an array antenna formed by arranging a plurality of same radiating elements according to a certain rule. The phased array antenna intelligently controls and adjusts the amplitude and phase of each unit of the array through a specific feeding mode, so that beam forming and inertially-free flexible scanning are realized.
An important application of the phased array antenna is inter-satellite communication, the inter-satellite communication distance is long, the link loss is large, and the development of a large Ka frequency band phased array is a necessary trend along with the continuous increase of the communication speed demand. The wave control system generates the needed beam pointing control code under the control of the embedded processing chip and sends the control code to each unit component to complete the directional control of the beam. In some application scenarios, such as Ka-band carrying relay measurement and control, the antenna array surface is large in scale, the beam is narrow, the scanning angular speed is high, and higher requirements are put forward on the pointing accuracy and the calculation speed of the beam.
In general, under the influence of antenna array element arrangement, array surface installation errors and a single antenna directional pattern, the actual direction of an antenna beam has a certain deviation from the theoretical direction, and particularly in the off-axis angle direction, the larger the off-axis angle is, the larger the error is, and the azimuth error is relatively smaller. When the beam is narrow, error correction is needed, and the method is divided into a one-dimensional linear interpolation method and a two-dimensional linear interpolation method according to different error requirements. The formula of the linear interpolation method is division, and if the traditional quantization method is adopted, namely the angle value is consistent with the actual value or is integral multiple, two points of inconvenience are brought. Firstly, when a fitting area is divided, the off-axis angle is judged in a segmented mode, a specific numerical value is required to be obtained accurately, and high-order judgment cannot be carried out; secondly, division operation cannot be avoided, two times of addition operation are added, and the calculation complexity and the resource consumption cannot be effectively reduced.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the method overcomes the defects of the prior art, provides a pointing error correction calculation method suitable for being realized by using an FPGA (field programmable gate array), realizes the error correction function of antenna beam pointing, and simultaneously considers the accuracy, the calculation speed and the resource consumption.
The technical scheme adopted by the invention is as follows:
the error correction module finishes the beam pointing error correction of the phased array antenna and inputs the beam pointing error into the off-axis angle theta and the rotation angle
The bit width is 16, and the output is the off-axis angle theta and the rotation angle->
The bit widths are all 16. The angle quantization method is as follows:
where mod (X, 2) 16 ) Represents X to 2 16 And the remainder, round () means rounding up nearby.
Due to the mounting error of the antenna array surface and the gain of each single antennaThe effect of the directional inconsistency is that the theoretical beam pointing direction has a certain error from the actual beam pointing direction, and the deviation is the off-axis angle theta and the rotation angle
As a function of (c). Generally, the pointing error is greatly influenced by the off-axis angle and is less influenced by the rotation angle, so the off-axis angle adopts a smaller step diameter, and the rotation angle adopts a larger step diameter to extract error data. />
And compensating in the off-axis angle direction by adopting a one-dimensional linear fitting interpolation method, wherein the sampling interval of error data is 1.40625 degrees. Assuming that the off-axis angle theta is between the error value sampling angle theta 1 And theta 2 Where theta is 1 And theta 2 Corresponding errors are respectively delta theta 1 And Δ θ 2 The actual directional diagram test data is obtained by processing, quantizing the method and the method of theta,
The same is true. The linear fit calculation formula is:
the rotation angle direction is not fitted, the rotation angle range from 0 degree to 360 degrees is averagely divided into 8 areas, the span of each area is 45 degrees, and error data on the central line of the area are adopted in the areas for correction.
The implementation process is divided into two steps:
first, Δ θ is calculated 1 And Δ θ 2 . The pointing error correction data storage table contains 8 slices, 47 data for each slice, each data occupies 2 bytes, and total 752 bytes.
The sampling point interval in the theta direction of the error correction data is 360 DEG/2 8 ，
The sampling interval of the direction is 360 degrees/2 3 And θ and->
The 2 integral power equal division quantization method is adopted, the high 8 bits of the 16-bit fixed point number representing theta are regarded as 'integer' bits, the low 8 bits are regarded as 'decimal' bits, and then theta is regarded as 1 I.e. 'integer' part of theta, theta 2 Is the 'integer' portion of θ plus '1', such that θ 1 The relative address is represented by the upper 8 bits of θ. For the same reason, can utilize>
Is counted 4 high->
Relative address will indicate >>
The upper 3 bits of the 16-bit fixed point number are regarded as 'integer', and the line in the area is equivalent to a couple->
Rounding off and comparing>
The high 3 value of the first bit is added with the high 4 value. The method changes the rounding-down processing in the address calculation into truncation bits, and changes the rounding-up processing into 'integer' bits plus first 'decimal' bits nearby, thereby being very suitable for the fixed-point calculation of the FPGA.
Relative addresses of theta and
adding the relative addresses, and adding the flash memory initial address of the error correction data to obtain delta theta 1 Memory address in flash, Δ θ 2 Has a memory address of delta theta 1 Adding 1 to the storage address, and reading the flash according to the address to obtain error correctionData Δ θ 1 And Δ θ 2 。
Then, the corrected θ value is obtained by a formula. Because the input angle theta is quantized equally by 360 DEG to the power of 2, theta 1 An 'integer' portion corresponding to theta, then (theta-theta) 1 ) Corresponding to the 'decimal' part of theta, and because of (theta) 2 -θ 1 )＝360°/2 8 Corresponding to the 'integer' 1, so (theta-theta) 1 )/(θ 2 -θ 1 ) May be represented by the lower 8 bits of theta. Will delta theta 1 And Δ θ 2 And multiplying the difference by the lower 8 bits of theta to obtain error data in the theta direction, thereby finishing the pointing error correction.
Compared with the prior art, the invention has the beneficial effects that:
when the linear interpolation of the pointing error correction is calculated, the input angle, the error angle and the sampling point all adopt an integer power equal division quantization method of 2, which simplifies the calculation of the system:
firstly, in the addition operation process of the angle values, the automatic overflow of high bits is equivalent to the remainder operation, the final result is not influenced, and the remainder operation is not needed, so that the calculation redundancy is reduced.
Secondly, the high bits of the input off-axis angle and the rotation angle are taken to carry out address calculation of pointing error correction data, and truncation is used for replacing division and rounding operation, so that the calculation complexity is effectively reduced.
Thirdly, when one-dimensional linear interpolation calculation is carried out in the off-axis angle direction, the lower 8 bits of theta are adopted for expression (theta-theta) 1 )/(θ 2 -θ 1 ) The method changes two times of subtraction operation and one time of division operation into only one time of simple bit-cutting operation, is very beneficial to FPGA realization, and greatly reduces the operation complexity.
Drawings
FIG. 1 is a block diagram of a beam steering code calculation module according to the present invention;
FIG. 2 is a sectional view of the pointing error correction test data extraction according to the present invention;
FIG. 3 is a block diagram of a pointing error correction data read calculation according to the present invention;
FIG. 4 is a block diagram of the pointing error correction linear interpolation calculation of the present invention;
Detailed Description
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
Fig. 1 is a block diagram of a beam control code calculation module according to the present invention, in which the calculation of the beam control code includes a pointing error correction module, a trigonometric function calculation module, an address calculation module and a table look-up module, in which the function calculation module calculates sine values and cosine values of off-axis angles and rotation angles, the address calculation module calculates addresses of corresponding beam control codes in a storage table by using a pipeline, and the table look-up module reads control code data of corresponding addresses in flash.
The pointing error correction module finishes the beam pointing error correction of the phased array antenna and inputs the beam pointing error into an off-axis angle theta and a rotation angle
Each bit width is 16, and the output is the corrected off-axis angle theta and rotation angle->
The bit widths are all 16. The angle quantization method is as follows:
where mod (X, 2) 16 ) Represents X to 2 16 And 3, complementation, wherein round () represents rounding up nearby.
Due to the influence of the mounting error of the antenna array surface and the inconsistency of the single antenna gain directions, certain error exists between the theoretical beam direction and the actual beam direction, and the error is the off-axis angle theta and the rotation angle
As a function of (c). Generally, the pointing error is greatly influenced by the off-axis angle and is less influenced by the rotation angle, so the off-axis angle adopts a smaller step diameter, and the rotation angle adopts a larger step diameter to extract error data.
Off-axis angular direction miningAnd compensating by using a one-dimensional linear fitting interpolation method, wherein the sampling interval of error data is 1.40625 degrees. Assuming that the off-axis angle theta is between the error value sampling angle theta 1 And theta 2 Where theta is 1 And theta 2 Corresponding errors are respectively delta theta 1 And Δ θ 2 The actual directional diagram test data is obtained by processing, quantizing the method and the method of theta,
The same is true. The linear fit calculation formula is:
the rotation angle direction is not fitted, the rotation angle range of 0 to 360 degrees is averagely divided into 8 regions, the span of each region is 45 degrees, error data on the region central lines are adopted in the regions for correction, and the region central lines are respectively rotation angles of 0 degrees, 45 degrees, 90 degrees, 135 degrees, 180 degrees, 225 degrees, 270 degrees and 315 degrees as shown in fig. 2.
The implementation process is divided into two steps:
first, Δ θ is calculated 1 And Δ θ 2 . The pointing error correction data storage table contains 8 slices, 47 data for each slice, each data occupies 2 bytes, total 752 bytes, and the pointing error correction data storage format is as follows:
the sampling point interval in the theta direction of the error correction data is 360 DEG/2 8 ，
The sampling interval of the direction is 360 degrees/2 3 And theta and +>
All adopt an integer power of 2 equal division quantization method to represent 16-bit fixed point number of thetaThe upper 8 bits are regarded as 'integer' bits and the lower 8 bits are regarded as 'decimal' bits, then theta 1 I.e. 'integer' part of theta, theta 2 Is the 'integer' portion of theta plus '1', whereby theta 1 The relative address is represented by the upper 8 bits of θ. For the same reason, can utilize>
Is counted 4 high->
Relative address, will indicate->
The upper 3 bits of the 16-bit fixed point number are regarded as 'integer', and the line in the area is equivalent to a couple->
Rounded up (rounded up) nearby, will->
Is selected by adding the high 3 value to the high 4 value, and->
The relative address correspondence is shown in the following table. The method changes the rounding-down processing in the address calculation into truncation processing, changes the rounding-up processing into 'integer' bits plus first 'decimal' bits, and is very suitable for the fixed-point calculation of the FPGA.
Relative addresses of theta and
adding the relative addresses, and adding the flash memory initial address of the error correction data to obtain delta theta 1 Memory address in flash, Δ θ 2 Has a memory address of delta theta 1 Adds 1 to the memory address ofObtaining error correction data delta theta by reading flash from address 1 And Δ θ 2 The calculation block diagram is shown in fig. 3. The calculation steps are as follows:
step 1, mixing
And adding a high 4-bit value to the high 3-bit value to obtain the nearest tangent plane of the region, wherein the input bit widths are 3 and 1 respectively, the input bit width is 3, and the high bits automatically overflow.
Step 2, taking the high 8 position of theta as theta 1 Relative address, and simultaneously using the value calculated in step 1, by looking up
Relative address mapping table get>
Relative address.
Step 3, mixing theta 1 Relative address sum
Adding the relative addresses to obtain->
Relative memory address of the direction error value.
Step 4, adding the value obtained in the step 3 and the initial address of the pointing error correction data flash to obtain
Absolute memory address of the direction error value.
Step 5, reading flash by using the address obtained by the calculation in the step 4 to obtain pointing error data delta theta 1 ；
Step 6, reading the flash by adding 1 to the address obtained by the calculation in the step 4 to obtain pointing error data delta theta 2 ；
Then, the corrected θ value is calculated by a formula. Because the input angle theta is quantized equally by 360 DEG to the integral power of 2, theta 1 An 'integer' portion corresponding to theta, then (theta-theta) 1 ) Corresponding to the 'decimal' part of theta, and because of (theta) 2 -θ 1 ) (= 360 °/2 °) is equivalent to the 'integer' 1, and therefore (θ - θ) 1 )/(θ 2 -θ 1 ) May be represented by the lower 8 bits of theta. The method changes two times of subtraction and one time of division into only one time of simple truncation operation, is very beneficial to FPGA realization, and greatly reduces the operation complexity. In addition, after the angle values are added, the high-order automatic overflow does not affect the calculation result, and the remainder operation is not needed, so that the calculation redundancy is reduced, and the implementation process is simplified.
The calculation block diagram is shown in fig. 4 and is divided into 4 steps.
Step 1, convert Δ θ 1 And Δ θ 2 Adding, inputting 16 bits, outputting 16 bits, automatically overflowing high bits to obtain a value delta theta 2 -Δθ 1 ；
Step 2, convert Δ θ 2 -Δθ 1 Multiplying with the lower 8 bits of theta, outputting to cut off the lower 8 bits, retaining 16 bits, automatically overflowing the upper bit to obtain the value of
Step 3, 16 bits are added
And 16 bits Δ θ 1 Adding, outputting 16 bits, automatically overflowing the high bit to obtain a value of ^ 5>
Namely delta theta;
and step 4, adding the 16 bits delta theta and the 16 bits theta, outputting a 16 bit pointing error corrected theta value, and automatically overflowing high bits.
It should be noted that the foregoing is only illustrative and illustrative of the present invention, and that any modifications and alterations to the present invention are within the scope of the present invention as those skilled in the art will recognize.
Claims (3)
1. Phased array antennaThe beam pointing error correction method is characterized in that an error correction module finishes beam pointing error correction of the phased array antenna and inputs the beam pointing error into an off-axis angle theta and a rotation angle
Each bit width is 16, and the output is the corrected off-axis angle theta and rotation angle->
The bit width is 16, and the angle quantization method is as follows:
where mod (X, 2) 16 ) Represents X to 2 16 Complementation, round () represents rounding nearby;
compensating in off-axis direction by one-dimensional linear fitting interpolation method with error data sampling interval of 1.40625 ° assuming that off-axis angle θ is between error sampling angle θ 1 And theta 2 Where theta is 1 And theta 2 Corresponding errors are respectively delta theta 1 And Δ θ 2 For the actual directional diagram test data is obtained through processing, the linear fitting calculation formula is as follows:
the rotation angle direction is not fitted, the rotation angle range of 0-360 degrees is averagely divided into 8 regions, the span of each region is 45 degrees, the theta direction correction is carried out in the regions by adopting error data on the center lines of the regions, and the center lines of the regions are the rotation angles of 0 degrees, 45 degrees, 90 degrees, 135 degrees, 180 degrees, 225 degrees, 270 degrees and 315 degrees respectively;
the sampling point interval in the theta direction is 360 DEG/2 8 ，
Sampling in the direction ofThe sample interval is 360 degrees/2 3 And θ and->
The integral power of 2 is adopted to equally divide the quantization method, the high 8 bits of the 16-bit fixed point number representing theta are regarded as 'integer' bits, the low 8 bits are regarded as 'decimal' bits, and then theta is regarded as 1 Is the 'integer' part of theta, theta 2 Is the 'integer' portion of θ plus '1', such that θ 1 The relative address is represented by the upper 8 bits of θ;
in the same way, utilize
High 4-bit calculation of (a)>
Relative address will indicate >>
The upper 3 bits of the 16-bit fixed point number are regarded as 'integer', and the line in the area is equivalent to a couple->
Get rounded' nearby, will>
The high 3 bit value of (3) plus the 4 th bit value from the high bit;
relative addresses of theta and
adding the relative addresses, and adding the flash memory first address of the error correction data to obtain delta theta 1 Memory address in flash, Δ θ 2 Has a memory address of delta theta 1 Adding 1 to the memory address, and reading the flash according to the memory address to obtain error correction data delta theta 1 And Δ θ 2 ；
Error correction data Delta theta 1 And Δ θ 2 The calculation specifically comprisesThe following steps:
step S11, will
Adding a high-3 bit value and a high-4 bit value to obtain a nearest tangent plane of the area, wherein the input bit widths are 3 and 1 respectively, the input bit width is 3, and the high bits automatically overflow;
step S12, taking the high 8 bits of theta as theta 1 Relative address, and the calculated value in step S11, by looking up
Relative address mapping table get>
A relative address;
step S13, converting theta 1 Relative address sum
Adding the relative addresses to obtain->
Relative memory addresses for directional error values;
step S14, adding the value obtained in step S13 and the initial address of the pointing error correction data flash to obtain
An absolute memory address of the direction error value;
step S15, reading flash by using the address obtained by the calculation in the step S14 to obtain pointing error data delta theta 1 ；
Step S16, using the address obtained by calculation in step S14 plus 1 to read the flash to obtain the pointing error data delta theta 2 ；
The input angle theta is quantized equally according to the integral power of 2 by 360 degrees 1 An 'integer' portion corresponding to theta, (theta-theta) 1 ) Corresponding to the 'fractional' portion of theta,also because (theta) 2 -θ 1 )＝360°/2 8 Corresponding to the 'integer' 1, so (theta-theta) 1 )/(θ 2 -θ 1 ) Can be represented by the lower 8 bits of theta; will delta theta 1 And Δ θ 2 And multiplying the difference by the lower 8 bits of theta to obtain error data in the theta direction, thereby finishing the pointing error correction.
2. The method of claim 1, wherein the step of calculating the corrected theta value comprises the steps of:
step S21, converting Delta theta 1 And Δ θ 2 Adding, inputting 16 bits, outputting 16 bits, automatically overflowing high bits to obtain a value delta theta 2 -Δθ 1 ；
Step S22, converting Delta theta 2 -Δθ 1 Multiplying with the lower 8 bits of theta, outputting to cut off the lower 8 bits, retaining 16 bits, automatically overflowing the upper bit to obtain the value of
Step S23, 16 bits
And 16 bits Δ θ 1 Adding, outputting 16 bits, automatically overflowing the high bit to obtain a value of ^ 5>
Namely delta theta;
and step S24, adding the 16 bits delta theta and the 16 bits theta, outputting a theta value after correcting the 16 bits pointing error, and automatically overflowing high bits.
3. A phased array antenna beam pointing error correction system is characterized by comprising a pointing error correction module, a trigonometric function calculation module, an address calculation module and a table look-up module:
the directional error correction module finishes the beam directional error correction of the phased array antenna, inputs the beam directional error into an off-axis angle theta and a rotation angle phi, the bit width is 16, outputs the beam directional error into the off-axis angle theta and the rotation angle phi after correction, and the bit width is 16;
the trigonometric function calculation module calculates sine values and cosine values of off-axis angles and rotation angles;
the address calculation module calculates the address of the corresponding beam control code in the storage table by adopting a production line;
the table look-up module reads control code data of a corresponding address in the flash;
the angle quantization method is as follows:
where mod (X, 2) 16 ) Represents X to 2 16 Complementation, round () represents rounding nearby;
compensating in off-axis direction by one-dimensional linear fitting interpolation method with error data sampling interval of 1.40625 ° assuming that off-axis angle θ is between error sampling angle θ 1 And theta 2 Where theta is 1 And theta 2 Corresponding errors are respectively delta theta 1 And Δ θ 2 The linear fitting calculation formula is as follows:
the rotation angle direction is not fitted, the rotation angle range of 0-360 degrees is averagely divided into 8 regions, the span of each region is 45 degrees, the theta direction correction is carried out in the regions by adopting error data on the center lines of the regions, and the center lines of the regions are the rotation angles of 0 degrees, 45 degrees, 90 degrees, 135 degrees, 180 degrees, 225 degrees, 270 degrees and 315 degrees respectively;
the sampling point interval in the theta direction is 360 DEG/2 8 ，
The sampling interval of the direction is 360 degrees/2 3 And θ and->
The 2 integral power equal division quantization method is adopted, the high 8 bits of the 16-bit fixed point number representing theta are regarded as 'integer' bits, the low 8 bits are regarded as 'decimal' bits, and then theta is regarded as 1 I.e. 'integer' part of theta, theta 2 Is the 'integer' portion of theta plus '1', whereby theta 1 The relative address is represented by the upper 8 bits of θ; />
In the same way, utilize
Is counted 4 high->
Relative address, will indicate->
The upper 3 bits of the 16-bit fixed point number of (a) are considered 'integers', the line in the area is equivalent to a pair->
Get rounded' nearby, will>
The high 3 bit value of (3) plus the 4 th bit value from the high bit;
relative addresses of theta and
adding the relative addresses, and adding the flash memory initial address of the error correction data to obtain delta theta 1 Memory address in flash, Δ θ 2 Has a memory address of delta theta 1 Adding 1 to the memory address, and reading the flash according to the memory address to obtain error correction data delta theta 1 And Δ θ 2 ；
Error correction data Delta theta 1 And Δ θ 2 The calculation specifically comprises the following steps:
step S11, will
Adding a high-3 bit value and a high-4 bit value to obtain a nearest tangent plane of the region, wherein the input bit widths are 3 and 1 respectively, the input bit width is 3, and the high bits automatically overflow;
step S12, taking the high 8 bits of theta as theta 1 Relative address, and the calculated value in step S11, by looking up
Get a relative address mapping table>
A relative address;
step S13, adding theta 1 Relative address sum
Adding the relative addresses to obtain->
Relative memory addresses for directional error values;
step S14, adding the value obtained in step S13 and the initial address of the pointing error correction data flash to obtain
An absolute memory address of the direction error value;
step S15, reading flash by using the address obtained by the calculation in the step S14 to obtain pointing error data delta theta 1 ；
Step S16, using the address obtained by calculation in step S14 plus 1 to read the flash to obtain the pointing error data delta theta 2 ；
The input angle theta is quantized equally according to the integral power of 2 by 360 degrees 1 An 'integer' portion corresponding to theta, (theta-theta) 1 ) Corresponding to the 'decimal' part of theta, and because of 2 -θ 1 )＝360°/2 8 Is equivalent toIn the 'integer' 1, so (theta-theta) 1 )/(θ 2 -θ 1 ) May be represented by the lower 8 bits of θ; will delta theta 1 And Δ θ 2 And multiplying the difference by the lower 8 bits of theta to obtain error data in the theta direction, thereby finishing the pointing error correction.
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