CN109213710A - HSSI High-Speed Serial Interface device and its data transmission method - Google Patents
HSSI High-Speed Serial Interface device and its data transmission method Download PDFInfo
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- CN109213710A CN109213710A CN201710532203.9A CN201710532203A CN109213710A CN 109213710 A CN109213710 A CN 109213710A CN 201710532203 A CN201710532203 A CN 201710532203A CN 109213710 A CN109213710 A CN 109213710A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4286—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link
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Abstract
A kind of HSSI High-Speed Serial Interface device and its data transmission method.Information-processing circuit generates the first configuration information in response to a data transfer task, storage element of this data transfer task to access another HSSI High-Speed Serial Interface device.Coding circuit carries out coded treatment to the first configuration information and generates the first coding configuration order.Coding circuit.High-speed serial interface circuit couples coding circuit, and the first coding configuration order is embedded among the control bit of multiple first data samples based on HSSI High-Speed Serial Interface agreement.High-speed serial interface circuit transmits multiple first frames composed by multiple first data sample to another HSSI High-Speed Serial Interface device, to carry out above-mentioned data transfer task by transmission the first coding configuration order to another HSSI High-Speed Serial Interface device.
Description
[technical field]
The invention relates to the transmission of the data of chip chamber, and in particular to a kind of HSSI High-Speed Serial Interface device and its
Data transmission method.
[background technique]
Demand with people to data volume is increasing, also proposed new choose to chip interior interface transmission speed
War.Traditional parallel interface gradually shows shortcoming.It is compared to traditional parallel interface, emerging JESD204B interface
There is apparent advantage in terms of power consumption and number of pins.In addition, JESD204B interface can provide the transmission of higher efficiency, therefore
It is suitable for the coffret of analog-digital converter or digital analog converter.Based on above-mentioned various advantages, JESD204B is connect
Mouth is increasingly becoming new mainstream interface standard.
In general, JESD204B interface is transmitted to carry out the mass data of high-speed, without being used to transmit chip
Between control information or allow chip both sides exchange internal register status information.Therefore, the core configured with JESD204B interface
Piece is usually also configured with another low speed transmissions interface, to transmit some control information or chip internal register in chip chamber
Status information.Above-mentioned low speed transmissions interface is, for example, that inter-integrated circuit (Inter-Integrated Circuit, I2C) connects
Mouth or the interface serial peripheral interface (Serial Peripheral Interface, SPI) etc..However, based on volume in the chip
The demand of the various coffret of outer configuration, the pin number of chip also by with increase.The pin number of chip will directly affect
The area and manufacturing cost of chip, therefore the pin number for how effectively reducing crystal face is those skilled in the art's view of concern
One of topic.
[summary of the invention]
In view of this, the present invention provides a kind of HSSI High-Speed Serial Interface device and its data transmission method, chip can be reduced
Pin simultaneously reduces chip entire area.
One embodiment of the invention provides a kind of HSSI High-Speed Serial Interface device comprising information-processing circuit, coding circuit,
And high-speed serial interface circuit.Information-processing circuit generates the first configuration information in response to a data transfer task, above-mentioned
Storage element of the data transfer task to access another HSSI High-Speed Serial Interface device.Coding circuit couples information processing electricity
Road carries out coded treatment to the first configuration information and generates the first coding configuration order.High-speed serial interface circuit coupling coding
Circuit, based on HSSI High-Speed Serial Interface agreement by first coding configuration order be embedded in multiple first data samples control bit it
In, and multiple first frames composed by multiple first data sample are transmitted to another HSSI High-Speed Serial Interface device, it is passed with passing through
The first coding configuration order is sent to carry out above-mentioned data transfer task to another HSSI High-Speed Serial Interface device.
In one embodiment of the invention, it is above-mentioned first coding configuration order include leading character, start bit, operational order,
Destination address and specific data.
In one embodiment of the invention, when aforesaid operations order is reading order, the spy of the first coding configuration order
Fixed number evidence is reading serial number.When aforesaid operations order is write back data order, the specific data of the first coding configuration order is
Write back read data.When aforesaid operations order is writing commands, the specific data of the first coding configuration order is write-in data.
In one embodiment of the invention, above-mentioned leading character includes multiple leading character positions, and each leading character position is first
Value.Above-mentioned start bit is the second place value, and the first place value is different from the second place value.
In one embodiment of the invention, aforesaid operations order includes multiple command bits, and above-mentioned destination address includes
More address bits.Above-mentioned specific data includes multiple specific data positions, and the quantity of above-mentioned leading character position is greater than start bit
Quantity, the quantity of operative position, the summation of the quantity of address bit and the quantity of specific data position.
In one embodiment of the invention, above-mentioned high-speed serial interface circuit is from another HSSI High-Speed Serial Interface device reception group
At multiple second data samples of multiple second frames, and HSSI High-Speed Serial Interface device further includes decoding circuit.Decoding circuit coupling
Between information process unit and high-speed serial interface circuit, each second data sample is obtained by high-speed serial interface circuit
Control bit and obtain the second coding configuration order, and decoding processing is carried out to the second coding configuration order and extracts second with confidence
Breath.Information-processing circuit executes an operation according to the second configuration information, is passed with carrying out the data of HSSI High-Speed Serial Interface device initiation
Defeated task carries out another data transfer task that another HSSI High-Speed Serial Interface device is initiated.
In one embodiment of the invention, aforesaid operations include writing back read data from the acquisition of the second configuration information, being written
Among data storage to the storage element of high speed serial interface device, or according to the destination address in the second configuration information from height
Back read data is write in the storage element acquisition of fast serial interface device.
In one embodiment of the invention, if above-mentioned data transfer task is that data will be written to be transmitted to another high speed serialization
The operational order of interface arrangement, the first coding configuration order is writing commands.If above-mentioned data transfer task is from another high speed
When serial interface device reads data, the operational order of the first coding configuration order is reading order, the second coding configuration order
Operational order be write back data order, and aforesaid operations be from the second configuration information acquisition write back read data.
In one embodiment of the invention, above-mentioned high-speed serial interface circuit includes interface transmitter and interface receiver.
Interface transmitter couples coding circuit, and interface receiver couples decoding circuit.
In one embodiment of the invention, above-mentioned HSSI High-Speed Serial Interface agreement includes JESD204b agreement.
From another point of view, the present invention proposes a kind of data transmission method based on HSSI High-Speed Serial Interface, the method
Include the following steps.The first configuration information is generated in response to a data transfer task, data transfer task is another to access
The storage element of HSSI High-Speed Serial Interface device.Coded treatment is carried out to the first configuration information and generates the first coding configuration order.
Based on a HSSI High-Speed Serial Interface agreement, the first coding configuration order is embedded among the control bit of multiple first data samples.
Multiple first frames composed by the first data sample are transmitted to another HSSI High-Speed Serial Interface device according to HSSI High-Speed Serial Interface agreement,
To carry out the data transfer task by transmission the first coding configuration order to another HSSI High-Speed Serial Interface device.
Based on above-mentioned, in one embodiment of this invention, when HSSI High-Speed Serial Interface device attempts to access another high speed serialization
When the storage element of interface arrangement, HSSI High-Speed Serial Interface device is embedded in HSSI High-Speed Serial Interface agreement after can encoding configuration information
Among the control bit of the multiple data samples standardized, cause another HSSI High-Speed Serial Interface device in response to receiving multiple data
Multiple frames composed by sample and configuration information can be decoded out.Then, another HSSI High-Speed Serial Interface can according to configuration information and
Storage write-in data.Alternatively, another HSSI High-Speed Serial Interface can read the back read data of writing in storage element according to configuration information,
And by write back read data return to generate configuration information HSSI High-Speed Serial Interface device.In this way, originally above-mentioned to transmit
The configuration of another coffret of configuration information can omit.By omitting in configuration coffret to chip, the number of pins of chip
Amount can be reduced, and therefore reduce chip area.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and cooperate institute's accompanying drawings
It is described in detail below.
[Detailed description of the invention]
Fig. 1 is the schematic diagram of HSSI High-Speed Serial Interface device depicted in an embodiment according to the present invention.
Fig. 2 is the schematic diagram of a frame depicted in an embodiment according to the present invention.
Fig. 3 is the schematic diagram of coding configuration order depicted in an embodiment according to the present invention.
Fig. 4 A is the schematic diagram of the transmission of data depicted in an embodiment according to the present invention.
Fig. 4 B is the schematic diagram of the transmission of data depicted in an embodiment according to the present invention.
Fig. 5 A is the flow chart of data transmission method depicted in an embodiment according to the present invention.
Fig. 5 B is the flow chart of data transmission method depicted in an embodiment according to the present invention.
[symbol description]
100,200: HSSI High-Speed Serial Interface device
110,210: information-processing circuit
130,250: coding circuit
140,240: high-speed serial interface circuit
150,230: decoding circuit
120,220: storage element
141,242: interface transmitter
241,142: interface receiver
M1: the first configuration information
M2: the second configuration information
F1_1~F1_N: first frame
F2_1~F2_N: the second frame
S1~S8: data sample
CS: control bit
F1: frame
31: leading character
32: start bit
33: operational order
34: destination address
35: specific data
Cmd1, X1: the first coding configuration order
X2: the second coding configuration order
41: reading order
42,44,48: destination address
43: write back data order
45: writing back read data
47: writing commands
49: write-in data
S501~S508: step
[specific embodiment]
With detailed reference to this exemplary embodiment, illustrate the example of the exemplary embodiment in the accompanying drawings.In addition, all
Possible place, represents same or like part using component/component of identical label in schema and embodiment.
First illustrate, below in an example by using JESD204B interface as HSSI High-Speed Serial Interface of the invention into
Row explanation.However, the present invention is not restricted to this, the same concept presented in the present invention can be answered by those skilled in the art
For in any other high speed serialization interface.
Fig. 1 is the schematic diagram of HSSI High-Speed Serial Interface device depicted in an embodiment according to the present invention.Fig. 1 is please referred to,
HSSI High-Speed Serial Interface device 100 and another HSSI High-Speed Serial Interface device 200.HSSI High-Speed Serial Interface device 200, which can be for example, to be had
The System on Chip/SoC of analog-digital converter, but the present invention is not restricted to this.HSSI High-Speed Serial Interface device 100 includes information processing
Circuit 110, storage element 120, coding circuit 130, decoding circuit 150 and high-speed serial interface circuit 140.It is similar, it is high
Fast serial interface device 200 includes information-processing circuit 210, storage element 220, coding circuit 250, decoding circuit 230, and
High-speed serial interface circuit 240.
Need to access HSSI High-Speed Serial Interface device 200 when HSSI High-Speed Serial Interface device 100 executes a data transfer task
Storage element 220 when, the information-processing circuit 110 of HSSI High-Speed Serial Interface device 100 may be in response to this data transfer task and
Generate the first configuration information M1.The storage element 220 of above-mentioned HSSI High-Speed Serial Interface device 200 is, for example, register or memory.
Coding circuit 130 couples information-processing circuit 110, receives above-mentioned first configuration information M1, and match confidence to first
Breath M1 carries out coded treatment and generates the first coding configuration order X1.Then, coding circuit 130 can be by this first coding configuration life
It enables X1 be sent to the high-speed serial interface circuit 140 for supporting HSSI High-Speed Serial Interface agreement, is based on high-speed serial interface circuit 140
First coding configuration order X1 is embedded among the control bit of multiple first data samples by HSSI High-Speed Serial Interface agreement.High speed is gone here and there
Line interface circuit 140 couples coding circuit 130 and supports HSSI High-Speed Serial Interface agreement, and including interface transmitter 141 and interface
Receiver 142.Interface transmitter 141 couples coding circuit 130, and interface receiver 142 couples decoding circuit 150.It is similar,
The high-speed serial interface circuit 240 of HSSI High-Speed Serial Interface device 200 also includes interface transmitter 242 and interface receiver 241.Such as
Shown in Fig. 1, the interface transmitter 141 of high-speed serial interface circuit 140 connects the interface receiver of high-speed serial interface circuit 240
241, and the interface receiver 142 of high-speed serial interface circuit 140 connects the interface transmitter of high-speed serial interface circuit 240
242。
Specifically, the specification based on HSSI High-Speed Serial Interface agreement, data to be sent will be turned to multiple frames by frame, should
Multiple frames are made of multiple data samples respectively, and each data sample all has at least one control for Flexible use
Position.In this present embodiment, couple coding circuit 130 high-speed serial interface circuit 140 can based on HSSI High-Speed Serial Interface agreement and
Generate multiple first frame F1_1~F1_N.As previously mentioned, each frame includes multiple first data samples, and each first data sample
This includes at least one control bit.The interface transmitter 141 of high-speed serial interface circuit 140 can encode configuration order X1 for first
The control bit being embedded in multiple first frame F1_1~F1_N.
In one embodiment, high-speed serial interface circuit 140 can be by composed by multiple first data sample multiple
One frame F1_1~F1_N is sent to another HSSI High-Speed Serial Interface device 200.Also, by the way that the first coding configuration order X1 is embedded in
The mode of the control bit of first data sample, the first coding configuration order X1 can be transferred into another HSSI High-Speed Serial Interface device
200 and carry out above-mentioned data transfer task.Specifically, interface transmitter 141 may include serializer (serializer), with
Via at least one transmission channel (transmission lane) by multiple first frame F1_1~F1_N Serial output to interface
Receiver 241.Since the first coding configuration order X1 has been embedded among the control bit of multiple first frame F1_1~F1_N,
Therefore the first coding configuration order X1 can the transmission based on first frame F1_1~F1_N and connecing by HSSI High-Speed Serial Interface device 200
Mouth receiver 241 is received.
Interface receiver 241 receives first frame F1_1~F1_N, and is solved based on HSSI High-Speed Serial Interface agreement skeletonisation
First frame F1_1~F1_N and the first coding configuration order X1 is extracted out of first frame F1_1~F1_N control bit.Then,
To decoding circuit 230,230 decodable code first of decoding circuit encodes matches first coding configuration order X1 of the output of interface receiver 241
It sets order X1 and restores the first configuration information M1, and the first configuration information M1 is exported to information-processing circuit 210.
In this way, information-processing circuit 210 can according to the first configuration information M1 content and will be connect from high speed serialization
Storage element 220 is written in the data of mouth device 100.Alternatively, information-processing circuit 210 can be according to the content of the first configuration information M1
And other subsequent respective operations are executed according to the data from HSSI High-Speed Serial Interface device 100.Or information-processing circuit
210 can according to the first configuration information M1 content and out of storage element 220 obtain write back read data, and will write back read data return
It is transmitted to HSSI High-Speed Serial Interface device 100.Base this, access the storage element 220 of another HSSI High-Speed Serial Interface device 200 data pass
Defeated task can be completed by HSSI High-Speed Serial Interface.It is noted that since the data of above-mentioned data transfer task are all logical
The control bit of first frame F1_1~F1_N is crossed to transmit, therefore HSSI High-Speed Serial Interface device 100 and another HSSI High-Speed Serial Interface fill
The mass data transmission of high-speed can be carried out by the first data sample of first frame F1_1~F1_N simultaneously by setting 200.
It is similar, it needs to access high speed serialization when HSSI High-Speed Serial Interface device 200 executes another data transfer task and connects
When mouthful device 100, the information-processing circuit 210 of HSSI High-Speed Serial Interface device 200 may be in response to data transfer task and generate the
Two configuration information M2.Specific embodiment is as previously mentioned, just no longer illustrate.
It is worth noting that, when the data transfer task that HSSI High-Speed Serial Interface device 100 is initiated is to read high speed serialization to connect
When data in the storage element 220 of mouthful device 200, HSSI High-Speed Serial Interface device 100 is returned in order to which back read data will be write, is believed
After ceasing first configuration information M1 of the parsing of processing circuit 210, corresponding number in storage element 220 can be read according to the result of parsing
According to.Then, information-processing circuit 210 generates the second configuration information M2, and the data to be read in the first configuration information M1 are passed
It send to high speed serial interface device 100.
Operation similar with coding circuit 130 and principle can be performed in coding circuit 250, is generated according to the second configuration information M2
Second coding configuration order X2.And interface transmitter 242 be intended to transmission data framework turn to second frame F2_1~F2_N after, will
Second coding configuration order X2 is embedded on the control bit of multiple second frame F2_1~F2_N, and can be embedded into second for multiple
Second frame F2_1~F2_N of coding configuration order X2 is sent to HSSI High-Speed Serial Interface device 100.Furthermore, it is understood that high speed serialization
Interface circuit 140 can receive from another HSSI High-Speed Serial Interface device 200 and form multiple the second of multiple second frame F2_1~F2_N
Data sample.Then, decoding circuit 150 can obtain the control bit of each second data sample by high-speed serial interface circuit 140
And the second coding configuration order X2 is obtained, and decoding processing is carried out to the second coding configuration order X2 and extracts second with confidence
Cease M2.Information-processing circuit 110 can correspond to according to the second configuration information M2 and execute operation.
In conclusion working as the storage element 220 of the HSSI High-Speed Serial Interface device 200 to be read of HSSI High-Speed Serial Interface device 100
Data when, can be intended to read data the first configuration information M1 be sent to HSSI High-Speed Serial Interface device 200 through the above way.
After HSSI High-Speed Serial Interface device 200 receives the first configuration information M1, corresponding reading data first are read to storage element 220,
And the second configuration information M2 for reading data with this is sent back into HSSI High-Speed Serial Interface device 100, to complete to read data
Task.It is written when HSSI High-Speed Serial Interface device 100 is intended to data will be written to the storage element 220 of high speed serial interface device 200
When, the first configuration information M1 with write-in data can be sent to HSSI High-Speed Serial Interface device 200 through the above way.At a high speed
After serial interface device 200 receives and restores the first configuration information M1, the program for executing write-in can be corresponded to.
By taking HSSI High-Speed Serial Interface agreement is JESD204b agreement as an example, high-speed serial interface circuit 140,240 includes
Transport layer (transport layer) circuit, physical layer (Physical layer) circuit and the link of JESD204b agreement
Circuit needed for layer (Link layer) circuit etc. can specifically execute JESD204b agreement.
First coding configuration order is embedded in the example among first frame/second frame by following further clarification.With high speed
Serial interface protocol is for JESD204b agreement, mapped data to be sent is corresponding to multiple the 8 of a transmission channel
Bit byte (octets), and multiple octets form frame (a first frame F1_1~F1_N and the second frame F2_ i.e. shown in FIG. 1
1~F2_N).In addition, a frame may include an at least data sample (i.e. composition first frame F1_1~F1_N and the second frame F2_1~
The first data sample and the second data sample of F2_N), and each data sample can carry 1 to 3 control bit.It should be noted
It is the quantity of the total bit of single data sample, control bit in single data sample, the number with the data sample in single frame
Amount can be adjusted according to actual demand, and the present invention is not intended to limit this.
Fig. 2 is the schematic diagram of a frame depicted in an embodiment according to the present invention.Example referring to figure 2., frame F1
It can be made of 13 octets.In addition, frame F1 may include multiple data sample S1~S8, and each data sample S1~S8 can
Carry 1 control bit and 12 sample bits.That is, the total bit of each data sample S1~S8 is 13, and frame F1 can
With 8 control bit CS.This 8 control bit CS can be used to transmit coding configuration order of the invention and (encode first with confidence
The the first coding configuration order X1 and the second coding configuration order X2 for ceasing M1 and the second configuration information M2 and generating).It is known that
, in the example of Fig. 2, when the digit for encoding configuration order is greater than 8, coding configuration order needs to pass by multiple frames
It is defeated.
In the example of Fig. 2, the control bit CS centralized configuration of data sample S1~S8 is in the ending of frame F1, but the present invention is simultaneously
It is not limited to this.In other embodiments, the control bit of data sample S1~S8 can centralized configuration in the beginning of frame F1, or beat
Dissipate the tail end for being configured at each data sample S1~S8.However, the transport layer standard of JESD204B agreement gives very flexibly
Frame format, Fig. 2 is only exemplary illustrated is not intended to limit the invention.
The example further explained below for encoding the first configuration information and generating the first configuration-direct.Fig. 3 is according to this hair
The schematic diagram of first coding configuration order depicted in a bright embodiment.Referring to figure 3., the first coding configuration order cmd1 is
A kind of example of first coding configuration order X1 shown in FIG. 1, the first coding configuration order cmd1 includes leading character 31, start bit
32, operational order 33, destination address 34 and specific data 35.In an embodiment, when operational order 33 is reading order
When, the specific data 35 of the first coding configuration order cmd1 is to read serial number.When operational order 33 is write back data order, the
The specific data 35 of one coding configuration order cmd1 is to write back read data.When operational order 33 is writing commands, the first coding
The specific data 35 of configuration order cmd1 is write-in data.
In the example of Fig. 3, leading character 31 includes 28 leading character positions, and leading character position is all the first place value ' 1 '.Starting
Position is the second place value ' 0 ' for being different from the first place value ' 1 '.Operational order 33 includes 2 command bits, and destination address 34 includes
8 address bits.Specific data 35 includes 16 specific data positions.Based on above-mentioned configuration, when HSSI High-Speed Serial Interface device 100 transmits
Multiple first frame F1_1~F1_N with the first coding configuration order cmd1 are to HSSI High-Speed Serial Interface device 200, the first coding
Leading character 31, start bit 32, operational order 33, destination address 34 and specific data 35 in configuration order cmd1 can be according to
Sequence is received by HSSI High-Speed Serial Interface device 200.
Specifically, in an embodiment, in order to allow the receiving end for receiving the first coding configuration order cmd1 can
Identify the beginning of the first coding configuration order cmd1 and correct decoding, leading character 31 can by all first place values it is multiple before
Lead symbol byte at, start bit 32 can by all second place values an at least start byte at.Also, the quantity of leading character position will
Greater than the summation of the quantity of start bit, the quantity of operative position, the quantity of address bit and the quantity of specific data position.Such as Fig. 3
Shown in example, quantity, the quantity of operative position, the quantity of address bit and summation of quantity of specific data position of start bit etc.
In 27 positions (1+2+8+16=27), therefore the quantity of leading character position is configured and at least equal to 28 positions.However, Fig. 3 is only
Exemplary illustrated to be not intended to limit the invention, the present invention can not limit the number of leading character position and start bit.Life
Enabling the number of position, mesh address bit and specific data position can also be actual demand and configures.
It is further to note that the coding with operational order, destination address and specific data is matched in an embodiment
Setting order can transmit using N number of frame as the period.Using the first coding configuration order of the frame format of Fig. 2 and Fig. 3 as example, due to the
The data volume of one coding configuration order cmd1 is 55, and each frame is only capable of the data volume of transmission 8, therefore the first coding is matched
Order cmd1 needs are set to transmit by least seven frame as shown in Figure 2.
Fig. 4 A is the schematic diagram of the transmission of data depicted in an embodiment according to the present invention.A referring to figure 4., if high speed
The data transfer task that serial interface device 100 is initiated is when reading data from another HSSI High-Speed Serial Interface device 200, and first compiles
The operational order of code configuration order X1 is reading order.First is matched after first coding of the decoding of decoding circuit 230 configuration order X1
Confidence breath M1 is exported to information-processing circuit 210, wherein the first configuration information M1 includes reading order 41 and destination address
‘A'42.Therefore, information processing electricity 210 can obtain in storage element 220 according to reading order 41 and destination address ' A ' 42
Positioned at the data ' A ' of destination address ' A '.Later, it includes write back data order 43, destination address that information processing electricity 210 is exportable
' A ' 44, and write the second configuration information M2 of back read data ' A ' 45.Coding circuit 250 encodes the second configuration information M2 and generates
Second coding configuration order X2, and the second coding configuration order X2 is embedded in the control bit in multiple second frames, cause the
Two coding configuration order X2 can return to HSSI High-Speed Serial Interface device 100 by multiple second frames.In this way, high speed serialization
The information-processing circuit 120 of interface arrangement 100 can be obtained by receiving the second coding configuration order X2 from the second configuration information M2
It takes and writes back read data ' A ' 45.
Fig. 4 B is the schematic diagram of the transmission of data depicted in an embodiment according to the present invention.B referring to figure 4., if high speed
The data transfer task that serial interface device 100 is initiated is that data will be written to be transmitted to another HSSI High-Speed Serial Interface device 200, the
The operational order of one coding configuration order X1 is writing commands.Furthermore, first coding of the decoding of decoding circuit 230 configuration life
The first configuration information M1 is exported to information-processing circuit 210 after enabling X1, wherein the first configuration information M1 include writing commands 47,
Destination address ' B ' 48 and write-in data ' B ' 49.Therefore, information processing electricity 210 can be according to writing commands 47 and destination address
' B ' 48 and the storage space for destination address ' B ' of the write-in of data ' B ' 49 into storage element 220 will be written pointing out.
Based on above-mentioned, in response in different types of data transfer task, information-processing circuit 210 may be in response to receive
One configuration information M1 and the operation executed include: to write back read data from the first configuration information M1 acquisition, by the first configuration information M1
In write-in data storage to the storage element 220 of high speed serial interface device 200 among, or according to the first configuration information M1
In destination address from the storage element 220 of oneself acquisition write back read data.Based on identical principle, information-processing circuit 110
The operation that may be in response to receive the second configuration information M2 and execute includes: to write back read data from the second configuration information M2 acquisition,
Among the storage element 120 of the write-in data storage in the second configuration information M2 to high speed serial interface device 100, Huo Zheyi
Back read data is write from the storage element 120 of oneself acquisition according to the destination address in the second configuration information M2.
It is noted that task is written in the reading data task of either Fig. 4 A or the data of Fig. 4 B, data exist
Transmission process is by the way of one-way transmission, without using (Handshake) program of shaking hands for needing to return response.It borrows
The bandwidth availability ratio between two HSSI High-Speed Serial Interface devices 100,200 can be improved in this.
Fig. 5 A and Fig. 5 B is the flow chart of data transmission method depicted in an embodiment according to the present invention.The present embodiment
Data transmission method related implementation detail and relevant apparatus feature can be by above-mentioned each embodiment about Fig. 1 to Fig. 4 B
In narration, enough teachings, suggestion and embodiment are obtained, is not repeated here herein.
A referring to figure 5. generates the first configuration information in response to initiating data transfer task in step S501.In step
S502 carries out coded treatment to the first configuration information and generates the first coding configuration order.In step S503, it is based on high speed serialization
First coding configuration order is embedded among the control bit of multiple first data samples by interface protocol.In step S504, foundation
HSSI High-Speed Serial Interface agreement transmits multiple first frames composed by the first data sample to another HSSI High-Speed Serial Interface device, with logical
It crosses transmission the first coding configuration order and carries out data transmission task to another HSSI High-Speed Serial Interface device.
B referring to figure 5. is received from another HSSI High-Speed Serial Interface device in step S505 and is formed the multiple of multiple second frames
Second data sample.In step S506, obtained by the control bit that high-speed serial interface circuit obtains each second data sample
Second coding configuration order.In step S507, decoding processing is carried out to the second coding configuration order and extracts the second configuration information.
In step S508, operation is executed into data transfer task or to carry out another HSSI High-Speed Serial Interface device according to the second configuration information
Another data transfer task initiated.
In conclusion in an embodiment of the present invention, only being connect originally to carry out the high speed serialization of high speed data transfers
Mouth also can be used to execute the data transfer task being responsible for originally by another coffret, and the configuration of another coffret then can evidence
To omit.By omit configuration coffret to chip in, the pin number of chip can be reduced, and therefore reduce manufacturing cost with
Chip area.In addition to this, the number by the control bit of flexible configuration and position, the present invention can be adjusted accordingly on to carry out
The transmission rate of data transfer task is stated, the mass data that high-speed can be more carried out simultaneously by the data sample in frame is transmitted,
From the efficiency for improving interface transmission.
Although the present invention has been disclosed by way of example above, it is not intended to limit the present invention., any technical field
Middle tool usually intellectual, without departing from the spirit and scope of the present invention, when can make some changes and embellishment, thus it is of the invention
Protection scope should be defined by the scope of the appended claims.
Claims (19)
1. a kind of HSSI High-Speed Serial Interface device characterized by comprising
Information-processing circuit generates the first configuration information in response to data transfer task, and the data transfer task is to access
The storage element of another HSSI High-Speed Serial Interface device；
Coding circuit couples the information-processing circuit, carries out coded treatment to first configuration information and generates the first coding and match
Set order；And
High-speed serial interface circuit couples the coding circuit, is based on HSSI High-Speed Serial Interface agreement for the first coding configuration order
It is embedded among the control bit of multiple first data samples, and transmits multiple first frames composed by multiple first data sample
To another HSSI High-Speed Serial Interface device, by transmitting the first coding configuration order to another HSSI High-Speed Serial Interface device
And carry out the data transfer task.
2. HSSI High-Speed Serial Interface device according to claim 1, which is characterized in that wherein, the first coding configuration order
Including leading character, start bit, operational order, destination address and specific data.
3. HSSI High-Speed Serial Interface device according to claim 2, which is characterized in that when the operational order is reading order
When, the specific data of the first coding configuration order is to read serial number；When the operational order is write back data order, this
The specific data of one coding configuration order is to write back read data；And when the operational order is writing commands, first volume
The specific data of code configuration order is write-in data.
4. HSSI High-Speed Serial Interface device according to claim 2, which is characterized in that wherein, before which includes multiple
Lead symbol position, each multiple leading character position is the first place value, which is the second place value, and first place value be different from this
Two place values.
5. HSSI High-Speed Serial Interface device according to claim 4, which is characterized in that wherein, which includes multiple
Command bit, the destination address include more address bits, which includes multiple specific data positions, multiple leading character position
Quantity is greater than the quantity of the start bit, the quantity of the operative position, the quantity of the address bit and the quantity of the specific data position
Summation.
6. HSSI High-Speed Serial Interface device according to claim 1, which is characterized in that the high-speed serial interface circuit is another from this
One HSSI High-Speed Serial Interface device receives multiple second data samples for forming multiple second frames, and the HSSI High-Speed Serial Interface device is more
Include:
Decoding circuit is coupled between the information process unit and the high-speed serial interface circuit, passes through the HSSI High-Speed Serial Interface
Circuit obtains the control bit of each multiple second data sample and obtains the second coding configuration order, and configures to second coding
Order carries out decoding processing and extracts the second configuration information,
Wherein the information-processing circuit executes operation according to second configuration information to carry out HSSI High-Speed Serial Interface device initiation
The data transfer task or carry out another data transfer task that another HSSI High-Speed Serial Interface device is initiated.
7. HSSI High-Speed Serial Interface device according to claim 6, which is characterized in that wherein, the operation include from this second
Configuration information obtains first and writes back read data, will be written among data storage to the storage element of the HSSI High-Speed Serial Interface device,
Or one second is obtained from the storage element of the HSSI High-Speed Serial Interface device according to the destination address in second configuration information
Write back read data.
8. HSSI High-Speed Serial Interface device according to claim 6, which is characterized in that wherein, if the data transfer task is
Write-in data are transmitted to another HSSI High-Speed Serial Interface device, the operational order of the first coding configuration order is write-in life
It enables,
If wherein the data transfer task is from another HSSI High-Speed Serial Interface device for reading data, the first coding configuration life
The operational order of order is reading order, and the operational order of the second coding configuration order is write back data order, and the operation is
Back read data is write from second configuration information acquisition.
9. HSSI High-Speed Serial Interface device according to claim 6, which is characterized in that wherein, the high-speed serial interface circuit
Including an interface transmitter and an interface receiver, which couples the coding circuit, and the interface receiver couples
The decoding circuit.
10. HSSI High-Speed Serial Interface device according to claim 1, which is characterized in that wherein, the HSSI High-Speed Serial Interface agreement
Including JESD204b agreement.
11. a kind of data transmission method based on HSSI High-Speed Serial Interface, which is characterized in that the described method includes:
The first configuration information is generated in response to data transfer task, which connects to access another high speed serialization
The storage element of mouth device；
Coded treatment is carried out to first configuration information and generates the first coding configuration order；
Based on HSSI High-Speed Serial Interface agreement, by the first coding configuration order be embedded in multiple first data samples control bit it
In；And
It is another high to this that multiple first frames composed by multiple first data sample are transmitted according to the HSSI High-Speed Serial Interface agreement
Fast serial interface device, to carry out the number by transmitting the first coding configuration order to another HSSI High-Speed Serial Interface device
According to transformation task.
12. the data transmission method according to claim 11 based on HSSI High-Speed Serial Interface, which is characterized in that wherein, the
One coding configuration order includes leading character, start bit, operational order, destination address and specific data.
13. the data transmission method according to claim 12 based on HSSI High-Speed Serial Interface, which is characterized in that wherein, when
When the operational order is reading order, which is to read serial number；When the operational order is write back data order, the spy
Fixed number evidence is to write back read data；And when the operational order is writing commands, which is write-in data.
14. the data transmission method according to claim 12 based on HSSI High-Speed Serial Interface, which is characterized in that wherein, should
Leading character includes multiple leading character positions, and each multiple leading character position is the first place value, which is the second place value, and this
One place value is different from second place value.
15. the data transmission method according to claim 14 based on HSSI High-Speed Serial Interface, which is characterized in that wherein, should
Operational order includes multiple command bits, which includes more address bits, which includes multiple specific data positions,
The quantity of multiple leading character position is greater than quantity, the quantity of the operative position, the quantity of the address bit and spy of the start bit
Determine the summation of the quantity of data bit.
16. the data transmission method according to claim 12 based on HSSI High-Speed Serial Interface, which is characterized in that the method
It further includes:
Multiple second data samples for forming multiple second frames are received from another HSSI High-Speed Serial Interface device；
The configuration of the second coding is obtained by the control bit that the high-speed serial interface circuit obtains each multiple second data sample
Order；And
Decoding processing is carried out to the second coding configuration order and extracts the second configuration information；And
According to second configuration information execute operation with carry out the HSSI High-Speed Serial Interface device initiation the data transfer task or
Carry out another data transfer task that another HSSI High-Speed Serial Interface device is initiated.
17. the data transmission method according to claim 16 based on HSSI High-Speed Serial Interface, which is characterized in that wherein, should
Operation includes obtaining first from second configuration information write back read data, data storage will be written to the HSSI High-Speed Serial Interface device
Storage element among, or according to the destination address in second configuration information from the storage of the HSSI High-Speed Serial Interface device
Unit obtains second and writes back read data.
18. the data transmission method according to claim 16 based on HSSI High-Speed Serial Interface, which is characterized in that wherein, if
When the data transfer task is transmitted to another HSSI High-Speed Serial Interface device for data will be written, the first coding configuration order
Operational order is writing commands,
If wherein the data transfer task is from another HSSI High-Speed Serial Interface device for reading data, the first coding configuration life
The operational order of order is reading order, and the operational order of the second coding configuration order is write back data order, and the operation is
Back read data is write from second configuration information acquisition.
19. the data transmission method according to claim 11 based on HSSI High-Speed Serial Interface, which is characterized in that wherein, should
HSSI High-Speed Serial Interface agreement includes JESD204b agreement.
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| TWI828221B (en) * | 2022-07-04 | 2024-01-01 | 新唐科技股份有限公司 | Controller and data conversion method for lighting system |
| CN118093494A (en) * | 2024-04-25 | 2024-05-28 | 上海安其威微电子科技有限公司 | Serial digital interface, beam control chip and data transmission method |
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