CN109194435A

CN109194435A - A kind of method avoiding digital synchronous network clock cyclization, system and terminal

Info

Publication number: CN109194435A
Application number: CN201811041992.7A
Authority: CN
Inventors: 邱喜红
Original assignee: Raisecom Technology Co Ltd
Current assignee: Raisecom Technology Co Ltd
Priority date: 2018-09-07
Filing date: 2018-09-07
Publication date: 2019-01-11
Anticipated expiration: 2038-09-07
Also published as: CN109194435B

Abstract

The invention discloses a kind of method for avoiding digital synchronous network clock cyclization, system and terminal, method includes: to receive the clock mark for the clock source ID type that adjacent network element is sent from corresponding line by each line clock source or there are the clock of the MAC Address type of corresponding relationship marks with clock source ID；For each line clock source, clock, which identifies, based on the received determines whether line clock source can be used: clock identity type determines whether the clock source ID that adjacent network element is transmitted, comparison clock source ID and preconfigured all clock source ID one show whether determining line clock source can be used based on the received；Select a clock source as currently used clock source from available clock source；Control each line clock source identified to adjacent network element tranmitting data register by corresponding line, the clock of clock quality grade and currently used clock source.The present invention, which flexibly realizes, prevents clock cyclic.

Description

A kind of method avoiding digital synchronous network clock cyclization, system and terminal

Technical field

The present invention relates to Clock Synchronization Technology, espespecially a kind of method for avoiding digital synchronous network clock cyclization, system and end End.

Background technique

Digital synchronization network technology is widely used, and frequency difference floats with excessive if it exists between network element on digital synchronization network It can cause sliding frame and slip.In order to ensure the transmission of reliable data, Frequency Synchronization between each network element is needed on digital synchronization network, with Avoid corrupt data.

In order to ensure network element frequency accurate synchronization each in digital synchronous network, need all network elements at least can be from Liang Tiaolu Diameter obtains synchronous refernce clocks, and when primary link disconnects, the whole network can be switched to standby link, to play the role of protection.Number The timing base of synchronous net is mutually to transmit to carry out by the digital synchronous network element clock of a large amount of lower grades, to make each net Member can automatically track the highest clock source of quality, be directed to ethernet clock source at present, and using ITU-T, G.8264 standard is provided In ESMC (Ethernet Synchronization Messaging Channel, Ethernet synchronizing information channel) message Carrying SSM (Synchronization Status Message, Synchronization Status Message) sends the mode of ESMC message to transmit Clock quality (specific message format is with reference to G.8264).Wherein, the value range of network element clock quality grade is shown in Table 1, wherein QL_ DNU indicates that the clock cannot be elected to be synchronous refernce clocks by network element, when the clock source on network element reversely sends SSM, so that it may Inform that opposite end network element would not consider to receive matter in this way when opposite end network element selects clock source using credit rating QL_DNU The clock source that grade is QL_DNU is measured, to avoid the generation of clock cyclization.

Table 1

But it is directed to more complex networking, when not can avoid using only the method that above-mentioned reversed transmission credit rating is QL_DNU Clock cyclization, the network of ring structure as shown in Figure 1.In the loop network, main BITS (Building under normal circumstances Integrated Timing Supply System, Communication Building timing composite supply system) join for the synchronised clock of entire looped network Examine source, arrow institute's label direction is the direction of clock transmitting in figure, and SSM transmits counterclockwise, final A network element will receive from The SSM information that C network element passes over, this SSM information are that A network element is sent in fact.When main BITS failure, such as Fig. 2, A network element The clock of C network element can be still tracked, but the clock of C network element is still using main BITS as the clock of synchronised clock reference source at this time. Clock cyclization has been eventually led in this way, and the clock of standby BITS is not used as the synchronised clock reference source of looped network.

Clock cyclization makes the timing loop between the network element of part, causes entire digital synchronous network that can not normally realize each network element Between synchronization, not can guarantee the normal work of each network element in digital synchronous network, this digital synchronous network higher for performance requirement For do not allow.

At present solution ethernet clock cyclization method there are mainly two types of:

The first is that clock source ID is used to transmit with the SSM in ESMC message as the method for solving clock cyclization, I.e. manually to timing reference input distribution clock mark (clock source ID), but the method has the following shortcomings:

1) clock source ID and SSM is transmitted together in ESMC message, clock source ID high 4bits, SSM low 4bits, and two Item collectively constitutes a byte, and the value of such clock source ID is 0-15, defines the number of devices of networking；

It 2) can only be with the device intercommunicating that uses same approach.

Second is that the MAC Address of network element is used to transmit with ESMC as the method for solving clock cyclization, but the party Method has the following disadvantages:

1) source MAC because the MAC Address of network element to be placed on to the position of the source MAC of ESMC message, in message It is modified, so will affect the correct study of MAC Address.

It 2) can only be with the device intercommunicating that uses same approach.

Summary of the invention

In order to solve the above-mentioned technical problems, the present invention provides a kind of method for avoiding digital synchronous network clock cyclization, it is System and terminal, the present invention will use clock source ID to avoid clock cyclization and avoid clock cyclization from combining using MAC Address, flexibly Realize the purpose for preventing clock cyclization.

In order to reach the object of the invention, the present invention provides a kind of method for avoiding clock cyclization in digital synchronous network, institutes The method of stating includes:

By each line clock source from corresponding line receive clock source identity ID type that adjacent network element is sent when Clock mark is identified with the clock source ID clock for intervening control MAC Address type there are the media of corresponding relationship；

For each line clock source, is identified according to the received clock of line clock source institute, determine the line clock Whether source can be used, comprising: according to the line clock source received clock identity type determine clock that adjacent network element transmitted Source ID, compares clock source ID and whether all clock source ID preconfigured on this network element are consistent, to determine the line clock Whether source can be used；

Select a clock source as currently used clock source from available clock source, wherein the available clock source is Clock source on this network element in addition to not available line clock source；

Each line clock source is controlled to be identified to adjacent network element tranmitting data register by corresponding line, clock quality grade and worked as The clock of the preceding clock source used, wherein clock transmitted by each line clock source mark according to the line clock source whether be Currently used clock source, if not when currently used clock source and the line clock source clock source ID configuring condition, and The clock identity type that the line clock source is sent to adjacent network element determines.

As an implementation, the method also includes:

The clock identity type sent to adjacent network element is configured for each line clock source of this network element.

As an implementation, the method also includes:

It include MAC Address when any route clock source for this network element is configured to the clock identity type that adjacent network element is sent When, also configure the mapping relations of the clock source ID and MAC Address in the digital synchronous network；

The mapping relations of the clock source ID and MAC Address include:

The corresponding MAC Address of clock source ID is the MAC Address of network element where the clock source of clock source ID mark.

As an implementation, the method also includes:

The clock quality grade that adjacent network element is sent is received from corresponding line by each line clock source.

As an implementation, the method also includes:

The clock mark received if it exists or the changed line clock source of clock quality grade, when further according to route The received clock mark in clock source, determines whether the line clock source can be used.

As an implementation, described that adjacent network element is determined according to the received clock identity type of line clock source institute The clock source ID transmitted, compares clock source ID and whether all clock source ID preconfigured on this network element are consistent, with true Whether the fixed line clock source can be used, comprising:

If the clock identity type that the line clock source receives is clock source ID, by the clock source ID received and this All clock source ID configured on network element compare, if there is unanimous circumstances, it is determined that the line clock source is unavailable；

If the clock identity type that the line clock source receives is MAC Address, according to the clock source ID and MAC The corresponding clock source ID of location mapping relationship searching, all clock source ID ratios that will be configured on the clock source ID found and this network element Compared with if there is unanimous circumstances, it is determined that the line clock source is unavailable.

As an implementation, described to select a clock source as currently used clock from available clock source Source, comprising:

Select a clock source as currently used clock from available clock source by clock credit rating and priority Source, comprising:

The highest clock source of clock quality grade is selected, when only one can be used clock source to have highest clock quality etc. When grade, using the clock source as currently used clock source；When there are multiple available clock sources to have highest clock quality etc. When grade, therefrom select an available clock source of highest priority as currently used clock source；

Or

Only select a clock source as currently used clock source, packet from available clock source by clock credit rating It includes:

The highest clock source of clock quality grade is selected, when only one can be used clock source to have highest clock quality etc. When grade, using the clock source as currently used clock source；When there are multiple available clock sources to have highest clock quality etc. When grade, therefrom select an available clock source as currently used clock source in a random way.

As an implementation, each line clock source of control passes through corresponding line to adjacent network element tranmitting data register mark Know, comprising:

When line clock source is not currently used clock source:

If the line clock source and currently used clock source are all configured with or all without configurable clock generator source ID, should The clock mark that line clock source is sent by corresponding line to adjacent network element are as follows: the clock that currently used clock source receives The corresponding clock source ID of the MAC Address that source ID or currently used clock source receive；Alternatively, currently used clock source receives To the corresponding MAC Address of clock source ID that receives of MAC Address or currently used clock source；

If only one in the line clock source and currently used clock source is configured with clock source ID, when the route The clock mark that Zhong Yuan is sent by corresponding line to adjacent network element are as follows: the clock source ID of configuration；Alternatively, the clock source ID of configuration Corresponding MAC Address.

When line clock source is currently used clock source:

The clock identity type sent to adjacent network element if it is line clock source configuration is clock source ID, the line The clock mark that road clock source is sent to adjacent network element are as follows: for identifying the not available clock source ID of clock sent；

The clock identity type sent to adjacent network element if it is line clock source configuration is MAC Address, the line The clock mark that clockwise adjacent net member is sent when road are as follows: the MAC Address or the line clock source that the line clock source receives connect The corresponding MAC Address of clock source ID received.

Each line clock source is controlled to carry clock mark in the ESMC message of Ethernet synchronizing information channel to adjacent net Member is sent, comprising:

Each line clock source is controlled to carry clock mark in the type lengths values TLV field of ESMC message to adjacent net Member is sent.

As an implementation, described that clock mark is carried into the type lengths values TLV field in ESMC message, packet It includes:

When the clock identity type that the line clock source of configuration is sent to adjacent network element is clock source ID, in TLV field Minimum 1 byte of value field store clock source ID, other 5 bytes are 0；When the line clock source of configuration is to phase When the clock identity type that adjacent network element is sent is MAC Address, 6 bytes of the value field in TLV field are for storing MAC Address.

As an implementation, described that the clock that adjacent network element is sent is received from corresponding line by each line clock source Mark, comprising:

The ESMC message comprising clock mark that parsing is received by each line clock source from corresponding line；

If parsing TLV field from the ESMC message is 0, the clock that line clock source receives is identified as 0；If Parsing TLV field from the ESMC message is not 0, and high 5 byte is 0, then the clock mark that line clock source receives Type is clock source ID；If parsing TLV field from the ESMC message is not 0, and high 5 byte is not 0, then line clock The clock identity type that source receives is the MAC Address in TLV field.

As an implementation, in master-slave synchronisation net, the clock Source Type for being configured clock source ID includes:

External clock reference；

It include the internal clock source on the network element of external clock reference；

The corresponding line clock source of all route mouths of one of ring is connected on the public network element of two rings；

The route of ring line clock source corresponding with all route mouths of connection ring on the public network element of chain or connection chain The corresponding line clock source of mouth.

The present invention also provides a kind of system for avoiding clock cyclization in digital synchronous network, the system comprises:

Clock source information receiving module, for by each line clock source receive that adjacent network element sends from corresponding line when The clock of clock source identity ID type identifies or there are the media of corresponding relationship to intervene with controlling MAC with the clock source ID The clock of location type identifies；

Clock source determining module can be used, for for each line clock source, institute to be received according to the line clock source Clock mark, determines whether the line clock source can be used, comprising: true according to the received clock identity type of line clock source institute Whether the clock source ID that fixed adjacent network element is transmitted compares clock source ID and preconfigured all clock source ID on this network element Unanimously, to determine whether the line clock source can be used；Selected from available clock source a clock source as it is currently used when Zhong Yuan, wherein the available clock source is the clock source on this network element in addition to not available line clock source

Clock source information sending module passes through corresponding line to adjacent network element tranmitting data register for controlling each line clock source The clock of mark, clock quality grade and currently used clock source, wherein clock mark transmitted by each line clock source Whether know according to the line clock source is currently used clock source, if not when currently used clock source and the line clock source Clock source ID configuring condition and the clock identity type that is sent to adjacent network element of the line clock source determine.

As an implementation, the system also includes:

Configuration module configures the clock identity type sent to adjacent network element for each line clock source for this network element.

As an implementation, the configuration module, be also used to when for this network element any route clock source configure to When the clock identity type that adjacent network element is sent includes MAC Address, the clock source ID and MAC in the digital synchronous network are also configured The mapping relations of address；When the mapping relations of the clock source ID and MAC Address include: that the corresponding MAC Address of clock source ID is The MAC Address of network element where the clock source of clock source ID mark.

As an implementation, the clock source information receiving module is also used to through each line clock source from correspondence The clock quality grade that the adjacent network element of line receiver is sent；

Clock source determining module can be used, is also used to judging there is the clock mark received or clock quality grade hair When the line clock source for changing, is identified further according to the received clock in line clock source, determine whether the line clock source can be used.

As an implementation, described to use clock source determining module, for received according to line clock source institute Clock identity type determines the clock source ID that adjacent network element is transmitted, and compares preconfigured institute on clock source ID and this network element Have whether clock source ID is consistent, to determine whether the line clock source can be used, comprising:

As an implementation, described to use clock source determining module, when for selecting one from available clock source Zhong Yuan is as currently used clock source, comprising:

Or

As an implementation, the clock source information sending module passes through correspondence for controlling each line clock source Route is identified to adjacent network element tranmitting data register, comprising:

When line clock source is not currently used clock source:

When line clock source is currently used clock source:

As an implementation, the clock source information sending module, for carrying clock mark in ESMC message Type lengths values TLV field, comprising:

As an implementation, the clock source information receiving module, for passing through each line clock source from corresponding line Road receives the clock mark that adjacent network element is sent, comprising:

As an implementation, it is configured the clock Source Type packet of clock source ID in master-slave synchronisation net, on this network element It includes:

External clock reference；

The present invention also provides a kind of terminals for avoiding clock cyclization in digital synchronous network, comprising:

Memory, for storing instruction；

Processor realizes the method for avoiding clock cyclization in digital synchronous network as described above for executing described instruction.

The present invention also provides a kind of computer readable storage medium, the media storage has computer executable instructions, The side for avoiding clock cyclization in digital synchronous network as described above is realized when the computer executable instructions are executed by processor Method

Compared with prior art, the present invention receives the clock that adjacent network element is sent from corresponding line by each line clock source The clock of source identity ID type identifies or there are the media of corresponding relationship to intervene control MAC Address with the clock source ID The clock of type identifies；For each line clock source, is identified according to the received clock of line clock source institute, determine the line Whether road clock source can be used, comprising: determine that adjacent network element is transmitted according to the received clock identity type of line clock source institute Clock source ID, compare clock source ID and whether all clock source ID preconfigured on this network element consistent, with determine the line Whether road clock source can be used；Select a clock source as currently used clock source from available clock source, wherein described can With the clock source that clock source is on this network element in addition to not available line clock source；It controls each line clock source and passes through corresponding line The clock of the adjacent network element tranmitting data register mark of road direction, clock quality grade and currently used clock source, wherein each route Whether the mark of clock transmitted by clock source according to the line clock source is currently used clock source, if not when it is currently used The clock mark that the clock source ID configuring condition and the line clock source in clock source and the line clock source are sent to adjacent network element Know type to determine.The present invention will use clock source ID to avoid clock cyclization and avoid clock cyclization from combining using MAC Address, spirit Work realizes the purpose for preventing clock cyclization.

Other features and advantages of the present invention will be illustrated in the following description, also, partly becomes from specification It obtains it is clear that understand through the implementation of the invention.The objectives and other advantages of the invention can be by specification, right Specifically noted structure is achieved and obtained in claim and attached drawing.

Detailed description of the invention

Attached drawing is used to provide to further understand technical solution of the present invention, and constitutes part of specification, with this The embodiment of application technical solution for explaining the present invention together, does not constitute the limitation to technical solution of the present invention.

Fig. 1 is loop network schematic diagram；

Fig. 2 is master clock failure schematic diagram in loop network；

Fig. 3 is the method flow diagram provided in an embodiment of the present invention for avoiding clock cyclization in digital synchronous network；

Fig. 4 is the digital synchronous network schematic diagram under monocycle networking mode；

Fig. 5 is the digital synchronous network schematic diagram under annulus chain networking mode；

Fig. 6 is the digital synchronous network schematic diagram under tangent rings networking mode；

Fig. 7 is the method flow diagram that route clock source is identified to adjacent network element tranmitting data register in the embodiment of the present invention；

Fig. 8 is that route clock source is identified from the clock that corresponding line receives the line clock source in the embodiment of the present invention Method flow diagram；

Fig. 9~11 are the schematic diagram that the present invention realizes rearranging main/slave clock using each network element in digital synchronous network in example；

Figure 12 is the system comprising modules figure provided in an embodiment of the present invention for avoiding number cyclization in digital synchronous network.

Specific embodiment

To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing to the present invention Embodiment be described in detail.It should be noted that in the absence of conflict, in the embodiment and embodiment in the application Feature can mutual any combination.

Step shown in the flowchart of the accompanying drawings can be in a computer system such as a set of computer executable instructions It executes.Also, although logical order is shown in flow charts, and it in some cases, can be to be different from herein suitable Sequence executes shown or described step.

For the network element in digital synchronous network, clock Source Type includes:

Internal clock source refers to local crystal oscillator；

External clock reference refers to the clock source provided by other equipment (such as main BITS, standby BITS) accessed outside ring, can make For the synchronised clock reference source of looped network；

Line clock source, i.e., from line receiver between digital synchronous network element to clock source, which is referred to as the route The corresponding route of clock source.For example, network element A is the line clock source of network element B, the line clock to the clock that network element B is transmitted Connection line of the corresponding route in source between network element A and network element B.

For example, it is synchronized in planar network architecture in above-mentioned annular shown in fig. 1:

The clock source of network element A includes: external clock reference (main BITS), east orientation line clock source, west to line clock source, interior Portion's clock source；

The clock source of network element B includes: east orientation line clock source, west to line clock source, internal clock source；

The clock source of network element C includes: external clock reference (standby BITS), east orientation line clock source, west to line clock source, interior Portion's clock source.

The embodiment of the invention provides a kind of methods for avoiding clock cyclization in digital synchronous network, are applicable to by multiple nets The chain of member composition, annular (monocycle or tangent rings), annulus chain digital synchronous network, and part in the digital synchronous network Network element can access for providing the external clock synchronizer of external clock reference, such as in a kind of principal and subordinate's digital synchronous network, In the external main BITS of a network element, the external standby BITS of another network element.It is provided in an embodiment of the present invention to avoid digital synchronous network The method of middle clock cyclization can be executed by the network element in digital synchronous network.As shown in Figure 3, which comprises

S301 receives the clock source identity ID type that adjacent network element is sent from corresponding line by each line clock source Clock mark or with the clock source ID there are the media of corresponding relationship intervene control MAC Address type clock mark；

As an implementation, can also receive that adjacent network element sends from corresponding line by each line clock source when Clock credit rating；

The clock mark and clock quality grade can carry in ESMC message；

The clock identity type which kind of one clock source uses be sent out, can be by network administrator previously according to network element Performance and networking topological arrangement；

Corresponding relationship between clock source ID and MAC Address can be stored in network elements in the form of mapping table, should The configuration content of mapping table be it is global, be not based on some specific clock source and network element MAC Address, mapping table In include clock source ID can be the clock source ID of all configurations in digital synchronous network, can also be only all may be line The clock source ID that road clock source is issued to adjacent network element.For different clock sources, the clock source ID of configuration is not phase With, but the same MAC Address can be corresponded to.As an implementation, the corresponding MAC Address of clock source ID is clock source The MAC Address of network element where the clock source of ID mark.

S302 identifies according to the received clock of line clock source institute for each line clock source, determines the route Whether clock source can be used, comprising: according to received clock identity type determine clock source ID that adjacent network element transmitted, compare Whether clock source ID and all clock source ID preconfigured on this network element are consistent, to determine that the line clock source whether may be used With；

As another embodiment, it is identified according to the received clock of line clock source institute, determines the line clock source Whether can be used, comprising: according to the line clock source received clock identity type determine clock source that adjacent network element transmitted ID compares clock source ID and matches in advance on this network element when the clock that the adjacent network element of clock source ID mark is sent is available Whether whether all clock source ID set are consistent, can be used with the determination line clock source；

As another embodiment, if step S302 can be to judge that there are clock mark or clock quality grade hairs Behind the line clock source for changing, is identified further according to the received clock in line clock source, determine whether the line clock source can be used.

Each line clock source can receive ESMC message and clock from corresponding line in real time.For therein any one For a line clock source, the clock received is the clock in this line clock source, in addition often receives an ESMC message Afterwards, it can extract the clock mark in message or clock identifies and clock quality grade, be recorded as line clock source reception The clock mark or clock mark and clock quality grade arrived.The clock mark that the line clock source recorded before receives, Or clock identifies and clock quality grade is set to history failure logging (record), or only saves the last and this record be somebody's turn to do The clock mark or clock mark and clock quality grade that line clock source receives.Line clock is judged according to the record Whether the clock mark or clock quality grade that source receives change.

In one embodiment, it is identified according to the received clock of line clock source institute, whether determines the line clock source It can use, comprising:

Mode one should if the clock identity type that the line clock source is received from adjacent network element is clock source ID All clock source ID configured on clock source ID and this network element compare, if there is unanimous circumstances, it is determined that the line clock source It is unavailable；

If the clock identity type that the line clock source is received from adjacent network element is MAC Address, according to the clock The source ID and corresponding clock source ID of MAC Address mapping relationship searching, the institute that will be configured on the clock source ID found and this network element There is clock source ID to compare, if there is unanimous circumstances, it is determined that the line clock source is unavailable.

Mode two, if the clock identity type that the line clock source is received from adjacent network element is clock source ID and the clock The clock that the adjacent network element of source ID mark is sent is available, then all clocks that will be configured on the clock source ID received and this network element Source ID compares, if there is unanimous circumstances, it is determined that the line clock source is unavailable；

If the clock identity type that the line clock source receives is MAC Address, according to the clock source ID and MAC The corresponding clock source ID of location mapping relationship searching, when the clock that the adjacent network element of the clock source ID mark found is sent is available When, all clock source ID configured on the clock source ID found and this network element are compared, if there is unanimous circumstances, it is determined that The line clock source is unavailable.

If the clock mark that the line clock source is received from adjacent network element meets one of its following conditional, then determining should Line clock source is unavailable:

Clock for clock source ID and clock source ID mark transmission is unavailable；

For MAC Address and find corresponding clock source ID mark send clock it is unavailable.

S303 selects a clock source as currently used clock source from available clock source；

It is described can be with clock source on this network element except it is above-mentioned be determined as not available line clock source in addition to clock source；

It is in one embodiment, described to select a clock source as currently used clock source from available clock source, Include:

Or

If a satisfactory clock source does not all have, network element enters hold mode.

Illustratively, in master-slave synchronisation net, the clock quality grade highest of main BITS, the clock quality grade of standby BITS Take second place.Correspondingly, being connected on the network element of main BITS outside the corresponding master for the clock source of network element each in master-slave synchronisation net The clock quality grade highest of portion's clock source connects corresponding clock quality etc. for external clock reference on the network element of standby BITS Grade is taken second place.

S304 control each line clock source identified by corresponding line to adjacent network element tranmitting data register, clock quality grade with And the clock of currently used clock source, wherein the mark of clock transmitted by each line clock source is according to the line clock source No is currently used clock source, if not when currently used clock source and the line clock source clock source ID configuring condition, And the clock identity type that the line clock source is sent to adjacent network element determines；

As an implementation, it controls each line clock source and institute is periodically sent to adjacent network element by corresponding line The clock as currently used clock source is stated, and periodically sends and carries clock mark and clock quality grade ESMC message.

As an implementation, the line clock source on network element as currently used clock source is sent to adjacent network element Clock quality grade be DNU, the clock quality grade that other line clock sources are sent to adjacent network element for tranmitting data register when Clock credit rating receives the subsequent side that can be used in above-mentioned steps S102 of downstream network element of the ESMC message under the implementation Formula one determines whether each line clock source can be used.

As another embodiment, the clock quality grade that each line clock source is sent by ESMC message on network element is The line clock source corresponds to the clock quality grade of clock, and the downstream network element that the ESMC message is received under the implementation is subsequent The mode two in above-mentioned steps S102 can be used and determine whether each line clock source can be used.

In addition, to prevent clock cyclic, when the ESMC message of route clock source transmission is in addition to carrying in the embodiment of the present invention Except clock credit rating, clock mark can be also carried simultaneously.It is worth noting that, the clock mark carried in above-mentioned ESMC message Be not necessarily the clock of currently used clock source clock mark, and the clock identity type issued depend on the route when The clock identity type of Zhong Yuan configuration sent to adjacent network element is MAC Address or clock source ID, and optionally, the control is each Line clock source is identified to adjacent network element tranmitting data register, as shown in fig. 7, comprises:

When line clock source is not currently used clock source:

If the line clock source and currently used clock source are all configured with or all without configurable clock generator source ID, should The clock mark that line clock source is sent by corresponding line to adjacent network element are as follows: the clock that currently used clock source receives The corresponding clock source ID of the MAC Address that source ID or currently used clock source receive (the corresponding clock sent to adjacent network element Identity type is clock source ID)；Alternatively, MAC Address or currently used clock source that currently used clock source receives connect The corresponding MAC Address of clock source ID received (the corresponding clock identity type sent to adjacent network element is MAC Address)；

If only one in the line clock source and currently used clock source is configured with clock source ID, when the route The clock mark that Zhong Yuan is sent by corresponding line to adjacent network element are as follows: the clock source ID of configuration is (corresponding to send to adjacent network element Clock identity type be clock source ID)；Alternatively, the corresponding MAC Address of clock source ID of configuration is (corresponding to send to adjacent network element Clock identity type be MAC Address).

When line clock source is currently used clock source:

It as an implementation, can be when will be described when the embodiment of the present invention carries clock mark using ESMC message The filling field of the ESMC message is written in clock mark, comprising:

The length of clock mark in TLV field is 6 bytes, when the line clock source of configuration is sent to adjacent network element Clock when being identified as clock source ID, minimum 1 byte of the value field in TLV field stores clock source ID, other 5 A byte is 0；When the line clock source of configuration is identified as MAC Address to the clock that adjacent network element is sent, in TLV field 6 bytes of value field are for storing MAC Address.

Table 2

It is ESMC message format schematic diagram shown in above-mentioned table 2, wherein SSM information is carried in TLV field, the TLV word Section is present in the filling field of ESMC message, and after the 24th byte, specific format is shown in Table 3.

8bits	Type:0x01
		16bits	Length:00-04
4bits	0x0(unused)
		4bits	SSM code

Table 3

Clock identifies next TLV field after the TLV field of SSM information, when being such as filled with clock source ID, The format of TLV field is as shown in table 4:

8bit	Type:0a
		16bit	Length:00-09
40bit	0x0(unused)
		8bit	SrcID

Table 4

When being such as filled with MAC Address, the format of TLV field is as shown in table 5:

8bit	Type:0a
		16bit	Length:00-09
48bit	MAC Address

Table 5

Wherein, Type:0a indicates the information that the TLV field carries as clock mark, and Length:00-09 indicates the TLV word The byte length of section, SrcID indicate clock source ID, not available for the clock of unique identification transmission when sending to adjacent network element When clock source ID, clock source ID is the 0 of 6 bytes；When transmission be clock available clock source ID when, clock source ID is not It is 0.

Correspondingly, in one embodiment, in step S301, receiving adjacent net from corresponding line by each line clock source The clock mark that member is sent, comprising:

If parsing the TLV field for describing clock mark from the ESMC message is 0, which is connect The clock received is identified as 0；If parsing the TLV field for describing clock mark from the ESMC message is not 0, and high 5 bytes are 0, then the clock that the line clock source receives is identified as clock source ID；If parsing use from the ESMC message It is not 0 in describing the TLV field that clock identifies, and high 5 byte is not 0, then the clock that the line clock source receives is identified as MAC Address in the TLV field, as shown in Figure 8.

In other embodiments, the above method further include:

The clock identity type sent to adjacent network element is configured for each line clock source of this network element.When appointing for this network element One line clock source configure to adjacent network element send clock identity type include MAC Address when, also configure the digital synchronous The mapping relations of clock source ID and MAC Address in net.

All clock sources of network element can theoretically be set to needing to configure the clock source of clock source ID, when as target Zhong Yuan.But in practical group-network construction, the NE quantity of digital synchronous network is often huger, the clock needed to configure therewith Source ID also can be numerous, so not only heavy workload, be easy error, but also can to clock source ID digital synchronous network transfer tape The field bytes for carrying out in certain difficulty, such as ESMC message to be used to fill clock source ID are limited, and the coding pole of clock source ID has It may be beyond the range that the byte number can indicate.For this purpose, while preventing clock cyclization, it is contemplated that only selected section clock Source is as the clock source for needing to configure clock source ID.Such as, for principal and subordinate's digital synchronous network (such as digital synchronous shown in FIG. 1 Net), clock synchronization mode is: when main BITS is effective, the whole network network element is synchronized with main BITS；When main BITS failure, the whole network Network element is synchronized with standby BITS.In the master-slave synchronisation net, the clock source of clock source ID is needed to configure, it, can as target clock source Only include:

1) external clock reference；

2) include external clock reference network element on internal clock source；

3) the corresponding line clock source of all route mouths of one of ring is connected on the public network element of two rings；

4) line of ring line clock source corresponding with all route mouths of connection ring on the public network element of chain or connection chain The corresponding line clock source in crossing.

Digital synchronous network under monocycle networking mode as shown in Figure 4 can be main BITS mouthfuls of external clocks on network element A Standby BITS mouthfuls of external clock references on local crystal oscillator, network element C on source, network element A, the local crystal oscillator configurable clock generator source on network element C ID。

Digital synchronous network under annulus chain networking mode as shown in Figure 5, when can be external for main BITS mouthfuls on network element A Standby BITS mouthfuls of external clock references on local crystal oscillator, network element D on Zhong Yuan, network element A, the local crystal oscillator on network element D, ring and chain are total P1 mouth line road clock source configurable clock generator source ID on network element C.

Digital synchronous network under tangent rings networking mode as shown in FIG. 6, when can be external for main BITS mouthfuls on network element A Standby BITS mouthfuls of external clock references on local crystal oscillator, network element D on Zhong Yuan, network element A, the local crystal oscillator on network element D, two rings are total P2 mouth and P4 mouthfuls of (alternatively, P1 mouthfuls and P3 mouthfuls) line clock source configurable clock generator source ID on network element C.

The embodiment of the present invention is only to line clock source configurable clock generator source ID.

In the existing scheme for avoiding digital synchronous network clock cyclization, in the scheme using only clock source ID, due to limit The NE quantity of networking has been made, has not been suitable for large-scale networking in this way；Using only the scheme of MAC Address, because being put MAC Address position the reason of, occupy the significant field of protocol definition, cause exist influence MAC address learning lack It falls into, and both schemes are unable to intercommunication.The present invention program does not modify other in message using the reserved field in ESMC message Significant field will not introduce other defect in this way；Simultaneously using flexibly switching of combining of clock source ID and MAC Address Method breaches and the limitation of clock source ID bring networking quantity is used only in the existing scheme for avoiding digital synchronous network clock cyclization Defect, meet the requirement of large-scale network-estabilishing.In addition, the side for avoiding digital synchronous network clock cyclization that the embodiment of the present invention is recorded Case can be compatible be used alone reserved field in ESMC message prevent clock using clock source ID or using MAC Address The scheme of cyclization, realizes the intercommunication of two schemes.

Specifically above-described embodiment is illustrated using example with one below.

In this application example, digital synchronous network is the synchronization net of tangent rings.

For the method described in the embodiment of the present invention be further described.

Tangent rings network as shown in Figure 9, wherein main BITS access network element A, standby BITS access network element D, each network element clock (P1 (1) indicates that the clock priority of P1 mouth line road clock source is 1 as shown in Figure 9 for priority configuration；Main BITS (2,1, ID1) table The clock quality grade for showing main BITS external clock reference is 2, and clock priority 1, clock source ID is 1；A (B, 3, IDA) is indicated The local crystal oscillator credit rating of network element A is 0xB, and clock priority 3, clock source ID is 0xA；P1 (1, IDC) indicates P1 mouth line The clock priority of road clock source is 1, and clock source ID is 0xC；P3 (ID3) indicates that the clock source ID of P3 mouth line road clock source is 3； 12 indicate that the clock source ID sent is 1, and clock quality grade is 2；The MAC that the MAC Address that MACC2 expression is sent is network element C Location MACC, clock quality grade are 2；MACD4 indicates that the MAC Address sent is the MAC Address MACD of network element D, clock quality etc. Grade is 4.MACCF indicates MAC Address corresponding to the clock ID C sent be on network element C, and credit rating is F, and F is indicated DNU, that is, unavailable；C2 indicates that the ID of transmitting is C, and credit rating is 2 i.e. PRC.In order to preferably embodying clock source ID and MAC Two methods of the combination of location, it is assumed here that network element E only supports transmitting MAC Address, other network element A-D compatible clock source ID and MAC The clock identity type of both transmissions of address.

Concrete configuration is as follows:

Network element A: the clock quality grade of main BITS mouthfuls of external clock reference is 2, clock priority 1, and clock source ID is 1； The clock priority of P1 mouth line road clock source is 2；The credit rating of local crystal oscillator is 11, clock priority 3, and clock source ID is 0xA；

The clock priority of network element B:P1 mouth line road clock source is 1；

The clock priority of network element C:P1 mouth line road clock source is 1, and clock source ID is 0xC；P2 mouth line road clock source when Clock priority is 2；The clock source ID of P3 mouth line road clock source is 3；The clock mark that P4 mouth line road clock source is sent to adjacent network element Knowledge type is MAC Address；

The mapping table of configurable clock generator source ID and MAC Address: MACC pairs of MAC Address of clock source ID 0xC and network element C It answers；The MAC Address MACD of clock source ID 2 and network management D is corresponding；

Network element D: the clock quality grade of standby BITS mouthfuls of external clock references is 4, clock priority 2, and clock source ID is 2； The clock priority of P1 mouth line road clock source is 1, and the clock identity type sent to adjacent network element is MAC Address；Local crystal oscillator Clock quality grade be 11, clock priority 3, clock source ID be 0xD；

The clock priority of network element E:P1 mouth line road clock source is 1.

When initial, all network elements are synchronized with main BITS, and the SSM transmitted in whole net is the SSM2 of main BITS, and 2 indicate clock matter Measure grade PRC, the clock source ID that the clock mark of the timing reference input transmitted in the looped network of network element A, B and C composition is main BITS 1, the clock of timing reference input transmitted in the looped network of network element C, D and E composition is identified as P1 mouthfuls on network element C of clock source ID 0xC。

For network element A, although the clock SSM grade that network element B is passed over is very high, due to received clock mark Knowing is that clock source ID 1 is consistent with the clock source ID in the main source BITS of network element A, so P1 line clock source is not for network element A It is available.After main BITS failure, as Figure 10, network element A can choose internal clocking, while Transfer Quality grade is the SSM of 0xB, The clock of transmitting is identified as the clock source ID 0xA of network element A internal clocking；Network element C tranmitting data register mark according to above-described embodiment The rule of knowledge be sent out by P4 mouth line road clock source be P1 mouth line road clock source the corresponding network element C of clock source ID What the 1 mouth line road clock source of rule P of MAC Address MACC, network element the D tranmitting data register according to above-described embodiment mark was sent out The corresponding MAC Address MACC of clock source ID received for P1 mouth line road clock source.

When the SSM 0xB passes to the network element D to connect with standby BITS, at this point for network element D, when available clock source has outside Zhong Yuan, internal clock source, P1 line clock source, select source standard according to above-described embodiment, and network element D chooses external clock Source, and be sent out credit rating be 4 SSM, and transmit clock be identified as network element D standby BITS clock source ID 2 or when The corresponding MAC Address MACD of clock source ID 2；The rule of network element C tranmitting data register according to above-described embodiment mark passes through P3 mouth line Road clock source be sent out be the configuration of P3 mouth line road clock source clock source ID 3, the clock quality grade of transmission is standby BITS Clock quality class 4；

After network element A receives the clock source ID 3 and clock quality class 4 that network element C is sent, the clock mark that is received due to it Know and the clock mark of all configurations on network element A does not repeat, P1 line clock source is available for network element A, so Network element A tracks the clock source, that is, is synchronized with network element C, after entire synchronizing process settles out, it is found that the network element of whole net is same It walks in standby BITS, the normal reliable correctly realized between active and standby BITS is switched, and Figure 11 gives final stabilization result.

As shown in figure 12, the embodiment of the invention also provides a kind of system for avoiding number cyclization in digital synchronous network, institutes The system of stating includes:

Clock source information receiving module 1201 is sent for receiving adjacent network element from corresponding line by each line clock source Clock source identity ID type clock mark or with the clock source ID there are the media of corresponding relationship intervention control The clock of MAC Address type identifies；The clock identity type which kind of one clock source uses be sent out, can be by network management Member is previously according to network element performance and networking topological arrangement；

Clock source determining module 1202 can be used, for being connect according to the line clock source for each line clock source The clock of receipts identifies, and determines whether the line clock source can be used, comprising: identifies class according to the received clock of line clock source institute Type determines the clock source ID that adjacent network element is transmitted, when the clock that the adjacent network element of clock source ID mark is sent is available, than It is whether consistent compared with clock source ID and all clock source ID preconfigured on this network element, with the determination line clock source whether It can use；Select a clock source as currently used clock source from available clock source；Described can be this network element with clock source On except it is above-mentioned be determined as not available line clock source in addition to clock source；

As another embodiment, clock source determining module 1202 can be used, for for each line clock source, root According to the received clock mark of line clock source institute, determine whether the line clock source can be used, comprising: according to the line clock source Received clock identity type determine the clock source ID that adjacent network element is transmitted, when the clock source ID mark adjacent network element pass When the clock passed is available, compares clock source ID and whether all clock source ID preconfigured on this network element are consistent, with determination Whether the line clock source can be used.

As an implementation, clock source information receiving module 1201 is also used to through each line clock source from correspondence The clock quality grade that the adjacent network element of line receiver is sent；The clock mark and clock quality grade can be carried and be reported in ESMC Wen Zhong.Clock source determining module 1202 can be used, is also used to judging there is the clock mark or clock quality grade received When changed line clock source, is identified further according to the received clock in line clock source, determine that the line clock source whether may be used With.

In one embodiment, clock source determining module 1202 can be used, for true according to the received clock identity type of institute Whether the fixed clock source ID transmitted from adjacent network element compares clock source ID and preconfigured all clock source ID on this network element Unanimously, to determine whether the line clock source can be used, comprising:

If the clock identity type that line clock source is received from adjacent network element is clock source ID, by clock source ID and All clock source ID configured on this network element compare, if there is unanimous circumstances, it is determined that the line clock source is unavailable；

If the clock identity type that line clock source is received from adjacent network element is MAC Address, according to the clock source The ID and corresponding clock source ID of MAC Address mapping relationship searching, it is all by what is configured on the clock source ID found and this network element Clock source ID compares, if there is unanimous circumstances, it is determined that the line clock source is unavailable.

As another embodiment, clock source determining module 1202 can be used, for identifying class according to the received clock of institute Type determines the clock source ID transmitted from adjacent network element, when the clock that the adjacent network element that the clock source ID of the transmitting is identified is sent is available When, compare clock source ID and whether all clock source ID preconfigured on this network element are consistent, with the determination line clock Whether source can be used, comprising:

If the clock identity type that line clock source is received from adjacent network element is clock source ID and clock source ID is identified The clock that sends of adjacent network element it is available, then will the clock source ID that received and all clock source ID ratios configured on this network element Compared with if there is unanimous circumstances, it is determined that the line clock source is unavailable；

If the clock identity type that line clock source receives is MAC Address, according to the clock source ID and MAC Address The corresponding clock source ID of mapping relationship searching, when the clock that the adjacent network element of the clock source ID mark found is sent is available, All clock source ID configured on the clock source ID found and this network element are compared, if there is unanimous circumstances, it is determined that should Line clock source is unavailable.

In one embodiment, clock source determining module 1202 can be used, for selecting a clock from available clock source Source is as currently used clock source, comprising:

Or

Clock source information sending module 1203 is sent by corresponding line to adjacent network element for controlling each line clock source The clock of clock mark, clock quality grade and currently used clock source, wherein when transmitted by each line clock source Whether clock mark according to the line clock source is currently used clock source, if not when currently used clock source and the route when The clock identity type that the clock source ID configuring condition of Zhong Yuan and the line clock source are sent to adjacent network element determines.

As an implementation, clock source information sending module 1203 passes through correspondence for controlling each line clock source Route periodically sends the clock as currently used clock source to adjacent network element, and periodically sends and carry There is the ESMC message of clock mark and clock quality grade.

As an implementation, clock source information sending module 1203 passes through correspondence for controlling each line clock source Route is identified to adjacent network element tranmitting data register, comprising:

When line clock source is not currently used clock source:

When line clock source is currently used clock source:

As an implementation, clock source information sending module 1203, for carrying clock mark in ESMC message Type lengths values TLV field, comprising:

Correspondingly, in one embodiment, clock source information receiving module 1201, for by each line clock source from right The clock mark for answering the adjacent network element of line receiver to send, comprising:

In other embodiments, above-mentioned apparatus further include:

Configuration module configures the clock identity type sent to adjacent network element for each line clock source for this network element； When any route clock source for this network element configure to adjacent network element send clock identity type include MAC Address when, also match Set the mapping relations of the clock source ID and MAC Address in the digital synchronous network.

1) external clock reference；

2) include external clock reference network element on internal clock source；

In the existing scheme for avoiding digital synchronous network clock cyclization, in the scheme using only clock source ID, due to limit The NE quantity of networking has been made, has not been suitable for large-scale networking in this way；Using only the scheme of MAC Address, because being put MAC Address position the reason of, occupy the significant field of protocol definition, cause exist influence MAC address learning lack It falls into, and both schemes are unable to intercommunication.The present invention program does not modify other in message using the reserved field in ESMC message Significant field will not introduce other defect in this way；Simultaneously using flexibly switching of combining of clock source ID and MAC Address Scheme breaches and the limitation of clock source ID bring networking quantity is used only in the existing scheme for avoiding digital synchronous network clock cyclization Defect, meet the requirement of large-scale network-estabilishing.In addition, the side for avoiding digital synchronous network clock cyclization that the embodiment of the present invention is recorded Case can be compatible be used alone reserved field in ESMC message prevent clock using clock source ID or using MAC Address The scheme of cyclization, realizes the intercommunication of two schemes.

The embodiment of the invention also provides a kind of terminals for avoiding clock cyclization in digital synchronous network, comprising:

Memory, for storing instruction；

Processor is realized and as described in the previous embodiment avoids clock cyclization in digital synchronous network for executing described instruction Method.

The embodiment of the invention also provides a kind of computer readable storage medium, the media storage has computer executable Instruction is realized as described in the previous embodiment when avoiding in digital synchronous network when the computer executable instructions are executed by processor The method of clock cyclization.

It will appreciated by the skilled person that whole or certain steps, system, dress in method disclosed hereinabove Functional module/unit in setting may be implemented as software, firmware, hardware and its combination appropriate.In hardware embodiment, Division between the functional module/unit referred in the above description not necessarily corresponds to the division of physical assemblies；For example, one Physical assemblies can have multiple functions or a function or step and can be executed by several physical assemblies cooperations.Certain groups Part or all components may be implemented as by processor, such as the software that digital signal processor or microprocessor execute, or by It is embodied as hardware, or is implemented as integrated circuit, such as specific integrated circuit.Such software can be distributed in computer-readable On medium, computer-readable medium may include computer storage medium (or non-transitory medium) and communication media (or temporarily Property medium).As known to a person of ordinary skill in the art, term computer storage medium is included in for storing information (such as Computer readable instructions, data structure, program module or other data) any method or technique in the volatibility implemented and non- Volatibility, removable and nonremovable medium.Computer storage medium include but is not limited to RAM, ROM, EEPROM, flash memory or its His memory technology, CD-ROM, digital versatile disc (DVD) or other optical disc storages, magnetic holder, tape, disk storage or other Magnetic memory apparatus or any other medium that can be used for storing desired information and can be accessed by a computer.This Outside, known to a person of ordinary skill in the art to be, communication media generally comprises computer readable instructions, data structure, program mould Other data in the modulated data signal of block or such as carrier wave or other transmission mechanisms etc, and may include any information Delivery media.

Claims

1. a kind of method for avoiding clock cyclization in digital synchronous network, which is characterized in that the described method includes:

The clock mark for the clock source identity ID type that adjacent network element is sent is received from corresponding line by each line clock source Know or there are the clock marks that the media of corresponding relationship intervene control MAC Address type with the clock source ID；

For each line clock source, is identified according to the received clock of line clock source institute, determine that the line clock source is It is no available, comprising: according to the line clock source received clock identity type determine clock source ID that adjacent network element transmitted, Compare clock source ID and whether all clock source ID preconfigured on this network element are consistent, whether to determine the line clock source It can use；

Select a clock source as currently used clock source from available clock source, wherein the available clock source is Home Network Clock source in member in addition to not available line clock source；

Each line clock source is controlled to be identified to adjacent network element tranmitting data register by corresponding line, clock quality grade and currently made The clock of clock source, wherein whether the mark of clock transmitted by each line clock source is current according to the line clock source The clock source used, if not when currently used clock source and the line clock source clock source ID configuring condition and the line The clock identity type that road clock source is sent to adjacent network element determines.

2. the method according to claim 1 for avoiding clock cyclization in digital synchronous network, which is characterized in that further include:

3. the method according to claim 2 for avoiding clock cyclization in digital synchronous network, which is characterized in that the method is also Include:

When any route clock source for this network element configure to adjacent network element send clock identity type include MAC Address when, Also configure the mapping relations of the clock source ID and MAC Address in the digital synchronous network；

The mapping relations of the clock source ID and MAC Address include:

4. the method according to claim 1 for avoiding clock cyclization in digital synchronous network, which is characterized in that further include:

5. the method according to claim 4 for avoiding clock cyclization in digital synchronous network, which is characterized in that further include:

The clock mark received if it exists or the changed line clock source of clock quality grade, further according to line clock source Received clock mark, determines whether the line clock source can be used.

6. the method according to claim 3 for avoiding clock cyclization in digital synchronous network, which is characterized in that according to the route Clock source received clock identity type determine the clock source ID that adjacent network element is transmitted, compare clock source ID and this network element Whether upper preconfigured all clock source ID are consistent, to determine whether the line clock source can be used, comprising:

If the clock identity type that the line clock source receives is clock source ID, by the clock source ID received and this network element All clock source ID of upper configuration compare, if there is unanimous circumstances, it is determined that the line clock source is unavailable；

If the clock identity type that the line clock source receives is MAC Address, reflected according to the clock source ID and MAC Address It penetrates relationship and searches corresponding clock source ID, all clock source ID configured on the clock source ID found and this network element are compared, If there is unanimous circumstances, it is determined that the line clock source is unavailable.

7. the method according to claim 4 for avoiding clock cyclization in digital synchronous network, which is characterized in that described from available Select a clock source as currently used clock source in clock source, comprising:

Select a clock source as currently used clock source, packet from available clock source by clock credit rating and priority It includes:

The highest clock source of clock quality grade is selected, when only one can be used clock source to have highest clock quality grade When, using the clock source as currently used clock source；When there are multiple available clock sources to have highest clock quality grade When, therefrom select an available clock source of highest priority as currently used clock source；

Or

Only select a clock source as currently used clock source from available clock source by clock credit rating, comprising:

The highest clock source of clock quality grade is selected, when only one can be used clock source to have highest clock quality grade When, using the clock source as currently used clock source；When there are multiple available clock sources to have highest clock quality grade When, therefrom select an available clock source as currently used clock source in a random way.

8. the method according to claim 3 for avoiding clock cyclization in digital synchronous network, which is characterized in that the control is each Line clock source is identified by corresponding line to adjacent network element tranmitting data register, comprising:

When line clock source is not currently used clock source:

If the line clock source and currently used clock source are all configured with or all without configurable clock generator source ID, the routes The clock mark that clock source is sent by corresponding line to adjacent network element are as follows: the clock source ID that currently used clock source receives Or the corresponding clock source ID of MAC Address that currently used clock source receives；Alternatively, what currently used clock source received The corresponding MAC Address of clock source ID that MAC Address or currently used clock source receive；

If only one in the line clock source and currently used clock source is configured with clock source ID, the line clock source The clock mark sent by corresponding line to adjacent network element are as follows: the clock source ID of configuration；Alternatively, the clock source ID of configuration is corresponding MAC Address.

9. the method according to claim 3 for avoiding clock cyclization in digital synchronous network, which is characterized in that the control is each Line clock source is identified by corresponding line to adjacent network element tranmitting data register, comprising:

When line clock source is currently used clock source:

The clock identity type sent to adjacent network element if it is line clock source configuration is clock source ID, when the route The clock mark that the adjacent network element of Zhong Yuanxiang is sent are as follows: for identifying the not available clock source ID of clock sent；

The clock identity type sent to adjacent network element if it is line clock source configuration is MAC Address, when the route The clock mark that the adjacent network element of clockwise is sent are as follows: the MAC Address or the line clock source that the line clock source receives receive The corresponding MAC Address of clock source ID.

10. the method for avoiding clock cyclization in digital synchronous network according to claim 8 or claim 9, which is characterized in that the control Each line clock source is made to identify by corresponding line to adjacent network element tranmitting data register, comprising:

Each line clock source is controlled to carry clock mark in the ESMC message of Ethernet synchronizing information channel to adjacent network element hair It send, comprising:

Each line clock source is controlled to carry clock mark in the type lengths values TLV field of ESMC message to adjacent network element hair It send.

11. the method according to claim 10 for avoiding clock cyclization in digital synchronous network, which is characterized in that it is described by when Clock mark carries the type lengths values TLV field in ESMC message, comprising:

When the clock identity type that the line clock source of configuration is sent to adjacent network element is clock source ID, in TLV field Minimum 1 byte of value field stores clock source ID, other 5 bytes are 0；When the line clock source of configuration is to adjacent When the clock identity type that network element is sent is MAC Address, 6 bytes of the value field in TLV field are for storing MAC Location.

12. the method according to claim 11 for avoiding clock cyclization in digital synchronous network, which is characterized in that described to pass through Each line clock source receives the clock mark that adjacent network element is sent from corresponding line, comprising:

If parsing TLV field from the ESMC message is 0, the clock that line clock source receives is identified as 0；If from institute Stating and parsing TLV field in ESMC message is not 0, and high 5 byte is 0, then the clock identity type that line clock source receives For clock source ID；If parsing TLV field from the ESMC message is not 0, and high 5 byte is not 0, then line clock source connects The clock identity type received is the MAC Address in TLV field.

13. the method according to claim 1 for avoiding clock cyclization in digital synchronous network, which is characterized in that same in principal and subordinate In step net, the clock Source Type for being configured clock source ID includes:

External clock reference；

The route mouth of ring line clock source corresponding with all route mouths of connection ring on the public network element of chain or connection chain is right The line clock source answered.

14. a kind of system for avoiding clock cyclization in digital synchronous network, which is characterized in that the system comprises:

Clock source information receiving module, for receiving the clock source that adjacent network element is sent from corresponding line by each line clock source The clock of identity ID type identifies or there are the media of corresponding relationship to intervene control MAC Address class with the clock source ID The clock of type identifies；

Clock source determining module can be used, is used for for each line clock source, according to the received clock of line clock source institute Mark, determines whether the line clock source can be used, comprising: determines phase according to the received clock identity type of line clock source institute The clock source ID that adjacent network element is transmitted, compare on clock source ID and this network element preconfigured all clock source ID whether one It causes, to determine whether the line clock source can be used；Select a clock source as currently used clock from available clock source Source, wherein the available clock source is the clock source on this network element in addition to not available line clock source

Clock source information sending module passes through corresponding line to adjacent network element tranmitting data register mark for controlling each line clock source The clock of knowledge, clock quality grade and currently used clock source, wherein clock transmitted by each line clock source identifies Whether be currently used clock source according to the line clock source, if not when the currently used clock source and line clock source The clock identity type that clock source ID configuring condition and the line clock source are sent to adjacent network element determines.

15. the system according to claim 14 for avoiding clock cyclization in digital synchronous network, which is characterized in that further include:

16. the system according to claim 15 for avoiding clock cyclization in digital synchronous network, which is characterized in that

Configuration module is also used to configure the clock identity type sent to adjacent network element when any route clock source for this network element When including MAC Address, the mapping relations of the clock source ID and MAC Address in the digital synchronous network are also configured；The clock source The mapping relations of ID and MAC Address include: network element where the clock source that the corresponding MAC Address of clock source ID is clock source ID mark MAC Address.

17. the system according to claim 14 for avoiding clock cyclization in digital synchronous network, which is characterized in that

Clock source information receiving module is also used to receive the clock that adjacent network element is sent from corresponding line by each line clock source Credit rating；

Clock source determining module can be used, is also used to judging that there is the clock mark received or clock quality grade becomes When the line clock source of change, is identified further according to the received clock in line clock source, determine whether the line clock source can be used.

18. the system according to claim 16 for avoiding clock cyclization in digital synchronous network, which is characterized in that

Clock source determining module can be used, for determining adjacent network element institute according to the received clock identity type of line clock source institute The clock source ID of transmitting, compares clock source ID and whether all clock source ID preconfigured on this network element are consistent, with determination Whether the line clock source can be used, comprising:

19. the system according to claim 17 for avoiding clock cyclization in digital synchronous network, which is characterized in that

Clock source determining module can be used, for selecting a clock source as currently used clock source from available clock source, Include:

Or

20. the system according to claim 16 for avoiding clock cyclization in digital synchronous network, which is characterized in that

Clock source information sending module passes through corresponding line to adjacent network element tranmitting data register mark for controlling each line clock source Know, comprising:

When line clock source is not currently used clock source:

21. the system according to claim 16 for avoiding clock cyclization in digital synchronous network, which is characterized in that

When line clock source is currently used clock source:

22. avoiding the system of clock cyclization in digital synchronous network according to claim 20 or 21, which is characterized in that

23. the system according to claim 22 for avoiding clock cyclization in digital synchronous network, which is characterized in that

Clock source information sending module, for clock mark to be carried to the type lengths values TLV field in ESMC message, comprising:

24. the system according to claim 23 for avoiding clock cyclization in digital synchronous network, which is characterized in that

Clock source information receiving module, for receiving the clock mark that adjacent network element is sent from corresponding line by each line clock source Know, comprising:

25. the system according to claim 14 for avoiding clock cyclization in digital synchronous network, which is characterized in that

The clock Source Type for being configured clock source ID in master-slave synchronisation net, on this network element includes:

External clock reference；

26. a kind of terminal for avoiding clock cyclization in digital synchronous network characterized by comprising

Memory, for storing instruction；

Processor, for executing described instruction, realization avoids in digital synchronous network as described in any one of claims 1 to 13 The method of clock cyclization.

27. a kind of computer readable storage medium, which is characterized in that the media storage has computer executable instructions, described It realizes when computer executable instructions are executed by processor and is avoided in digital synchronous network described in any one of claims 1 to 13 The method of clock cyclization.