CN109150064A - A kind of cascade SVG speed-regulating system dead time effect pulsewidth bilateral adjustment compensation method based on zero current region detection - Google Patents

A kind of cascade SVG speed-regulating system dead time effect pulsewidth bilateral adjustment compensation method based on zero current region detection Download PDF

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Publication number
CN109150064A
CN109150064A CN201811081604.8A CN201811081604A CN109150064A CN 109150064 A CN109150064 A CN 109150064A CN 201811081604 A CN201811081604 A CN 201811081604A CN 109150064 A CN109150064 A CN 109150064A
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shutdowns
conductings
compensation
lags
shifts
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Inventor
于月森
石蒙
夏远哲
吕晓彬
张亚男
黄煜茹
张吉阳
张圆明
张帆
刘天宁
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China University of Mining and Technology CUMT
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China University of Mining and Technology CUMT
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
    • H02P27/08Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
    • H02P27/085Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation wherein the PWM mode is adapted on the running conditions of the motor, e.g. the switching frequency
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/42Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208Arrangements for improving power factor of AC input
    • H02M1/4233Arrangements for improving power factor of AC input using a bridge converter comprising active switches
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P23/00Arrangements or methods for the control of AC motors characterised by a control method other than vector control
    • H02P23/26Power factor control [PFC]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a kind of, and the cascade SVG speed-regulating system dead time effect pulsewidth bilateral based on zero current region detection adjusts compensation method, comprising steps of Step 1: detection cascades the size of each bridge arm current in SVG inverter, obtain the size of current of every phase in cascade SVG inverter, and calculate zero current regional scope [- Δ i, Δ i];Step 2: adjusting separately the rising edge and failing edge of the driving signal of IGBT in each H bridge according to the state of phase current each in step 1.Size, calculating zero current regional scope of the present invention by detection bridge arm current, the rising edge and failing edge of the driving signal of IGBT are adjusted in each H bridge, to obtain the compensated driving signal of dead time effect.The present invention can carry out real-time effective compensation to dead time effect, the complexity for greatly reducing control program, reduces the burden of controller, in addition, the application of zero current region detection solves dependence of original method to zero-crossing examination precision, improves the accuracy of dead area compensation.

Description

A kind of cascade SVG speed-regulating system dead time effect pulsewidth based on zero current region detection Bilateral adjusts compensation method
Technical field
The present invention relates to dead-time compensation algorithm field, specially a kind of cascade SVG speed regulation based on zero current region detection System dead zone effect pulsewidth bilateral adjusts compensation method.
Background technique
With the continuous research and development of inverter technology, inverter is applied to high-power occasion more and more In, the development and application of cascade SVG makes the voltage class of inverter get a promotion again.It is big applied to high pressure to cascade SVG When power Alternating Current Governor System, it is contemplated that output voltage waveforms of the multi-electrical level inverter under declared working condition are that sine degree is good Staircase waveform extremely efficient reduces the aberration rate of output voltage, thus cascade SVG inverter output end can be directly connected to it is electronic Machine does not need to add filter.But under motor low speed light duty, inverter output voltage level number is reduced, and is no longer Staircase waveform, harmonic wave of output voltage content increases, and the presence of dead time at this time can aggravate the distortion of output voltage, so as to cause The Severe distortion of motor current, seriously affects motor operation at the problems such as causing torque pulsation, heating in winding.
The method of dead area compensation mainly has pulse width direct adjustment act and average electric voltage feed forward penalty method at this stage.It is average Offset voltage is added to by electric voltage feed forward penalty method modulates on wave voltage, carries out to the corresponding modulating wave of a triangle wave period whole Body adjustment, but will cause output waveform delay.Pulse width direct adjustment act focuses on the conversion of driving signal, but in zero passage Point is nearby easier to occur accidentally compensation phenomenon.
Summary of the invention
Goal of the invention: in view of the deficiencies of the prior art, the present invention provides a kind of cascade SVG based on zero current region detection Speed-regulating system dead time effect pulsewidth bilateral adjusts compensation method, can carry out real-time effective compensation to dead time effect, substantially reduce The complexity of control program, reduces the burden of controller, in addition, the application of zero current region detection solves original side Dependence of the method to zero-crossing examination precision, improves the accuracy of dead area compensation.
To achieve the goals above, the invention adopts the following technical scheme:
A kind of cascade SVG speed-regulating system dead time effect pulsewidth bilateral adjustment compensation method based on zero current region detection, Comprising steps of
Step 1: detection cascades the size of each bridge arm current in SVG inverter, every phase in cascade SVG inverter is obtained Size of current, and calculate zero current regional scope [- Δ i, Δ i];
Step 2: according to the state of phase current each in step 1, the upper of the driving signal of IGBT in each H bridge is adjusted separately Rise edge and failing edge;Using the electric current inflow cascade direction SVG as positive direction, total pulse widths PWMpulse, dead time Td, The dead area compensation time is Td/2;Specifically:
1) when voltage is greater than 0, and electric current is greater than Δ i, T1 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T2 shifts to an earlier date Td/ 2 lead It is logical, lag Td/ 2 shutdowns;T3 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T4 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;After compensation Total pulse widths are PWMpulse+Td
2) when voltage be greater than 0, electric current be less than-Δ i when, T1 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T2 lags Td/ 2 lead Lead to, in advance Td/ 2 shutdowns;T3 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T4 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;After compensation Total pulse widths are PWMpulse-Td
3) when voltage is less than 0, and electric current is greater than Δ i, T1 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T2 shifts to an earlier date Td/ 2 lead It is logical, lag Td/ 2 shutdowns;T3 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T4 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;After compensation Total pulse widths are PWMpulse+Td
4) when voltage is less than 0, electric current is less than-Δ i when, T1 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T2 lags Td/ 2 lead Lead to, in advance Td/ 2 shutdowns;T3 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T4 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;After compensation Total pulse widths are PWMpulse-Td
The utility model has the advantages that the method for the invention carries out the arteries and veins based on zero current region detection for cascade SVG speed-regulating system Wide bilateral adjustment, realizes dead time effect compensation, by detecting the size of bridge arm current, calculating zero current regional scope, in each H The rising edge and failing edge of the driving signal of IGBT are adjusted in bridge, to obtain the compensated driving signal of dead time effect. The present invention can carry out real-time effective compensation to dead time effect, greatly reduce the complexity of control program, reduce control The burden of device improves in addition, the application of zero current region detection solves dependence of original method to zero-crossing examination precision The accuracy of dead area compensation.The method is realized simply, is not needed to increase special hardware detection device, also not needed to inversion The on off operating mode of device switching device is detected, and the deficiency of traditional directly pulse-width adjustment method is compensated for.It is particularly suitable for cascade SVG The dead area compensation of speed-regulating system inverter under low speed light duty.
Detailed description of the invention
Fig. 1 is the cascade SVG speed-regulating system dead time effect pulsewidth bilateral adjustment compensation method based on zero current region detection Flow chart.
Fig. 2 is the circuit topology schematic diagram for cascading SVG and connecing motor load.
Fig. 3 is i described in present exampleaWhen > 0, output voltage waveforms schematic diagram before and after dead area compensation.
Fig. 4 is i described in present exampleaWhen < 0, output voltage waveforms schematic diagram before and after dead area compensation.
Fig. 5 a is inverter output current when not carrying out dead area compensation described in present example.
Fig. 5 b is inverter output current when carrying out dead area compensation described in present example.
Fig. 6 a is inverter output voltage analysis of harmonic spectrum figure when not carrying out dead area compensation described in present example.
Fig. 6 b is inverter output voltage analysis of harmonic spectrum figure when carrying out dead area compensation described in present example.
Specific embodiment
The present invention will be further explained with reference to the accompanying drawing.
As shown in Figure 1, the cascade SVG speed-regulating system dead time effect pulsewidth bilateral based on zero current region detection adjusts compensation Method, comprising the following steps:
Step 1 detects the size of cascade SVG inverter bridge arm electric current by current sensor, and it is inverse to obtain cascade SVG Become the size of current of every phase in device, and calculates zero current regional scope [- Δ i, Δ i];
Step 2 adjusts separately the upper of the driving signal of IGBT in each H bridge according to the state of step 1 bridge arm electric current Edge and failing edge are risen, to obtain the compensated switching signal of dead time effect, drives IGBT on or off.
Using the electric current inflow cascade direction SVG as positive direction, total pulse widths PWMpulse, dead time Td, dead zone The compensation time is Td/ 2, it is as follows that compensation is adjusted separately in the rising edge and failing edge of the driving signal of IGBT:
1) when voltage is greater than 0, and electric current is greater than Δ i, T1 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T2 shifts to an earlier date Td/ 2 lead It is logical, lag Td/ 2 shutdowns;T3 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T4 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;After compensation Total pulse widths are PWMpulse+Td, specific as shown in Figure 2;
2) when voltage be greater than 0, electric current be less than-Δ i when, T1 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T2 lags Td/ 2 lead Lead to, in advance Td/ 2 shutdowns;T3 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T4 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;After compensation Total pulse widths are PWMpulse-Td, specific as shown in Figure 3;
3) when voltage is less than 0, and electric current is greater than Δ i, T1 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T2 shifts to an earlier date Td/ 2 lead It is logical, lag Td/ 2 shutdowns;T3 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T4 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;After compensation Total pulse widths are PWMpulse+Td, specific as shown in Figure 2;
4) when voltage is less than 0, electric current is less than-Δ i when, T1 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T2 lags Td/ 2 lead Lead to, in advance Td/ 2 shutdowns;T3 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T4 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;After compensation Total pulse widths are PWMpulse-Td, specific as shown in Figure 3.
Step 3, according to step 2 correction-compensation, switching signal after obtaining dead area compensation, driving switch break-over of device or Shutdown.
It the principle of the present invention and is illustrated below:
One, the Inverter Dead-time SVG effect production principle and its influence are cascaded
The cascade every phase of SVG inverter is composed in series by N number of H bridge, by the conducting and the pass that control in each H bridge four IGBT It is disconnected, export the good staircase waveform of sine degree.
Ideally, when a switching tube is opened on same bridge arm, another switching tube turns off at once, but due to switch The turn-on and turn-off of device all have certain delay, short circuit are caused to avoid upper and lower bridge arm from simultaneously turning on, in upper and lower switching tube Driving signal in be added dead time Td
By taking single H bridge as an example, dead time effect and compensation principle are analyzed, as shown in Figure 2.
It can be obtained by Fig. 3 and Fig. 4, influence of the addition of dead time to inverter output voltage is mainly shown as:
1) when electric current is greater than zero, error voltage is positive in dead time;
2) when electric current is less than zero, error voltage is negative in dead time.
Dead time makes to contain periodic error in actual output voltage, so as to cause the distortion of output electric current.
It can be obtained by Fig. 3 and Fig. 4 analysis, the actual output voltage due to caused by the presence of dead time and desired output voltage Difference is that a time span is TdPulse voltage.By taking one H bridge of A phase as an example, the equivalent dead zone error voltage of generation are as follows:
Wherein, TdFor dead time, Ts is switch periods, VdcFor DC voltage, iaElectric current is exported for A phase.
Two, the cascade SVG speed-regulating system dead time effect pulsewidth bilateral based on zero current region detection adjusts compensation method
Principle is as shown in Figure 3 and Figure 4;
When electric current is greater than Δ i, T1 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T2 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 close It is disconnected;T3 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T4 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;Total pulse widths are after compensation PWMpulse+Td, specific as shown in Figure 3;
When electric current be less than-Δ i when, T1 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T2 lags Td/ 2 are connected, in advance Td/ 2 close It is disconnected;T3 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T4 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;Total pulse widths are after compensation PWMpulse-Td, specific as shown in Figure 4;
After the compensation method, theoretically actual output voltage can reach compensation effect by polishing or reduction, and Solve the problems, such as that current zero-crossing point accidentally compensates.
Three, simulating, verifying
Simulation model is built in Matlab/Simulink carries out the cascade SVG speed regulation system based on zero current region detection Dead time effect pulsewidth bilateral of uniting adjusts the verifying of compensation method.
DC voltage 980V, the 5 H bridge cascades of every phase, modulation degree 0.05, carrier frequency 750Hz, modulation wave frequency are set Rate 0.127s, dead time are 4 μ s, replace motor load with equivalent RL load.
Simulation result of the present invention is as shown in Figure 5,6.Wherein, Fig. 5 a is when not carrying out dead area compensation described in present example Inverter output current.Fig. 5 b is inverter output current when carrying out dead area compensation described in present example.Fig. 6 a is this hair Inverter output voltage analysis of harmonic spectrum figure when dead area compensation is not carried out described in bright example.Fig. 6 b is institute in present example State inverter output voltage analysis of harmonic spectrum figure when carrying out dead area compensation.
Fig. 5 a and Fig. 5 b illustrate that dead time will cause motor output current distortion, while will cause current clamp;It carries out It can effectively improve output current wave after bilateral compensation based on zero passage region detection, while eliminating current clamp effect.Fig. 6 a Illustrate that dead time will cause output voltage aberration rate and increase with Fig. 6 b, carries out energy after the bilateral compensation based on zero passage region detection Voltage distortion rate is effectively reduced, system stability is increased.
The above is only a preferred embodiment of the present invention, it should be pointed out that: for the ordinary skill people of the art For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered It is considered as protection scope of the present invention.

Claims (1)

1. a kind of cascade SVG speed-regulating system dead time effect pulsewidth bilateral based on zero current region detection adjusts compensation method, It is characterized in that: comprising steps of
Step 1: detection cascades the size of each bridge arm current in SVG inverter, the electricity of every phase in cascade SVG inverter is obtained Size is flowed, and calculates zero current regional scope [- Δ i, Δ i];
Step 2: adjusting separately the rising edge of the driving signal of IGBT in each H bridge according to the state of phase current each in step 1 And failing edge;Using the electric current inflow cascade direction SVG as positive direction, total pulse widths PWMpulse, dead time Td, dead zone The compensation time is Td/2;Specifically:
1) when voltage is greater than 0, and electric current is greater than Δ i, T1 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T2 shifts to an earlier date Td/ 2 conductings, it is stagnant T afterwardsd/ 2 shutdowns;T3 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T4 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;Overall pulse after compensation Width is PWMpulse+Td
2) when voltage be greater than 0, electric current be less than-Δ i when, T1 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T2 lags Td/ 2 conductings, mention Preceding Td/ 2 shutdowns;T3 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T4 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;Overall pulse after compensation Width is PWMpulse-Td
3) when voltage is less than 0, and electric current is greater than Δ i, T1 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T2 shifts to an earlier date Td/ 2 conductings, it is stagnant T afterwardsd/ 2 shutdowns;T3 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T4 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;Overall pulse after compensation Width is PWMpulse+Td
4) when voltage is less than 0, electric current is less than-Δ i when, T1 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;T2 lags Td/ 2 conductings, mention Preceding Td/ 2 shutdowns;T3 lags Td/ 2 are connected, in advance Td/ 2 shutdowns;T4 shifts to an earlier date Td/ 2 conductings, lag Td/ 2 shutdowns;Overall pulse after compensation Width is PWMpulse-Td
CN201811081604.8A 2018-09-17 2018-09-17 A kind of cascade SVG speed-regulating system dead time effect pulsewidth bilateral adjustment compensation method based on zero current region detection Pending CN109150064A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110071669A (en) * 2019-06-03 2019-07-30 北京机械设备研究所 A kind of permanent magnet synchronous motor vector controlled " dead time effect " compensation method
CN113471985A (en) * 2021-09-02 2021-10-01 国能日新科技股份有限公司 SVG control precision small-demand distance optimization reactive power compensation method and device

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CN108075678A (en) * 2017-12-23 2018-05-25 西安交通大学 The bilateral compensation method of three-phase inverter dead time effect based on pulse-width adjustment

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Publication number Priority date Publication date Assignee Title
CN108075678A (en) * 2017-12-23 2018-05-25 西安交通大学 The bilateral compensation method of three-phase inverter dead time effect based on pulse-width adjustment

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110071669A (en) * 2019-06-03 2019-07-30 北京机械设备研究所 A kind of permanent magnet synchronous motor vector controlled " dead time effect " compensation method
CN113471985A (en) * 2021-09-02 2021-10-01 国能日新科技股份有限公司 SVG control precision small-demand distance optimization reactive power compensation method and device
CN113471985B (en) * 2021-09-02 2021-11-16 国能日新科技股份有限公司 SVG control precision small-demand distance optimization reactive power compensation method and device

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