CN109149987A - A kind of production method of the three level energy accumulation current converters based on A-NPC topology - Google Patents
A kind of production method of the three level energy accumulation current converters based on A-NPC topology Download PDFInfo
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- CN109149987A CN109149987A CN201810899040.2A CN201810899040A CN109149987A CN 109149987 A CN109149987 A CN 109149987A CN 201810899040 A CN201810899040 A CN 201810899040A CN 109149987 A CN109149987 A CN 109149987A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
Abstract
The invention discloses a kind of production methods of three level energy accumulation current converters based on A-NPC topology, belong to new energy and technical field of energy storage.The method of the present invention specifically includes: determining the circuit structure of main circuit, determines control system hardware configuration and determines Control System Software strategy.The present invention is based on reverse blocking IGBT neutral-point-clamped three-level topology building energy accumulation current converter system, it can be achieved that voltage and current output smooth under the operating condition that is incorporated into the power networks, has the features such as high conversion efficiency, power factor are high, current harmonics is small.For distributed energy storage system and centralized energy-storage system, filter circuit inductor design value can be reduced, to reduce system overall dimensions with hoisting power density, convenient for energy-storage system miniaturization and modularized design；In addition the promotion of converter system power can increase energy-storage system capacity usage ratio, so that the input cost of energy storage carrier is reduced, the Social benefit and economic benefit with energy-saving and emission-reduction.
Description
Technical field
The present invention relates to new energy and technical field of energy storage, and relate more specifically to a kind of three based on A-NPC topology
The production method of level energy accumulation current converter.
Background technique
Distributed energy storage device in the popularization and use of user side, meet user's energy be free to arrange, power cost saving branch
Out and emergency power supply etc. demands, while also to energy storage device propose high efficiency, lightweight, miniaturization etc. requirement.It compares
In traditional two level current transformers, three-level current transformer has that output voltage current waveform distortion is small, small, direct current is lost in devices switch
The advantages that current ripples are small is conducive to reduce filter circuit volume, lifting system efficiency, is more and more applied to distributed new
Energy power generation and energy storage field.
It the use of more three-level current transformer topology include at present I type topology and T-type topology, wherein I type three-level topology
I.e. diode clamp bit-type three-level topology (Three-level Neutral Point Clamped Converter, NPC) exists
The problems such as uneven phenomenon of power tube loss, there are main circuit heat dissipation design and high-power integrated difficulties, and T-type three-level topology
(T-type Three-level Neutral Point Clamped Converter, T-NPC) is with controllable switching device generation
For clamp diode, wear leveling is realized by providing optional change of current channel, can be obviously improved current transformer power grade.Herein
On the basis of, Japanese fuji motor releases Novel T-shaped three-level topology (Advanced T-type Three-level Neutral
Point Clamped Converter, A-NPC) i.e. inverse-impedance type NPC three-level topology, which uses as shown in Figure 1, two
Neutral-point-clamped is realized in reverse blocking IGBT (Reverse Blocking IGBT, RB-IGBT) inverse parallel, compared with the every phase bridge of T-NPC topology
Arm lacks two clamp diodes, further reduces break-over of device loss, switching loss and reactor loss, has higher work
Journey application value.
Summary of the invention
Goal of the invention is that switching loss, conduction loss and the reactor of researching and developing a kind of current transformer reduction current transformer are lost,
Promote current transformer efficiency；Reduce filter inductance design flow, to reduce system bulk and weight, the power for promoting current transformer is close
Degree；The cost of manufacture of current transformer is reduced, energy-storage system cost performance is promoted, proposes a kind of three level storage based on A-NPC topology
The production method of energy current transformer, the method for the present invention include:
Determine the circuit structure of main circuit；
The circuit structure of the main circuit includes: isolating transformer, LCL filter circuit, tri- level block of A-NPC and direct current
Filter capacitor；The LCL filter circuit includes filter inductance L1, filter inductance L2 and filter capacitor C0, the isolating transformer
It is connected with filter inductance L1, filter inductance L2 exchanges side with tri- level block of A-NPC and is connected, tri- level block DC side of A-NPC
It is connected with DC filter capacitor；
Determine control system hardware configuration；
The control system hardware circuit be based on DSP and FPGA architecture, including DSP master controller, FPGA pilot controller,
Photoelectric conversion and driving circuit；DSP master controller is sampled by voltage and current and optical coupling isolation circuit is connected with main circuit, DSP
Master controller is connected with FPGA pilot controller by address bus and data/address bus, and FPGA pilot controller passes through electrical signal line
It is connected with photoelectric conversion and driving circuit, photoelectric conversion and driving circuit are connected by optical fiber with main circuit；
Determine Control System Software strategy；
The Control System Software strategy includes active rectification control strategy based on DSP master controller and based on FPGA's
Sinusoidal pulse width modulation strategy；
The active rectification control strategy based on DSP master controller is two-way to current transformer using Direct Current Control mode
Cutting-in control is zero theoretical building software phase-lock loop according to three-phase balanced system instantaneous reactive voltage；
DSP master controller samples power grid three-phase voltage value uabc, PI arithmetic unit value of feedback reactive voltage is obtained through coordinate transform
Component uq, System Reactive Power component of voltage given value uq *The phase angle for being the output of zero, PI arithmetic unit and being calculated close to calculating cycle
Value θ0Subtract each other to obtain angle values θ this moment, angle values θ is as next calculating cycle angle values θ this moment0；
DSP master controller Sample AC side three-phase voltage current uabcAnd iabc, two cordic phase rotators are obtained through coordinate transform
It is lower active voltage ud, reactive voltage uq, watt current idWith reactive current iqComponent, the watt current of current transformer exchange output
id *The reactive current given value i of output is exchanged with current transformerq *, id *With watt current value of feedback idDifference and iq *With idle electricity
Flow value of feedback iqDifference after PI is adjusted, intermediate variable v is obtained by Feedforward Decoupling algorithmd、vq, to vd、vqDo coordinate contravariant
Get three-phase initial modulation waveform v in rotating coordinate system in returna0、vb0、vc0, residual voltage point is injected in three-phase initial modulation wave
Measure v0, to obtain three-phase modulations wave va、vb、vc, three-phase modulations waveform pass through respectively parallel bus send to FPGA assist control
Device；
The sinusoidal pulse width modulation policy control FPGA pilot controller based on FPGA pilot controller receives DSP master
After the three-phase modulations wave that controller is sent respectively with upper carrier wave and lower carrier wave ratio compared with, every tetra- tunnel driving signal S1 of phase bridge arm Ke get,
S2, S3 and S4 drive switching tube Q1, Q2, Q3 and Q4 movement after dead zone adjusts, when three-phase modulations wave is greater than upper carrier wave, S1
Being delayed through 4us, output high level driving Q1 pipe is open-minded, and S3 exports low level driving Q3 pipe shutdown；It is uploaded when three-phase modulations wave is less than
When wave, S1 exports low level driving Q1 pipe shutdown, and S3 is open-minded through 4us delay output high level driving Q3 pipe；When three-phase modulations wave
When greater than lower carrier wave, S4 is delayed through 4us, and output high level driving Q4 pipe is open-minded, and S2 exports low level driving Q2 pipe shutdown；When three
When phase modulating wave is less than lower carrier wave, S4 exports low level driving Q4 pipe shutdown, and S2 is opened through 4us delay output high level driving Q2 pipe
Lead to, wherein Q1 and Q3 alternate conduction, Q2 and Q4 alternate conduction, when urgency signal or stopping signal generation, Q1, Q2 are closed at once
It is disconnected, Q3, Q4 delay 1us shutdown.
Optionally, control mode has monocycle control and double -loop control, and the monocycle control is the control of ac output current ring,
Realize AC side of converter constant current output；The double -loop control is outer loop control and inner loop control, and inner ring is ac output current
Ring, outer ring select output AC power ring, DC output power ring, direct current output electricity according to the difference of current transformer operating mode
Pressure ring and average anode current ring are outer ring, to realize current transformer constant pressure, constant current, the control of invariable power different working modes.
Optionally, FPGA pilot controller also passes through acquisition current transformer operating status feedback and controls external IO.
Optionally, exterior I O control includes the control of AC/DC contactor on-off, the control of pre-charge contactor on-off, radiation air
Fan start-up and shut-down control and indicator light control.
Optionally, isolating transformer be isolated and filter out triple-frequency harmonics to current transformer and power grid in main circuit；It is described
Isolating transformer selects Y/ △ type winding construction, and triangle flanks power grid, and star flanks LCL filter circuit；LCL filter is to high frequency
High impedance is presented in component, plays attenuation to higher harmonic current；DC filter capacitor includes capacitor C1 and capacitor C2, capacitor
C1 and capacitor C2 series connection, the DC filter capacitor are used for tri- level block stable DC side voltage of A-NPC, avoid voltage wave
It is dynamic.
Optionally, control system hardware DSP master controller is used for the acquisition of current transformer voltage and current, coordinate transform, modulating wave
Output and with host computer information exchange；FPGA pilot controller generates for current transformer sinusoidal pulse width modulation, dead zone, protects signal
Processing, state signal collecting and exterior I O control；The driving signal and state of photoelectric conversion and driving circuit for current transformer are protected
The photoelectric conversion for protecting signal, for being isolated for control system hardware and main circuit.
Optionally, control system hardware configuration is connected by RS232 interface with Monitor Computer Control System.
Optionally, Monitor Computer Control System is based on WINCE system and C# language is realized, control system real-time reception host computer
Control signal, pid parameter and the real time execution parameter that monitoring system issues, require that system is sent to join according to Monitor Computer Control System
Number, real time execution operating condition and real-time voltage current sampling signal.
Optionally, the intelligent operation of Monitor Computer Control System real-time control current transformer.
The present invention also provides a kind of three level energy accumulation current converters based on A-NPC topology, current transformer of the present invention includes:
Main circuit；
The main circuit includes: isolating transformer, LCL filter circuit, tri- level block of A-NPC and DC filter capacitor；
The LCL filter circuit includes filter inductance L1, filter inductance L2 and filter capacitor C0, the isolating transformer and filter inductance
L1 is connected, and filter inductance L2 exchanges side with tri- level block of A-NPC and is connected, tri- level block DC side of A-NPC and DC filtering
Capacitor is connected；
Control system hardware；
The control system hardware is based on DSP and FPGA architecture, including DSP master controller, FPGA pilot controller, photoelectricity
Conversion and driving circuit；DSP master controller is sampled by voltage and current and optical coupling isolation circuit is connected with main circuit, DSP master control
Device processed is connected with FPGA pilot controller by address bus and data/address bus, and FPGA pilot controller passes through electrical signal line and light
Electricity conversion and driving circuit are connected, and photoelectric conversion and driving circuit are connected by optical fiber with main circuit；
Control System Software；
The Control System Software includes active rectification control strategy based on DSP master controller and based on the sine of FPGA
Pulsewidth modulation strategy；
The active rectification control strategy based on DSP master controller is two-way to current transformer using Direct Current Control mode
Cutting-in control is zero theoretical building software phase-lock loop according to three-phase balanced system instantaneous reactive voltage；
DSP master controller samples power grid three-phase voltage value uabc, PI arithmetic unit value of feedback reactive voltage is obtained through coordinate transform
Component uq, System Reactive Power component of voltage given value uq *The phase angle for being the output of zero, PI arithmetic unit and being calculated close to calculating cycle
Value θ0Subtract each other to obtain angle values θ this moment, angle values θ is as next calculating cycle angle values θ this moment0；
DSP master controller Sample AC side three-phase voltage current uabcAnd iabc, two cordic phase rotators are obtained through coordinate transform
It is lower active voltage ud, reactive voltage uq, watt current idWith reactive current iqComponent, the watt current of current transformer exchange output
id *The reactive current given value i of output is exchanged with current transformerq *, id *With watt current value of feedback idDifference and iq *With idle electricity
Flow value of feedback iqDifference after PI is adjusted, intermediate variable v is obtained by Feedforward Decoupling algorithmd、vq, to vd、vqDo coordinate contravariant
Get three-phase initial modulation waveform v in rotating coordinate system in returna0、vb0、vc0, residual voltage point is injected in three-phase initial modulation wave
Measure v0, to obtain three-phase modulations wave va、vb、vc, three-phase modulations waveform pass through respectively parallel bus send to FPGA assist control
Device；
The sinusoidal pulse width modulation policy control FPGA pilot controller based on FPGA pilot controller receives DSP master
After the three-phase modulations wave that controller is sent respectively with upper carrier wave and lower carrier wave ratio compared with, every tetra- tunnel driving signal S1 of phase bridge arm Ke get,
S2, S3 and S4 drive switching tube Q1, Q2, Q3 and Q4 movement after dead zone adjusts, when three-phase modulations wave is greater than upper carrier wave, S1
Being delayed through 4us, output high level driving Q1 pipe is open-minded, and S3 exports low level driving Q3 pipe shutdown；It is uploaded when three-phase modulations wave is less than
When wave, S1 exports low level driving Q1 pipe shutdown, and S3 is open-minded through 4us delay output high level driving Q3 pipe；When three-phase modulations wave
When greater than lower carrier wave, S4 is delayed through 4us, and output high level driving Q4 pipe is open-minded, and S2 exports low level driving Q2 pipe shutdown；When three
When phase modulating wave is less than lower carrier wave, S4 exports low level driving Q4 pipe shutdown, and S2 is opened through 4us delay output high level driving Q2 pipe
Lead to, wherein Q1 and Q3 alternate conduction, Q2 and Q4 alternate conduction, when urgency signal or stopping signal generation, Q1, Q2 are closed at once
It is disconnected, Q3, Q4 delay 1us shutdown.
The advantage of the invention is that energy accumulation current converter system is constructed based on reverse blocking IGBT neutral-point-clamped three-level topology, it can
It realizes voltage and current output smooth under the operating condition that is incorporated into the power networks, has the spies such as high conversion efficiency, power factor are high, current harmonics is small
Point.For distributed energy storage system and centralized energy-storage system, filter circuit inductor design value can be reduced, so that it is whole to reduce system
Body size is with hoisting power density, convenient for energy-storage system miniaturization and modularized design；In addition the promotion of converter system power
Energy-storage system capacity usage ratio can be increased, to reduce the input cost of energy storage carrier, social benefit with energy-saving and emission-reduction and
Economic benefit.
Detailed description of the invention
Fig. 1 is a kind of production method A-NPC topological diagram of the three level energy accumulation current converters based on A-NPC topology of the present invention；
Fig. 2 is a kind of production method main circuit circuit knot of the three level energy accumulation current converters based on A-NPC topology of the present invention
Composition；
Fig. 3 is a kind of production method control system hardware of the three level energy accumulation current converters based on A-NPC topology of the present invention
Structure chart；
Fig. 4 is a kind of software of the production method based on DSP of the three level energy accumulation current converters based on A-NPC topology of the present invention
Phaselocked loop and DC current control logic block diagram；
Fig. 5 be a kind of production method of the three level energy accumulation current converters based on A-NPC topology of the present invention based on FPGA just
String wave pulsewidth modulation strategy block diagram；
Sine Wave Pulse Width Modulation strategy block diagram based on FPGA
Fig. 6 is a kind of production method flow chart of the three level energy accumulation current converters based on A-NPC topology of the present invention；
Fig. 7 is a kind of three level energy accumulation current converter structure charts based on A-NPC topology of the present invention.
Specific embodiment
Exemplary embodiments of the present invention are introduced referring now to the drawings, however, the present invention can use many different shapes
Formula is implemented, and is not limited to the embodiment described herein, and to provide these embodiments be at large and fully disclose
The present invention, and the scope of the present invention is sufficiently conveyed to person of ordinary skill in the field.Show for what is be illustrated in the accompanying drawings
Term in example property embodiment is not limitation of the invention.In the accompanying drawings, identical cells/elements use identical attached
Icon note.
Unless otherwise indicated, term (including scientific and technical terminology) used herein has person of ordinary skill in the field
It is common to understand meaning.Further it will be understood that with the term that usually used dictionary limits, should be understood as and its
The context of related fields has consistent meaning, and is not construed as Utopian or too formal meaning.
The present invention provides a kind of production method of three level energy accumulation current converters based on A-NPC topology, the present invention be based on
Reverse blocking IGBT neutral-point-clamped three-level topology as shown in Figure 1 constructs energy accumulation current converter system, as shown in fig. 6, the present invention has
Body process includes:
Determine the circuit structure of main circuit；
As shown in Fig. 2, the circuit structure of main circuit includes: isolating transformer, LCL filter circuit, tri- level block of A-NPC
And DC filter capacitor；The LCL filter circuit includes filter inductance L1, filter inductance L2 and filter capacitor C0, the isolation
Transformer is connected with filter inductance L1, and filter inductance L2 exchanges side with tri- level block of A-NPC and is connected, tri- level block of A-NPC
DC side is connected with DC filter capacitor；
Power grid is connected by isolating transformer with filter inductance L1, DC filter capacitor C1 and C2 connect after with energy-storage battery
It is in parallel；
Isolating transformer be isolated and filter out triple-frequency harmonics to current transformer and power grid in main circuit；The isolation transformation
Device selects Y/ △ type winding construction, and triangle flanks power grid, and star flanks LCL filter circuit；High fdrequency component is presented in LCL filter
High impedance plays attenuation to higher harmonic current；DC filter capacitor includes capacitor C1 and capacitor C2, capacitor C1 and capacitor
C2 series connection, the DC filter capacitor are used for tri- level block stable DC side voltage of A-NPC, avoid voltage fluctuation.
Determine control system hardware configuration；
Control system hardware circuit is based on DSP and FPGA architecture, as shown in figure 3, including DSP master controller, FPGA auxiliary
Controller, photoelectric conversion and driving circuit；DSP master controller passes through voltage and current sampling and optical coupling isolation circuit and main circuit phase
Even, DSP master controller is connected with FPGA pilot controller by address bus and data/address bus, and FPGA pilot controller passes through electricity
Signal wire is connected with photoelectric conversion and driving circuit, and photoelectric conversion and driving circuit are connected by optical fiber with main circuit；
Control system hardware DSP master controller for the acquisition of current transformer voltage and current, coordinate transform, modulating wave export and with
Host computer information exchange；FPGA pilot controller generates for current transformer sinusoidal pulse width modulation, dead zone, protects signal processing, shape
State signal acquisition and exterior I O control；The driving signal and state of photoelectric conversion and driving circuit for current transformer protect signal
Photoelectric conversion, for being isolated for control system hardware and main circuit；
FPGA pilot controller also passes through acquisition current transformer operating status feedback and controls external IO, and exterior I O control includes
The control of AC/DC contactor on-off, the control of pre-charge contactor on-off, radiator fan start-up and shut-down control and indicator light control；
Control system hardware configuration is connected by RS232 interface with Monitor Computer Control System, and Monitor Computer Control System is based on
WINCE system and C# language realize, control signal that control system real-time reception Monitor Computer Control System issues, pid parameter and
Real time execution parameter requires that system parameter, real time execution operating condition and real-time voltage electric current is sent to adopt according to Monitor Computer Control System
Sample signal, the intelligent operation of Monitor Computer Control System real-time control current transformer.
Determine Control System Software strategy；
Wherein, Control System Software strategy includes active rectification control strategy based on DSP master controller and based on FPGA
Sinusoidal pulse width modulation strategy；
Wherein, the active rectification control strategy based on DSP master controller is double to current transformer using Direct Current Control mode
It is zero theoretical building software phase-lock loop according to three-phase balanced system instantaneous reactive voltage to cutting-in control；Control mode has monocycle
Control and double -loop control, the monocycle control is the control of ac output current ring, realizes AC side of converter constant current output；It is described
Double -loop control is outer loop control and inner loop control, and inner ring is ac output current ring, outer ring according to current transformer operating mode not
Together, selecting output AC power ring, DC output power ring, DC output voltage ring and average anode current ring is outer ring, from
And realize current transformer constant pressure, constant current, the control of invariable power different working modes；
As shown in figure 4, DSP master controller samples power grid three-phase voltage value uabc, PI arithmetic unit feedback is obtained through coordinate transform
It is worth reactive voltage component uq, System Reactive Power component of voltage given value uq *It is that the output of zero, PI arithmetic unit is calculated with close to calculating cycle
Obtained angle values θ0Subtract each other to obtain angle values θ this moment, angle values θ is as next calculating cycle angle values θ this moment0；
DSP master controller Sample AC side three-phase voltage current uabcAnd iabc, two cordic phase rotators are obtained through coordinate transform
It is lower active voltage ud, reactive voltage uq, watt current idWith reactive current iqComponent, the watt current of current transformer exchange output
id *The reactive current given value i of output is exchanged with current transformerq *, id *With watt current value of feedback idDifference and iq *With idle electricity
Flow value of feedback iqDifference after PI is adjusted, intermediate variable v is obtained by Feedforward Decoupling algorithmd、vq, to vd、vqDo coordinate contravariant
Get three-phase initial modulation waveform v in rotating coordinate system in returna0、vb0、vc0, residual voltage point is injected in three-phase initial modulation wave
Measure v0, to obtain three-phase modulations wave va、vb、vc, three-phase modulations waveform pass through respectively parallel bus send to FPGA assist control
Device；
As shown in figure 5, the sinusoidal pulse width modulation policy control FPGA pilot controller based on FPGA pilot controller receives
Respectively with upper carrier wave and lower carrier wave ratio compared with every tetra- tunnel phase bridge arm Ke get driving after the three-phase modulations wave sent to DSP master controller
Signal S1, S2, S3 and S4 drive switching tube Q1, Q2, Q3 and Q4 movement after dead zone adjusts, and upload when three-phase modulations wave is greater than
When wave, S1 is delayed through 4us, and output high level driving Q1 pipe is open-minded, and S3 exports low level driving Q3 pipe shutdown；When three-phase modulations wave
When less than upper carrier wave, S1 exports low level driving Q1 pipe shutdown, and S3 is open-minded through 4us delay output high level driving Q3 pipe；When three
When phase modulating wave is greater than lower carrier wave, S4 is delayed through 4us, and output high level driving Q4 pipe is open-minded, and S2 exports low level driving Q2 pipe and closes
It is disconnected；When three-phase modulations wave is less than lower carrier wave, S4 exports low level driving Q4 pipe shutdown, and S2 drives through 4us delay output high level
Dynamic Q2 pipe is open-minded, wherein Q1 and Q3 alternate conduction, Q2 and Q4 alternate conduction, when urgency signal or stopping signal generation, Q1, Q2
At once it turns off, Q3, Q4 delay 1us shutdown.
The present invention also provides a kind of three level energy accumulation current converters based on A-NPC topology, as shown in fig. 7, current transformer 200 wraps
It includes:
Main circuit 201；
Main circuit 201 includes: isolating transformer, LCL filter circuit, tri- level block of A-NPC and DC filter capacitor；Institute
Stating LCL filter circuit includes filter inductance L1, filter inductance L2 and filter capacitor C0, the isolating transformer and filter inductance L1
It is connected, filter inductance L2 exchanges side with tri- level block of A-NPC and is connected, tri- level block DC side of A-NPC and DC filtering electricity
Hold and is connected；
Control system hardware 202；
Control system hardware 202 is based on DSP and FPGA architecture, including DSP master controller, FPGA pilot controller, photoelectricity
Conversion and driving circuit；DSP master controller is sampled by voltage and current and optical coupling isolation circuit is connected with main circuit, DSP master control
Device processed is connected with FPGA pilot controller by address bus and data/address bus, and FPGA pilot controller passes through electrical signal line and light
Electricity conversion and driving circuit are connected, and photoelectric conversion and driving circuit are connected by optical fiber with main circuit；
Control System Software 203；
Control System Software 203 includes active rectification control strategy based on DSP master controller and based on the sine of FPGA
Pulsewidth modulation strategy；
Active rectification control strategy based on DSP master controller is two-way to current transformer grid-connected using Direct Current Control mode
Control is zero theoretical building software phase-lock loop according to three-phase balanced system instantaneous reactive voltage；
DSP master controller samples power grid three-phase voltage value uabc, PI arithmetic unit value of feedback reactive voltage is obtained through coordinate transform
Component uq, System Reactive Power component of voltage given value uq *The phase angle for being the output of zero, PI arithmetic unit and being calculated close to calculating cycle
Value θ0Subtract each other to obtain angle values θ this moment, angle values θ is as next calculating cycle angle values θ this moment0；
DSP master controller Sample AC side three-phase voltage current uabcAnd iabc, two cordic phase rotators are obtained through coordinate transform
It is lower active voltage ud, reactive voltage uq, watt current idWith reactive current iqComponent, the watt current of current transformer exchange output
id *The reactive current given value i of output is exchanged with current transformerq *, id *With watt current value of feedback idDifference and iq *With idle electricity
Flow value of feedback iqDifference after PI is adjusted, intermediate variable v is obtained by Feedforward Decoupling algorithmd、vq, to vd、vqDo coordinate contravariant
Get three-phase initial modulation waveform v in rotating coordinate system in returna0、vb0、vc0, residual voltage point is injected in three-phase initial modulation wave
Measure v0, to obtain three-phase modulations wave va、vb、vc, three-phase modulations waveform pass through respectively parallel bus send to FPGA assist control
Device；
Sinusoidal pulse width modulation policy control FPGA pilot controller based on FPGA pilot controller receives DSP main control
Respectively with upper carrier wave and lower carrier wave ratio compared with every phase bridge arm Ke get tetra- tunnel driving signal S1, S2, S3 after the three-phase modulations wave that device is sent
And S4, switching tube Q1, Q2, Q3 and Q4 movement are driven after dead zone adjusts, when three-phase modulations wave is greater than upper carrier wave, S1 is through 4us
Delay output high level driving Q1 pipe is open-minded, and S3 exports low level driving Q3 pipe shutdown；When three-phase modulations wave is less than upper carrier wave,
S1 exports low level driving Q1 pipe shutdown, and S3 is open-minded through 4us delay output high level driving Q3 pipe；Under three-phase modulations wave is greater than
When carrier wave, S4 is delayed through 4us, and output high level driving Q4 pipe is open-minded, and S2 exports low level driving Q2 pipe shutdown；Work as three-phase modulations
When wave is less than lower carrier wave, S4 exports low level driving Q4 pipe shutdown, and S2 is open-minded through 4us delay output high level driving Q2 pipe,
Middle Q1 and Q3 alternate conduction, Q2 and Q4 alternate conduction, when urgency signal or stopping signal generation, Q1, Q2 are turned off at once, Q3,
Q4 delay 1us shutdown.
The present invention is based on reverse blocking IGBT neutral-point-clamped three-level topology building energy accumulation current converter systems, it can be achieved that grid-connected fortune
Smooth voltage and current output under row operating condition, has the features such as high conversion efficiency, power factor are high, current harmonics is small.For dividing
Cloth energy-storage system and centralized energy-storage system, can reduce filter circuit inductor design value, thus reduce system overall dimensions with
Hoisting power density, convenient for energy-storage system miniaturization and modularized design；In addition the promotion of converter system power can increase storage
Energy system capacity utilization rate, so that the input cost of energy storage carrier is reduced, the Social benefit and economic benefit with energy-saving and emission-reduction.
Claims (10)
1. a kind of production method of the three level energy accumulation current converters based on A-NPC topology, which comprises
Determine the circuit structure of main circuit；
The circuit structure of the main circuit includes: isolating transformer, LCL filter circuit, tri- level block of A-NPC and DC filtering
Capacitor；The LCL filter circuit includes filter inductance L1, filter inductance L2 and filter capacitor C0, the isolating transformer and filter
Wave inductance L1 be connected, filter inductance L2 exchange with tri- level block of A-NPC side be connected, tri- level block DC side of A-NPC with directly
Filter capacitor is flowed to be connected；
Determine control system hardware configuration；
The control system hardware circuit is based on DSP and FPGA architecture, including DSP master controller, FPGA pilot controller, photoelectricity
Conversion and driving circuit；DSP master controller is sampled by voltage and current and optical coupling isolation circuit is connected with main circuit, DSP master control
Device processed is connected with FPGA pilot controller by address bus and data/address bus, and FPGA pilot controller passes through electrical signal line and light
Electricity conversion and driving circuit are connected, and photoelectric conversion and driving circuit are connected by optical fiber with main circuit；
Determine Control System Software strategy；
The Control System Software strategy includes active rectification control strategy based on DSP master controller and based on the sine of FPGA
Pulsewidth modulation strategy；
The active rectification control strategy based on DSP master controller is two-way to current transformer grid-connected using Direct Current Control mode
Control is zero theoretical building software phase-lock loop according to three-phase balanced system instantaneous reactive voltage；
DSP master controller samples power grid three-phase voltage value uabc, PI arithmetic unit value of feedback reactive voltage component is obtained through coordinate transform
uq, System Reactive Power component of voltage given value uq *The angle values θ for being the output of zero, PI arithmetic unit and being calculated close to calculating cycle0
Subtract each other to obtain angle values θ this moment, angle values θ is as next calculating cycle angle values θ this moment0；
DSP master controller Sample AC side three-phase voltage current uabcAnd iabc, obtained under two-phase rotating coordinate system through coordinate transform
Active voltage ud, reactive voltage uq, watt current idWith reactive current iqComponent, the watt current i of current transformer exchange outputd *With
The reactive current given value i of current transformer exchange outputq *, id *With watt current value of feedback idDifference and iq *It is anti-with reactive current
Feedback value iqDifference after PI is adjusted, intermediate variable v is obtained by Feedforward Decoupling algorithmd、vq, to vd、vqCoordinate inverse transformation is done to obtain
The three-phase initial modulation waveform v into rotating coordinate systema0、vb0、vc0, zero sequence voltage component v is injected in three-phase initial modulation wave0,
To obtain three-phase modulations wave va、vb、vc, three-phase modulations waveform passes through parallel bus respectively and send to FPGA pilot controller；
The sinusoidal pulse width modulation policy control FPGA pilot controller based on FPGA pilot controller receives DSP main control
Respectively with upper carrier wave and lower carrier wave ratio compared with every phase bridge arm Ke get tetra- tunnel driving signal S1, S2, S3 after the three-phase modulations wave that device is sent
And S4, switching tube Q1, Q2, Q3 and Q4 movement are driven after dead zone adjusts, when three-phase modulations wave is greater than upper carrier wave, S1 is through 4us
Delay output high level driving Q1 pipe is open-minded, and S3 exports low level driving Q3 pipe shutdown；When three-phase modulations wave is less than upper carrier wave,
S1 exports low level driving Q1 pipe shutdown, and S3 is open-minded through 4us delay output high level driving Q3 pipe；Under three-phase modulations wave is greater than
When carrier wave, S4 is delayed through 4us, and output high level driving Q4 pipe is open-minded, and S2 exports low level driving Q2 pipe shutdown；Work as three-phase modulations
When wave is less than lower carrier wave, S4 exports low level driving Q4 pipe shutdown, and S2 is open-minded through 4us delay output high level driving Q2 pipe,
Middle Q1 and Q3 alternate conduction, Q2 and Q4 alternate conduction, when urgency signal or stopping signal generation, Q1, Q2 are turned off at once, Q3,
Q4 delay 1us shutdown.
2. according to the method described in claim 1, the control mode has monocycle control and double -loop control, the monocycle control
It is the control of ac output current ring, realizes AC side of converter constant current output；The double -loop control is outer loop control and inner ring control
System, inner ring are ac output current ring, and outer ring selects output AC power ring, direct current according to the difference of current transformer operating mode
Output power ring, DC output voltage ring and average anode current ring are outer ring, to realize current transformer constant pressure, constant current, permanent function
The control of rate different working modes.
3. according to the method described in claim 1, the FPGA pilot controller also pass through acquisition current transformer operating status it is anti-
Feedback controls external IO.
4. according to the method described in claim 3, the exterior I O control includes the control of AC/DC contactor on-off, precharge
The control of contactor on-off, radiator fan start-up and shut-down control and indicator light control.
5. according to the method described in claim 1, in the main circuit isolating transformer to the progress of current transformer and power grid every
From and filter out triple-frequency harmonics；The isolating transformer selects Y/ △ type winding construction, and triangle flanks power grid, and star flanks LCL filter
Wave circuit；High impedance is presented to high fdrequency component in LCL filter, plays attenuation to higher harmonic current；DC filter capacitor
Including capacitor C1 and capacitor C2, capacitor C1 and capacitor C2 series connection, the DC filter capacitor are stablized for tri- level block of A-NPC
DC voltage avoids voltage fluctuation.
6. according to the method described in claim 1, the control system hardware DSP master controller is used for current transformer voltage and current
Acquisition, coordinate transform, modulating wave output and with host computer information exchange；FPGA pilot controller is used for current transformer sine pulsewidth tune
System, dead zone generate, protection signal processing, state signal collecting and exterior I O control；Photoelectric conversion and driving circuit are used for unsteady flow
The photoelectric conversion of driving signal and state the protection signal of device, for being isolated for control system hardware and main circuit.
7. according to the method described in claim 1, the control system hardware configuration passes through RS232 interface and ipc monitor
System is connected.
8. it is realized according to the method described in claim 7, the Monitor Computer Control System is based on WINCE system and C# language,
Control signal, pid parameter and the real time execution parameter that control system real-time reception Monitor Computer Control System issues, according to host computer
Monitoring system send system parameter, real time execution operating condition and real-time voltage current sampling signal on requiring.
9. according to the method described in claim 7, the intelligent operation of the Monitor Computer Control System real-time control current transformer.
10. a kind of three level energy accumulation current converters based on A-NPC topology, the current transformer include:
Main circuit；
The main circuit includes: isolating transformer, LCL filter circuit, tri- level block of A-NPC and DC filter capacitor；It is described
LCL filter circuit includes filter inductance L1, filter inductance L2 and filter capacitor C0, the isolating transformer and filter inductance L1 phase
Even, filter inductance L2 exchanges side with tri- level block of A-NPC and is connected, tri- level block DC side of A-NPC and DC filter capacitor
It is connected；
Control system hardware；
The control system hardware is based on DSP and FPGA architecture, including DSP master controller, FPGA pilot controller, photoelectric conversion
And driving circuit；DSP master controller is sampled by voltage and current and optical coupling isolation circuit is connected with main circuit, DSP master controller
It is connected with FPGA pilot controller by address bus and data/address bus, FPGA pilot controller is turned by electrical signal line and photoelectricity
It changes and driving circuit is connected, photoelectric conversion and driving circuit are connected by optical fiber with main circuit；
Control System Software；
The Control System Software includes the active rectification control strategy based on DSP master controller and the sinusoidal pulsewidth based on FPGA
Modulation strategy；
The active rectification control strategy based on DSP master controller is two-way to current transformer grid-connected using Direct Current Control mode
Control is zero theoretical building software phase-lock loop according to three-phase balanced system instantaneous reactive voltage；
DSP master controller samples power grid three-phase voltage value uabc, PI arithmetic unit value of feedback reactive voltage component is obtained through coordinate transform
uq, System Reactive Power component of voltage given value uq *The angle values θ for being the output of zero, PI arithmetic unit and being calculated close to calculating cycle0
Subtract each other to obtain angle values θ this moment, angle values θ is as next calculating cycle angle values θ this moment0；
DSP master controller Sample AC side three-phase voltage current uabcAnd iabc, obtained under two-phase rotating coordinate system through coordinate transform
Active voltage ud, reactive voltage uq, watt current idWith reactive current iqComponent, the watt current i of current transformer exchange outputd *With
The reactive current given value i of current transformer exchange outputq *, id *With watt current value of feedback idDifference and iq *It is anti-with reactive current
Feedback value iqDifference after PI is adjusted, intermediate variable v is obtained by Feedforward Decoupling algorithmd、vq, to vd、vqCoordinate inverse transformation is done to obtain
The three-phase initial modulation waveform v into rotating coordinate systema0、vb0、vc0, zero sequence voltage component v is injected in three-phase initial modulation wave0,
To obtain three-phase modulations wave va、vb、vc, three-phase modulations waveform passes through parallel bus respectively and send to FPGA pilot controller；
The sinusoidal pulse width modulation policy control FPGA pilot controller based on FPGA pilot controller receives DSP main control
Respectively with upper carrier wave and lower carrier wave ratio compared with every phase bridge arm Ke get tetra- tunnel driving signal S1, S2, S3 after the three-phase modulations wave that device is sent
And S4, switching tube Q1, Q2, Q3 and Q4 movement are driven after dead zone adjusts, when three-phase modulations wave is greater than upper carrier wave, S1 is through 4us
Delay output high level driving Q1 pipe is open-minded, and S3 exports low level driving Q3 pipe shutdown；When three-phase modulations wave is less than upper carrier wave,
S1 exports low level driving Q1 pipe shutdown, and S3 is open-minded through 4us delay output high level driving Q3 pipe；Under three-phase modulations wave is greater than
When carrier wave, S4 is delayed through 4us, and output high level driving Q4 pipe is open-minded, and S2 exports low level driving Q2 pipe shutdown；Work as three-phase modulations
When wave is less than lower carrier wave, S4 exports low level driving Q4 pipe shutdown, and S2 is open-minded through 4us delay output high level driving Q2 pipe,
Middle Q1 and Q3 alternate conduction, Q2 and Q4 alternate conduction, when urgency signal or stopping signal generation, Q1, Q2 are turned off at once, Q3,
Q4 delay 1us shutdown.
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