CN109143701A - A kind of liquid crystal display panel - Google Patents
A kind of liquid crystal display panel Download PDFInfo
- Publication number
- CN109143701A CN109143701A CN201810999666.0A CN201810999666A CN109143701A CN 109143701 A CN109143701 A CN 109143701A CN 201810999666 A CN201810999666 A CN 201810999666A CN 109143701 A CN109143701 A CN 109143701A
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- China
- Prior art keywords
- line
- resistance value
- route
- signal
- liquid crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
Abstract
The invention discloses a kind of liquid crystal display panels, including several for transmitting the signal transmission line of signal between driver and the pixel electrode of array substrate, the signal transmission line is located at the non-display area of array substrate, route is adjusted including the first signal line and the first resistance value, every first signal line is connected at least one the first resistance value adjustment routes, and in every signal transmission line, the sum of resistance value of first signal line and first resistance value connected in series adjustment route is identical.Each gate line resistance of the liquid crystal display panel is identical, and each source electrode line resistance is identical, when so that driving chip is to each pixel electrode input signal, all signals do not have deviation of signal when being sent to pixel electrode, it is consistent to be able to maintain signal, liquid crystal display panel shows homogeneity, and display quality is more preferable.
Description
Technical field
The present invention relates to field of display technology, more specifically, being related to a kind of liquid crystal display panel.
Background technique
Existing TFT (Thin Film Transistor, thin film transistor (TFT)) liquid crystal panel displays, each pixel by
It is controlled by a TFT switch, the grid of the TFT switch of each pixel, which links together, forms grid line, and source electrode links together
Form signal wire.When gating some pixel, applies voltage on the grid of TFT, so that TFT is entered on state, show simultaneously
Data are added on the source electrode of TFT by signal wire, by the TFT of conducting, are reached the drain electrode of TFT, are formed electric field in pixel, right
Liquid crystal material carries out charging and realizes display effect.
Grid, source electrode driving signal from liquid crystal display panel drive circuit chip output, be input to the grid of each pixel
Pole, source electrode and drain electrode.Each pixel is since the length of transmission signal line is inconsistent, so that the resistance of transmission signal line is not yet
Unanimously, the signal for causing driving control signal to be sent to each pixel unit influences the homogeneity shown there are deviation.
Summary of the invention
The invention patent technical problem to be solved is to overcome the deficiencies of the prior art and provide to be owned in a kind of panel
The resistance of same type signal transmission line is all the same and has the liquid crystal display panel of display homogeneity.
According to an aspect of the present invention, a kind of liquid crystal display panel is provided, including several are used in driver and array base
The signal transmission line of signal is transmitted between the pixel electrode of plate, the signal transmission line is located at the non-display of array substrate
Area, including the first signal line and the first resistance value adjust route, and every first signal line connects at least one the first
Resistance value adjusts route, and in every signal transmission line, first signal line and first resistance connected in series
The sum of the resistance value of value adjustment route is identical.
Preferably, first signal line is the grid line being electrically connected with gate electrode, or be electrically connected with source electrode
One of source electrode line.
Preferably, the signal transmission line further includes second signal route and the second resistance value adjustment route, described in every
Second signal route is connected at least one the second resistance value adjustment routes, and in every signal transmission line, and described second
The sum of the resistance value of signal line and the second resistance value connected in series adjustment route is identical, and the second signal route is the grid
The another kind different from first signal line in line, the source electrode line.
Preferably, the array substrate includes glass substrate and the grid line that is arranged on the glass substrate, institute
It states grid line and is divided at least two sections, one the first resistance value of series connection adjusts route between every two sections of adjacent grid lines.
Preferably, the array substrate further includes the insulating layer being arranged on the grid line and is arranged in the insulating layer
On protective layer.
Preferably, side of the protective layer far from the glass substrate is arranged in the first resistance value adjustment route, and
The resistance value adjustment route is electrically connected with the grid line by via hole realization.
Preferably, the array substrate further includes the source electrode being arranged between the insulating layer and the protective layer
Line, the source electrode line are divided at least two sections, and one the second resistance value of series connection adjusts route between every two sections of adjacent source electrode lines.
Preferably, side of the protective layer far from the glass substrate is arranged in the second resistance value adjustment route, and
The second resistance value adjustment route is electrically connected with the source electrode line by via hole realization.
Preferably, the material of the first resistance value adjustment route is tin indium oxide.
Preferably, the material of the second resistance value adjustment route is tin indium oxide.
The present invention provides a kind of liquid crystal display panel, each gate line resistance of the liquid crystal display panel is identical, each source electrode line electricity
Hinder identical, when so that driving chip is to each pixel electrode input signal, all signals do not have signal when being sent to pixel electrode
Deviation, is able to maintain that signal is consistent, and liquid crystal display panel shows homogeneity, and display quality is more preferable.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of liquid crystal display panel of the invention;
Fig. 2 is the structural schematic diagram of grid line series connection resistance value adjustment route of the invention;
Fig. 3 is the structural schematic diagram of source electrode line series connection resistance value adjustment route of the invention.
In figure:
10- glass substrate;
20- grid line;
30- insulating layer;
40- protective layer;
The first resistance value of 50- adjusts route;
50 '-the second resistance values adjust route;
60- source electrode line.
Specific embodiment
It is generated the problem to be solved by the present invention is that solving liquid crystal display panel since signal transmission line resistance is inconsistent
The problem of showing deviation.It elaborates below in conjunction with attached drawing to the embodiment of the present invention.
The liquid crystal panel structure of the present embodiment includes first substrate, driver, liquid crystal layer and the second substrate.Wherein the first base
Plate is array substrate, the array substrate include glass substrate and be sequentially arranged on glass substrate from bottom to top gate electrode, have
Active layer, insulating layer, drain electrode/source electrode, pixel electrode and protective layer;The second substrate is color membrane substrates, including another
Glass substrate and black matrix and color blocking and the PS (Photo Spacer, spacer column) in black matrix on glass substrate
Layer.
As shown in Figure 1 to Figure 3, array substrate includes glass substrate 10, grid line 20, insulating layer 30, source electrode line 60 and protects
Sheath 40, in the present embodiment, the liquid crystal display panel further include several for the pixel electrode in driver and array substrate
Between transmit the signal transmission line of signal, the signal transmission line is located at the non-display area of array substrate, including first believes
Number route and the first resistance value adjustment route 50 and second signal route and the second resistance value adjust route 50 '.
Wherein, every first signal line is connected at least one the first resistance value adjustment routes 50, and described in every
In signal transmission line, the sum of resistance value of first signal line and the resistance value connected in series adjustment route 50 is identical,
And every second signal route is connected at least one the second resistance value adjustment routes 50 ', and every signal transmission
In route, the sum of resistance value of the second signal route and the second resistance value connected in series adjustment route 50 ' is also identical.
It is understood that the array substrate of non-display area includes the grid line 20 and the source electrode line 60,
The grid line 20 is electrically connected with the gate electrode, can transmit signal to the gate electrode;The source electrode line 60 and the source
Electrode electrical connection can transmit signal to the source electrode.Therefore, first signal line is the grid line 20, or
One of described source electrode line 60, the second signal route be the grid line 20, in the source electrode line 60 with described first
The different another kind of signal line.
In conjunction with Fig. 1, it is preferably carried out mode as one kind, the driver sends control letter to the signal transmission line
Number, the driver is the gate drivers being electrically connected respectively with grid line 20 and the source drive being electrically connected with source electrode line 60
Device, it is to be understood that the driver also can be made an entirety.
When the driver sends control signal to the grid line 20 and source electrode line 60, the grid line 20 can be with
Transmission of control signals applies voltage on the gate electrode in array substrate, and array substrate is made to enter on state, i.e., source electrode and
Drain electrode conducting, while source electrode line 60 transmits signals in the source electrode of array substrate, by the array substrate of conducting, reaches battle array
The drain electrode of column substrate, forms electric field in pixel, carries out charging to liquid crystal material and realizes display effect.
It is preferably carried out mode as one kind, as shown in Fig. 2, the setting of the grid line 20 is in the glass substrate 10 and absolutely
Between edge layer 30, it is provided with the node of at least one disconnection on every grid line 20, the grid line 20 is divided at least
Two sections, and be not turned on mutually between the grid line 20 after disconnecting, by the insulating layer 30 by two sections of adjacent grid
Polar curve 20 separates.First resistance value of connecting between the every two sections adjacent grid lines 20 adjusts route 50, according to every
The resistance of grid line 20 described in item changes the electricity of first resistance value adjustment route 50 being connected in series corresponding with the grid line 20
Resistance can make the all-in resistance of all grid lines 20 and its first resistance value adjustment route 50 mutually contacted all the same.
It is preferably carried out mode as one kind, as shown in figure 3, the setting of the source electrode line 60 is in the insulating layer 30 and protection
Between layer 40, it is provided with the node of at least one disconnection on every source electrode line 60, the source electrode line 60 is divided at least two
Section, and be not turned on mutually between the source electrode line 60 after disconnecting, by the protective layer 40 by two sections of adjacent source electrodes
Line 60 separates.Second resistance value of connecting between the every two sections adjacent source electrode lines 60 adjusts route 50 ', according to every
The resistance of the source electrode line 60 changes the electricity of second resistance value adjustment route 50 ' being connected in series corresponding with the source electrode line 60
Resistance can make the all-in resistance of all source electrode lines 60 and its second resistance value adjustment route 50 ' mutually contacted all the same.
It is preferably carried out mode as one kind, the first resistance value adjustment route 50 and second resistance value adjust route
50 ' resistance method of adjustment is to change the length or cross-sectional area of route.
It is preferably carried out mode as one kind, the first resistance value adjustment route 50 can be with the direct phase of the grid line 20
Company forms access, but since grid line 20 is located at the inside of the non-display area of array substrate, and first resistance value is adjusted route
50 with the grid line 20 be connected directly when, also need by first resistance value adjustment route 50 be arranged in the array substrate
Inside, and due to the first resistance value adjustment route 50 it is different from the resistivity of grid line 20, occupied space is not also identical,
Required first resistance value adjustment route 50, therefore first resistance possibly can not be accommodated at the node of disconnection between grid line 20
Value adjusts route 50 and needs to be produced in different levels from the grid line 20, in the present embodiment, first resistance value
Adjustment route is produced on side of the protective layer 40 far from the glass substrate 10, the first resistance value adjustment route 50 and institute
It states and is electrically connected between grid line 20 by via hole.
It is understood that the source electrode line 60 is with second resistance value adjustment route 50 ' when connection forms access
It can meet and situation that when grid line 20 and first resistance value adjustment route 50 connect is identical.Therefore, second resistance
When value adjustment route 50 ' is connected with the source electrode line 60, also need second resistance value adjusting route 50 ' and the source electrode
Line 60 needs to be produced in different levels, and in the present embodiment, the second resistance value adjustment route 50 ' is produced on the guarantor
Side of the sheath 40 far from the glass substrate 10 passes through between the second resistance value adjustment route 50 ' and the source electrode line 60
Via hole electrical connection
Mode, the first resistance value adjustment route 50 of the present embodiment and the second resistance value tune are preferably carried out as one kind
The material of whole route 50 ' is electro-conductive glass (ITO, tin indium oxide), and first resistance value adjusts route 50 and described second
Resistance value adjustment route 50 ' is produced on the outside of the protective layer 40, and makes the material of the pixel electrode in the array substrate
It also is electro-conductive glass, so resistance value adjustment route can make together with the pixel electrode, without increasing manufacture craft,
Save cost of manufacture.
The present invention provides a kind of liquid crystal display panel, each gate line resistance of the liquid crystal display panel is identical, each source electrode line electricity
Hinder identical, when so that driving chip is to each pixel electrode input signal, all signals do not have signal when being sent to pixel electrode
Deviation, is able to maintain that signal is consistent, and liquid crystal display panel shows homogeneity, and display quality is more preferable.
The above is only the specific embodiment of the application, it is noted that for the ordinary skill people of the art
For member, under the premise of not departing from the application principle, several improvements and modifications can also be made, these improvements and modifications are also answered
It is considered as the protection scope of the application.
Claims (10)
1. a kind of liquid crystal display panel, which is characterized in that including several between driver and the pixel electrode of array substrate
The signal transmission line of signal is transmitted, the signal transmission line is located at the non-display area of array substrate, including the first signal wire
Road and the first resistance value adjustment route (50), every first signal line at least one the first resistance values of connect adjust route
(50), and in every signal transmission line, first signal line and first resistance value connected in series adjust line
The sum of the resistance value on road (50) is identical.
2. liquid crystal display panel according to claim 1, which is characterized in that first signal line is to be electrically connected with gate electrode
One of grid line (20), or the source electrode line (60) being electrically connected with source electrode.
3. liquid crystal display panel according to claim 2, which is characterized in that the signal transmission line further includes second signal line
Road and the second resistance value adjustment route (50 '), every second signal route at least one the second resistance values of connect adjust route
(50 '), and in every signal transmission line, the second signal route and the second resistance value connected in series adjust route
The sum of the resistance value of (50 ') is identical, the second signal route is the grid line (20), in the source electrode line (60) with described the
The different another kind of one signal line.
4. liquid crystal display panel according to claim 3, which is characterized in that the array substrate includes glass substrate (10) and sets
The grid line (20) on the glass substrate (10) is set, the grid line (20) is divided at least two sections, and every two sections adjacent
Grid line (20) between series connection one the first resistance value adjustment route (50).
5. liquid crystal display panel according to claim 4, which is characterized in that the array substrate further includes being arranged in the grid
Insulating layer (30) on line (20) and the protective layer (40) being arranged on the insulating layer.
6. liquid crystal display panel according to claim 5, which is characterized in that the first resistance value adjustment route (50) is arranged in institute
The side of protective layer (40) far from the glass substrate (10) is stated, and resistance value adjustment route passes through with the grid line (20)
Via hole realizes electrical connection.
7. liquid crystal display panel according to claim 5, which is characterized in that the array substrate further includes being arranged in the insulation
The source electrode line (60) between layer (30) and the protective layer (40), the source electrode line (60) are divided at least two sections, every two sections
Second resistance value of connecting between adjacent source electrode line (60) adjusts route (50 ').
8. liquid crystal display panel according to claim 7, which is characterized in that the second resistance value adjustment route (50 ') setting exists
Side of the protective layer (40) far from the glass substrate (10), and second resistance value adjustment route (50 ') and the source
Polar curve (60) is realized by via hole and is electrically connected.
9. liquid crystal display panel according to claim 6, which is characterized in that the material of first resistance value adjustment route (50) is
Tin indium oxide.
10. liquid crystal display panel according to claim 8, which is characterized in that the material of the second resistance value adjustment route (50 ')
For tin indium oxide.
Priority Applications (1)
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CN201810999666.0A CN109143701A (en) | 2018-08-30 | 2018-08-30 | A kind of liquid crystal display panel |
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CN201810999666.0A CN109143701A (en) | 2018-08-30 | 2018-08-30 | A kind of liquid crystal display panel |
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CN201810999666.0A Pending CN109143701A (en) | 2018-08-30 | 2018-08-30 | A kind of liquid crystal display panel |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2024000660A1 (en) * | 2022-06-30 | 2024-01-04 | 苏州华星光电技术有限公司 | Display apparatus |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6437764B1 (en) * | 1998-06-29 | 2002-08-20 | Hitachi, Ltd. | Liquid crystal display device |
JP2004070317A (en) * | 2002-08-07 | 2004-03-04 | Samsung Electronics Co Ltd | Liquid crystal display and driving integrated circuit used therefor |
CN1873483A (en) * | 2005-05-31 | 2006-12-06 | Lg.菲利浦Lcd株式会社 | Liquid crystal display device |
CN105607361A (en) * | 2015-12-30 | 2016-05-25 | 上海中航光电子有限公司 | Array substrate, display panel and display device |
CN106597713A (en) * | 2017-01-22 | 2017-04-26 | 厦门天马微电子有限公司 | Array substrate and display panel |
-
2018
- 2018-08-30 CN CN201810999666.0A patent/CN109143701A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6437764B1 (en) * | 1998-06-29 | 2002-08-20 | Hitachi, Ltd. | Liquid crystal display device |
JP2004070317A (en) * | 2002-08-07 | 2004-03-04 | Samsung Electronics Co Ltd | Liquid crystal display and driving integrated circuit used therefor |
CN1873483A (en) * | 2005-05-31 | 2006-12-06 | Lg.菲利浦Lcd株式会社 | Liquid crystal display device |
CN105607361A (en) * | 2015-12-30 | 2016-05-25 | 上海中航光电子有限公司 | Array substrate, display panel and display device |
CN106597713A (en) * | 2017-01-22 | 2017-04-26 | 厦门天马微电子有限公司 | Array substrate and display panel |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2024000660A1 (en) * | 2022-06-30 | 2024-01-04 | 苏州华星光电技术有限公司 | Display apparatus |
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CB02 | Change of applicant information |
Address after: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Applicant after: TCL Huaxing Photoelectric Technology Co.,Ltd. Address before: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Applicant before: Shenzhen China Star Optoelectronics Technology Co.,Ltd. |
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Application publication date: 20190104 |
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RJ01 | Rejection of invention patent application after publication |