TW201909147A - Pixel array and driving method - Google Patents

Abstract

A pixel array includes a plurality of data lines, scan lines and pixel units. The data lines are extended along a first direction and include a first data line. The scan lines are extended along a second direction and include a first scan line and a second scan line in a sequential order. A first pixel unit of the pixel units includes a first and a second pixel electrodes and a first and a second switch elements. The first switch element has a gate, a source and a drain. In the first switch element, the gate is coupled to a first scan line, the source is coupled to a first data line, and the drain is coupled to the first pixel electrode. The second switch element has a gate, a source and a drain. In the second switch element, the source is coupled to the first pixel electrode, the gate is coupled to a second scan line, and the drain is coupled to the second pixel electrode.

Description

 Pixel array and driving method  

The present disclosure is a display technology, and in particular, relates to a pixel array and driving method.

With the evolution of optoelectronics and semiconductor technology, the display panel has been booming. Among many displays, flat panel displays have recently been widely used, and replace cathode ray tube (CRT) displays as the mainstream of next generation displays. For example, the liquid crystal display panel is mainly composed of an active device array substrate, an opposite substrate, and a display medium layer sandwiched between the active device array substrate and the opposite substrate, wherein the active device array substrate has a plurality of array arrays. A pixel, and each pixel includes an active element and a pixel electrode electrically connected to the active element.

In order to have an aesthetic appearance and a special visual experience, a trend today is to make the display panel meet the design requirements of a narrow bezel. However, as the user's requirements for picture quality are getting higher and higher, and the resolution of the picture is getting higher and higher, the conductive lines disposed in the peripheral circuit area are also bound to be more and more difficult to achieve the design requirements of the narrow frame. Therefore, how to balance the quality of the display screen and the design requirements of the narrow bezel is a goal that those skilled in the art are eager to pursue.

One aspect of the present disclosure is to provide a pixel array comprising a plurality of data lines, a plurality of scan lines, and a plurality of pixel units. The data line extends in the first direction and includes the first data line. The scan line extends in the second direction and includes the first scan line and the second scan line in sequence. The second direction is different from the first direction. The first pixel unit of the pixel unit includes a first pixel electrode, a second pixel electrode, a first switching element, and a second switching element. The first switching element has a gate, a source and a drain. The gate of the first switching element is electrically coupled to the first scan line, the source of the first switching element is electrically coupled to the first data line, and the drain of the first switching element is electrically coupled to the first pixel electrode . The second switching element has a gate, a source and a drain. The source of the second switching element is electrically coupled to the first pixel electrode, and the gate of the second switching element is electrically coupled to the second scanning line. The second pixel electrode is electrically coupled to the drain of the second switching element.

Another aspect of the present disclosure is to provide a driving method for driving a pixel array. The driver method consists of the following steps. The pixel array is provided with a data line, a plurality of scan lines, and a plurality of pixel units, wherein the data lines extend in a first direction, and the scan lines extend in a second direction. The second direction is different from the first direction. One of the pixel units of the pixel unit includes a first pixel electrode, a second pixel electrode, a first switching element, and a second switching element. The second pixel electrode and the first pixel electrode are arranged in a first direction, and the second switching element and the first switching element are arranged in a first direction. The first switching element is electrically coupled to the first pixel electrode, and the second switching element is electrically coupled to the first pixel electrode and the second pixel electrode. A plurality of scan signals are provided to simultaneously turn on the first switching element and the second switching element. When the first switching element and the second switching element are turned on, the first data signal of the data line is transmitted to the second pixel electrode. The second switching element is turned off, and the second data signal of the data line is transmitted to the first pixel electrode.

In summary, the second switching element of the pixel array of the present disclosure is electrically coupled to the first pixel electrode for further electrical coupling to the first switching element without crossing the gate line. Therefore, when the gate line transmits a signal to the scan line, the potentials of the first pixel electrode and the second pixel electrode are not affected. In addition, the second switching element can be electrically coupled to the first pixel electrode via the via hole without being connected to the first switching element through other layer materials having a higher resistance value, thereby reducing the resistance of the cross pixel trace. value.

The above description will be described in detail in the following embodiments, and further explanation of the technical solutions of the present disclosure is provided.

100, 300, 400‧‧‧ pixel array

R1, R2‧‧‧ direction

Gn-1, Gn, Gn+1, Gn+2, G1~G6‧‧‧ scan lines

Tn, Tn+1, Tn+2, T1~T6‧‧‧ gate line

Dn, Dn+1, D1~D5‧‧‧ data line

V1~V3‧‧‧guide hole

110, 310~350, U‧‧‧ pixel unit

111, 112, 311~351, 312~352‧‧‧ pixel electrodes

M1, M2‧‧‧ switching components

11, 21‧‧ ‧ bungee

12, 22‧‧‧ source

13, 23‧‧ ‧ gate

AA’, BB’, CC’, DD’‧‧‧ segments

501, 504‧‧‧ metal layer

502, 506‧‧‧ insulation

503‧‧‧Semiconductor layer

507‧‧‧Transparent conductive layer

T1, t2, t3, t4‧‧‧ time

C1, C2‧‧‧

P1, P2‧‧‧ pixels

The above and other objects, features, advantages and embodiments of the present disclosure will be apparent from the accompanying drawings. FIG. 1A is a schematic diagram showing a pixel array of an embodiment of the present disclosure; 1B is a partially enlarged schematic view showing a first AA pixel array in an embodiment of the present disclosure; FIG. 1C is a cross-sectional view showing a 1B line AA'; and FIG. 1D is a 1B line segment. FIG. 1E is a cross-sectional view showing a line segment CC′ of FIG. 1B; FIG. 1F is a schematic cross-sectional view showing a line segment DD′ of FIG. 1B; FIG. 1G is a cross-sectional view showing an embodiment of the present disclosure. 2 is a schematic diagram of an equivalent pixel array corresponding to the embodiment shown in FIG. 1A; and FIG. 3 is a schematic diagram of the scanning line, the gate line and the data line; A schematic diagram of signal waveforms in an embodiment of the present disclosure.

The following disclosure provides many different embodiments or features for carrying out the invention. The disclosure may repeatedly recite numerical symbols and/or letters in the various examples, which are for simplicity and elaboration, and do not in themselves specify the relationship between the various embodiments and/or configurations in the following discussion.

In the scope of the embodiments and claims, "one" and "the" may mean a single or plural unless the context specifically dictates the articles. It will be further understood that the terms "comprising", "comprising", "comprising", and "the" One or more of its other features, regions, integers, steps, operations, elements, components, and/or groups thereof.

When an element is referred to as being "connected" or "coupled" to another element, it can be either directly connected or coupled to the other element or an additional element. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, no additional element is present.

As used herein, "about", "about" or "approximately" is generally within an error or range of about 20% of the index value, preferably within about 10%, and more preferably It is about five percent. Unless otherwise stated, the numerical values referred to are regarded as approximations, that is, the errors or ranges indicated by "about", "about" or "approximately".

Please refer to Figure 1A. 1A is a schematic diagram showing a pixel array 100 in accordance with an embodiment of the present disclosure. The pixel array 100 includes data lines Dn~Dn+1, scan lines Gn-1~Gn+1, and a plurality of pixel units (eg, pixel unit 110). The data lines Dn~Dn+1 extend in the first direction R1, the scan lines Gn-1~Gn+1 extend in the second direction R2, and the second direction R2 is different from the first direction R1. Also, the pixel array 100 may include a plurality of gate lines Tn~Tn+2. The gate lines Tn~Tn+2 extend in the first direction R1 and are spaced apart from the data lines Dn~Dn+1. The gate line Tn~Tn+2 is used to provide a plurality of scan signals (such as enable signals, disable signals) to scan lines Gn-1~Gn+2. In one embodiment, each of the pixel units described above is similar or identical to each other. The following is an example of the pixel unit 110 for convenience of explanation. The pixel unit 110 includes a first pixel electrode 111, a second pixel electrode 112, a first switching element M1, and a second switching element M2. The second pixel electrode 112 and the first pixel electrode 111 are arranged in the first direction R1, and the second switching element M2 and the first switching element M1 are arranged in the first direction R1.

For the connection between the first switching element M1 and the second switching element M2 and other elements, please refer to FIG. 1B. FIG. 1B is a partially enlarged schematic view showing the corresponding 1A pixel element array 100 in an embodiment of the present disclosure.

As shown in FIG. 1B, the first switching element M1 has a gate 13, a source 12 and a drain 11, and the second switching element M2 has a gate 23, a source 22 and a drain 21. The gate 13 of the first switching element M1 is electrically coupled to the nth scan line Gn, the source 12 of the first switching element M1 is electrically coupled to the nth data line Dn, and the drain 11 of the first switching element M1 is first. The via hole V1 is electrically coupled to the first pixel electrode 111 adjacent to one end of the nth scan line Gn. The source 22 of the second switching element M2 is electrically coupled to one end of the first pixel electrode 111 adjacent to the n+1th scan line Gn+1 via the second via hole V2, and the gate 23 of the second switching element M2 is electrically coupled. The first n+1 scan line Gn+1 is connected, and the drain 21 of the second switching element M2 is electrically coupled to the second pixel electrode 112 adjacent to one end of the n+1th scan line Gn+1 via the third via hole V3. It should be noted that the n+1th scan line Gn+1 is disposed between the first switching element M1 and the second switching element M2, and the source 22 of the second switching element M2 spans the n+1th scan line Gn+1 and The first pixel electrode 111 is electrically coupled through the second via hole V2.

The first switching element M1 is configured to drive the first pixel electrode 111 according to the data signal of the nth data line Dn, and the second switching element M2 is configured to drive the second pixel electrode 112 according to the data signal of the nth data line Dn. For example, in the first time, the nth scan line Gn transmits a enable signal to turn on the first switching element M1, and the first switching element M1 drives the first pixel electrode 111 according to the first data signal of the nth data line Dn. In the second time, the nth scan line Gn transmits the enable signal to turn on the first switching element M1, and the n+1th scan line Gn+1 transmits the enable signal to turn on the second switching element M2, and the second switch element M2 passes the first The pixel electrode 111 and the first switching element M1 receive the second data signal of the nth data line Dn, and drive the second pixel electrode 112 according to the second data signal of the nth data line Dn.

Please refer to FIG. 1C~1F, which shows the cross-sectional structure of the pixel array 100. Fig. 1C is a schematic cross-sectional view of the line AA' of Fig. 1B. The line segment AA' is located above the first switching element M1 of the pixel unit, the metal layer 501 is formed on the substrate (not shown) as the gate 13 and the nth scanning line Gn, and the insulating layer 502 is located on the metal layer 501 and the semiconductor layer. Between 503, the metal layer 504 is located on the semiconductor layer 503 to become the drain 11 and the source 12. The gate 13, the semiconductor layer 503, the drain 11 and the source 12 together form the first switching element M1, and the insulating layer 506 covers the drain. 11 and the source 12, the pixel electrode 111 is electrically coupled to the drain 11 via the first via hole V1. In some embodiments, the pixel electrode 111 may be composed of various materials having good conductivity and transparency, such as Indium tin oxide (ITO), Indium zinc oxide (IZO), and Indium zinc oxide. (Zinc oxide, ZnO) and the like.

Fig. 1D is a schematic cross-sectional view of the line BB' of Fig. 1B. The line segment BB' is located above the second switching element M2 of the pixel unit, the metal layer 501 functions as the gate 23 and the n+1th scanning line Gn+1, and the insulating layer 502 is located between the metal layer 501 and the semiconductor layer 503. The metal layer 504 Located on the semiconductor layer 503 as the drain 21 and the source 22, the gate 23, the semiconductor layer 503, the drain 21 and the source 22 together form the second switching element M2, and the insulating layer 506 covers the drain 21 and the source 22, the source The pole 22 is electrically coupled to the pixel electrode 111 via the second via hole V2, and the gate electrode 21 is electrically coupled to the pixel electrode via the third via hole V3. 112, that is, the signal of the first pixel electrode 111 is transmitted to the second pixel electrode 112 through the switching element M2 through the second via hole V2 and the third via hole V3.

Fig. 1E is a schematic cross-sectional view showing the line segment CC' of Fig. 1B. The line segment CC' is located above the nth data line Dn of the pixel unit, the metal layer 504 is formed on the insulating layer 502 as the data line Dn, the insulating layer 506 covers the data line Dn, and the transparent conductive layer 507 is covered as the pixel electrode 111 over the insulating layer. On 506.

Fig. 1F is a schematic cross-sectional view of the line segment DD' of Fig. 1B. The line segment DD' is located above the intersection of the gate line Tn of the pixel unit and the nth scan line Gn. The metal layer 501 is formed on the substrate (not shown) as the scan line Gn, and the metal layer 504 is coupled as the gate line Tn. The metal layer 501, the insulating layer 502 is located between the metal layer 501 and the metal layer 504, and the insulating layer 506 covers the metal layer 504. As described above, the gate and the scan line may be formed by the same metal layer 501, and the source, the drain, the data line, and the scan line may be formed by a metal layer 504. However, the description is merely illustrative and not intended to limit the present invention. The components can also be formed from different layers.

In addition, as described above, the present disclosure has a gate line for providing a scan signal (eg, enable signal, disable signal) to the scan line. As shown in FIG. 1G, the gate lines T1 to T6 are arranged at intervals from the data lines D1 to D5. The gate line T1 is used to provide a scan signal (such as an enable signal, a disable signal) to the scan line G1, the gate line T2 is used to provide a scan signal to the scan line G6, and the gate line T3 is used to provide a scan signal to the scan line. G3, the gate line T4 is used to provide a scan signal to the scan line G4, the gate line T5 is used to provide a scan signal to the scan line G5, and the gate line T6 is used to provide a scan signal to the scan line G2. However, the disclosure is not limited thereto. In one embodiment, the gate lines T1 to T6 from left to right sequentially provide scanning signals to the scanning lines G1 to G6 from top to bottom. In another embodiment, the gate lines from left to right sequentially provide scan signals to scan lines G6-G1 from bottom to top. Alternatively, in another embodiment, the gate lines from left to right sequentially provide scan signals to scan lines from top to bottom, and sequentially provide scan signals to scan lines from bottom to top.

In this way, the second switching element M2 is electrically coupled to the first pixel electrode 111 through the via hole V2 to be further electrically coupled to the first switching element M1 without crossing the gate lines Tn~Tn+2. Therefore, when the gate lines Tn to Tn+2 transmit signals to the scanning lines Gn-1 to Gn+1, the potentials of the first pixel electrode 111 and the second pixel electrode 112 are not affected. In addition, the second switching element M2 is electrically coupled to the first pixel electrode 111 via the via hole V2, and is not coupled to the first switching element M1 through other layer materials having a higher resistance value, thereby reducing cross-pixel pixels. The resistance of the trace.

In an embodiment, as shown in FIG. 2, the equivalent pixel circuit diagram of the pixel array 300 is shown. In the C1 row, the pixel units U (eg, 310, 330, 350) are in the first row. A pixel P1 (eg, 311, 331, 351) and a second pixel P2 (eg, 312, 332, 352) are arranged along the first direction R1. In line C2, the first pixel P1 (eg, 321, 341) and the second pixel P2 (eg, 322, 342) of each pixel unit U (eg, 320, 340) are along the first direction R1. Arranged at intervals. Here, the first pixel P1 means that its switching element M1 is directly connected to the data line D1, and the second pixel P2 means that its switching element M2 is coupled to the data line D1 via the first pixel P1. The two rows of pixel units D1 are located between the two rows of pixel units U, and the two rows of pixel units U are coupled to the data line D1 for receiving data lines. Driven by D1's data signal. In addition, in the second direction R2, the first pixel P1 and the second pixel P2 of each pixel unit U are staggered with each other, so that each of the first pixels P1 and the second pixels P2 in the pixel array 300 can be Arranged in a dot matrix, that is, any two first pixels P1 are not adjacent and any two second pixels P2 are not adjacent. For example, in the second direction R2, the first pixel electrode 331 of the pixel unit 330 is adjacent to the second pixel electrode 322 of the pixel unit 320, and the second pixel electrode 332 of the pixel unit 330 is connected to the pixel. The first pixel electrode 341 of unit 340 is adjacent. In the first direction R1, the first pixel electrode 331 of the pixel unit 330 is adjacent to the second pixel electrode 312 of the pixel unit 310, and the second pixel electrode 332 of the pixel unit 330 and the pixel unit 350 are A pixel electrode 351 is adjacent. It should be noted that since the first pixel P1 and the second pixel P2 of each pixel unit U are arranged along the first direction R1 and the second direction R2, the brightness can be averaged to enhance the display effect.

Regarding the driving method, referring to FIGS. 2 and 3 simultaneously, the first switching element M1 of the pixel unit 320 is controlled by the second scanning line G2, and the second switching element M2 of the pixel unit 320 is controlled by the third scanning line G3. . Taking the pixel unit 320 as an example, at time t1, the second scan line G2 and the third scan line G3 are simultaneously turned on, the first switching element M1 and the second switching element M2 are turned on, and the first data is turned on by the second switching element M2. The data signal of line D1 is transmitted to the second pixel electrode 322. Then, at time t2, the second scan line G2 is turned on and the third scan line G3 is turned off, the first switching element M1 is turned on and the second switching element M2 is turned off, and the data signal of the first data line D1 is transmitted by the first switching element M1. To the first pixel electrode 321 .

In one embodiment, the pixel array 300 can be driven in the following order. As shown in FIG. 3, during the time t1, the enable signal is transmitted through the second scan line G2 to turn on the first switching element M1 of the pixel unit 320, and the enable signal is transmitted through the third scan line G3 to turn on the pixel unit. The second switching element M2 of 320. When the first switching element M1 and the second switching element M2 of the pixel unit 320 are simultaneously turned on, the first switching element M1 and the second switching element M2 of the pixel unit 320 transmit the data signal of the first data line D1 to the picture. The second pixel electrode 322 of the element unit 320. Then, in time t2, the second scan line G2 continues to transmit the enable signal to turn on the first switching element M1 of the pixel unit 320, and transmits the disable signal through the third scan line G3 to turn off the second pixel unit 320. Switching element M2. When the first switching element M1 of the pixel unit 320 is turned on and the second switching element M2 is turned off, the first switching element M1 of the pixel unit 320 transmits the data signal of the first data line D1 to the first pixel unit 320. The pixel electrode 321 is. Then, the disable signal is transmitted through the second scan line G2 to turn off the first switching element M1 of the pixel unit 320. Therefore, the pixel unit 320 can be driven in the above manner.

The pixel unit 330 adjacent to the pixel unit D via the data line D1 can be driven in the following manner. During the time t3, the enable signal is transmitted through the third scan line G3 to turn on the first switching element M1 of the pixel unit 330, and the enable signal is transmitted through the fourth scan line G4 to turn on the second switching element M2 of the pixel unit 330. . When the first switching element M1 and the second switching element M2 of the pixel unit 330 are simultaneously turned on, the first switching element M1 and the second switching element M2 of the pixel unit 330 transmit the data signal of the first data line D1 to the picture. The second pixel electrode 332 of the element unit 330. Then, in time t4, the enable signal is transmitted through the third scan line G3 to turn on the first switching element M1 of the pixel unit 330, and the disable signal is transmitted through the fourth scan line G4 to turn off the second pixel unit 330. Switching element M2. When the first switching element M1 of the pixel unit 330 is turned on and the second switching element M2 is turned off, the first switching element M1 of the pixel unit 330 transmits the data signal of the first data line D1 to the first pixel unit 330. The pixel electrode 331. Then, the disable signal is transmitted through the third scan line G3 to turn off the first switching element M1 of the pixel unit 330.

In short, the enable signal is transmitted according to the second scan line G2, and the third scan line G3 transmits the enable signal (the data signal is transmitted to the second pixel electrode 322 of the pixel unit 320 at this time), and the third scan line G3 transmits The disable signal (the data signal is transmitted to the first pixel electrode 321 of the pixel unit 320 at this time), and the second scan line G2 transmits the sequence of the disable signal to drive the pixel unit 320 of the pixel array 300. And, the enable signal is transmitted according to the third scan line G3, the fourth scan line G4 transmits the enable signal (the data signal is transmitted to the second pixel electrode 332 of the pixel unit 330), and the fourth scan line G4 transmits the disable. The signal (the data signal is transmitted to the first pixel electrode 331 of the pixel unit 330 at this time), and the third scanning line G3 transmits the sequence of the disable signal to drive the pixel unit 330 of the pixel array 300.

Similarly, the pixel unit 340 adjacent to the pixel unit 330 can be driven in the following manner. The enable signal is transmitted through the fourth scan line G4 to turn on the first switching element M1 of the pixel unit 340, and the enable signal is transmitted through the fifth scan line G5 to turn on the second switching element M2 of the pixel unit 340. When the first switching element M1 and the second switching element M2 of the pixel unit 340 are simultaneously turned on, the first switching element M1 and the second switching element M2 of the pixel unit 340 transmit the data signal of the first data line D1 to the picture. The second pixel electrode 342 of the element unit 340. Then, the fourth scan line G4 continues to transmit the enable signal to turn on the first switching element M1 of the pixel unit 340, and transmits the disable signal through the fifth scan line G5 to turn off the second switching element M2 of the pixel unit 340. When the first switching element M1 of the pixel unit 340 is turned on and the second switching element M2 is turned off, the first switching element M1 of the pixel unit 340 transmits the data signal of the first data line D1 to the first of the pixel unit 340. The pixel electrode 341. Then, the disable signal is transmitted through the fourth scan line G4 to turn off the first switching element M1 of the pixel unit 340.

Similarly, the pixel unit 350 adjacent to the pixel unit 340 via the data line D1 can be driven in the following manner. The enable signal is transmitted through the fifth scan line G5 to turn on the first switching element M1 of the pixel unit 350, and the enable signal is transmitted through the sixth scan line G6 to turn on the second switching element M2 of the pixel unit 350. When the first switching element M1 and the second switching element M2 of the pixel unit 350 are simultaneously turned on, the first switching element M1 and the second switching element M2 of the pixel unit 350 transmit the data signal of the first data line D1 to the drawing. The second pixel electrode 352 of the element unit 350. Then, the enable signal is continuously transmitted through the fifth scan line G5 to turn on the first switching element M1 of the pixel unit 350, and the disable signal is transmitted through the sixth scan line G6 to turn off the second switching element M2 of the pixel unit 350. When the first switching element M1 of the pixel unit 350 is turned on and the second switching element M2 is turned off, the first switching element M1 of the pixel unit 350 transmits the data signal of the first data line D1 to the first of the pixel unit 350. The pixel electrode 351. Then, the disable signal is transmitted through the fifth scan line G5 to turn off the first switching element M1 of the pixel unit 350.

In summary, the second switching element M2 of the pixel array of the present disclosure is electrically coupled to the first pixel electrode 111 through the second via hole V2 to be further electrically coupled to the first switching element M1 without crossing the gate. Polar line Tn~Tn+2. Therefore, when the gate lines Tn to Tn+2 transmit signals to the scanning lines Gn-1 to Gn+1, the potentials of the first pixel electrode 111 and the second pixel electrode 112 are not affected. In addition, the second switching element M2 is electrically coupled to the first pixel electrode 111 via the second via hole V2 without being coupled to the first switching element M1 through other layer materials having a higher resistance value, thereby reducing cross-painting The resistance of the trace.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present case. Anyone skilled in the art can make various changes and refinements without departing from the spirit and scope of the case. Therefore, the scope of protection of this case is considered. The scope defined in the patent application is subject to change.

Claims (10)

 A pixel array includes: a plurality of data lines extending along a first direction and including a first data line; and a plurality of scan lines extending along a second direction, including a first scan line and a first a second scan line, wherein the second direction is different from the first direction; a plurality of pixel units, wherein a first pixel unit comprises: a first pixel electrode; a first switching element having a gate a source and a drain, the gate of the first switching element is electrically coupled to the first scan line, the source of the first switching element is electrically coupled to the first data line, the first switch The first switching element has a gate, a source and a drain, and the source of the second switching element is electrically coupled to the first a pixel electrode, the gate of the second switching element is electrically coupled to the second scan line, and a second pixel electrode electrically coupled to the drain of the second switching element.    The pixel array of claim 1, wherein the first switching elements of the pixel units are coupled to the first data line through the sources of the first switching elements, the plurality of pictures The prime unit includes a second pixel unit, the first pixel unit and the second pixel unit are respectively located on opposite sides of the first data line, wherein the second pixel unit comprises: a first pixel electrode; a first switching element having a gate, a source and a drain, the gate of the first switching element being electrically coupled to the second scan line, the source of the first switching element being electrically coupled The first data line, the drain of the first switching element is electrically coupled to the first pixel electrode; and the second switching element has a gate, a source and a drain, the second switching element The source is electrically coupled to the first pixel electrode, the gate of the second switching element is electrically coupled to a third scan line, and a second pixel electrode is electrically coupled to the second switch The bungee of the component.    The pixel array of claim 2, wherein the first pixel electrodes and the second pixel electrodes are spaced apart along the first direction.    The pixel array of claim 1, wherein the second scan line is disposed between the first pixel electrode and the second pixel electrode of the first pixel unit.    The pixel array of claim 1, further comprising: a plurality of gate lines extending along the first direction and spaced apart from the data lines along the second direction, the gate lines being electrically connected to the gate lines One of these scan lines.    The pixel array of claim 1, wherein the first switching element of the first pixel unit is located at an end of the first pixel unit adjacent to the first scanning line, the first The source of the second switching element of the pixel unit is electrically coupled to the other end of the first pixel electrode of the first pixel unit across the second scan line.    The pixel array of claim 2, wherein the third scan line is disposed between the first pixel electrode and the second pixel electrode of the second pixel unit.    The pixel array of claim 7, wherein the first switching element of the second pixel unit is located at an end of the second pixel unit adjacent to the second scanning line, the second The source of the second switching element of the pixel unit is electrically coupled to the other end of the first pixel electrode of the second pixel unit across the third scan line.    A driving method for driving a pixel array, wherein the driving method comprises: providing the pixel array: a data line, a plurality of scanning lines, and a plurality of pixel units, the data lines extending along a first direction, the data lines The scan line extends in a second direction, the second direction is different from the first direction, and one of the pixel units includes a first pixel electrode, a second pixel electrode, and a first switch An element and a second switching element, the second pixel electrode and the first pixel electrode are arranged along the first direction, and the second switching element and the first switching element are arranged along the first direction, the first switch An element is electrically coupled to the first pixel electrode, the second switching element is electrically coupled to the first pixel electrode and the second pixel electrode; and a plurality of scanning signals are provided to simultaneously turn on the first switching element and the a second switching element; when the first switching element and the second switching element are turned on, transmitting a first data signal of the data line to the second pixel electrode; and turning off the second switching element, and transmitting the One of the data lines The data signal is sent to the first pixel electrode.    The driving method of claim 9, wherein the first pixel electrodes and the second pixel electrodes are spaced apart from each other along the first direction, the driving method further comprises: providing a plurality of gates The gate lines extend along the first direction and are spaced apart from the data lines; and the plurality of scan signals are respectively provided to the scan lines by the gate lines.