CN109143251B - Pulse laser ranging time discriminator based on differential signals - Google Patents

Pulse laser ranging time discriminator based on differential signals Download PDF

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CN109143251B
CN109143251B CN201810851128.7A CN201810851128A CN109143251B CN 109143251 B CN109143251 B CN 109143251B CN 201810851128 A CN201810851128 A CN 201810851128A CN 109143251 B CN109143251 B CN 109143251B
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chip
differential
resistor
voltage comparison
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CN109143251A (en
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钱惟贤
蔡贵霞
顾国华
杨锦清
高青松
郭萍萍
朱琳
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Nanjing University of Science and Technology
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
    • G01S17/02—Systems using the reflection of electromagnetic waves other than radio waves
    • G01S17/06—Systems determining position data of a target
    • G01S17/08—Systems determining position data of a target for measuring distance only
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/483—Details of pulse systems
    • G01S7/486—Receivers
    • G01S7/4861—Circuits for detection, sampling, integration or read-out

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  • Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Electromagnetism (AREA)
  • Manipulation Of Pulses (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a pulse laser ranging time discriminator based on differential signals, which comprises a differential amplifying circuit (1) and a voltage comparison circuit (2) which are sequentially connected in series, wherein the differential amplifying circuit is used for amplifying the pulse laser ranging time discriminatorInput end of large circuit (1) and pulse input signal V i (t) is connected with the output end of the voltage comparison circuit (2), and the output end of the voltage comparison circuit (2) outputs a digital level signal V 0 (t). The pulse laser ranging time discriminator based on the differential signals has the advantages of good noise interference suppression, small temperature drift and high time discrimination precision.

Description

Pulse laser ranging time discriminator based on differential signals
Technical Field
The invention belongs to the technical field of pulse laser ranging equipment, and particularly relates to a pulse laser ranging moment discriminator based on differential signals, which has small time shaking error and high ranging precision.
Background
With the rapid development of national economy in the current society, the maintenance amount of automobiles is rapidly increased, and the safety problem of automobile driving is also more and more emphasized, so that the research is beginning to prevail around the periphery of intelligent transportation. The ranging system plays an important role in an intelligent traffic system, and accurate ranging is required for a reversing radar control system or a front collision avoidance system. The pulse laser uses a laser as a light source, uses laser as a carrier wave, measures a distance by detecting a time difference between a laser emission pulse and a laser echo pulse according to a time-of-flight principle, and generally adopts a time discrimination circuit in order to detect an arrival time of the laser echo pulse. However, in practical situations, the laser echo signal is easily interfered by objects such as smoke, dust, water vapor and the like in the air to be attenuated in the transmission process, so that the echo waveform is distorted and widened to different degrees, and the echo waveform is mainly expressed as time shaking, so that different differences can be generated at each identified moment. Meanwhile, the echo waveform is related to the detected target characteristics, even if the target is the same, the included angle between the target and the light path is different, the intensity of the echo is also different, so that the amplitude of the electric signal after photoelectric conversion changes along with the intensity change of the echo, and the different amplitudes generate difference in output time after passing through the time discrimination circuit, so that time jitter is caused.
The main time discrimination methods at present comprise fixed threshold time discrimination and two-channel time discrimination.
The fixed threshold time discrimination circuit outputs laser echo arrival time by comparing the laser echo pulse signal with the voltage of a certain given threshold, and the circuit is simple but is obviously influenced by time jitter caused by amplitude time play and interference.
The prior dual-channel time discriminator is a dual-channel time discriminator (application number: 201510200729.8, publication date: 2016.11.23) of Chinese patent, and comprises a threshold comparator, a high-speed comparator, a delay circuit, an attenuation circuit and a gate circuit. The circuit block diagram is shown in fig. 1. Problems with the above-described time discriminator include: 1. the circuit is complex; 2. although the two-channel time of day discrimination effectively addresses amplitude-time drift, the time jitter caused by noise interference has not been addressed. When a remote target is measured, echo pulses are weak, the signal to noise ratio is low, the influence of time jitter caused by interference is obvious, and the time discrimination precision is reduced.
Thus, the prior art has the following problems: the time discriminator has large time shaking error due to noise interference, so that the pulse laser ranging equipment has low ranging precision when measuring a remote target; there is also a temperature drift.
Disclosure of Invention
The invention aims to provide a pulse laser ranging time discriminator based on differential signals, which has the advantages of good noise interference suppression, small temperature drift and high time discrimination precision.
The technical solution for realizing the purpose of the invention is as follows:
a pulse laser ranging time discriminator based on differential signals comprises a differential amplifying circuit 1 and a voltage comparison circuit 2 which are sequentially connected in series, wherein the input end of the differential amplifying circuit 1 is connected with a pulse input signal V t (t)An output end of the voltage comparison circuit 2 is connected with an input end of the voltage comparison circuit 2, and an output end of the voltage comparison circuit 2 outputs a digital level signal V 0 (t)。
Preferably, the method comprises the steps of,
the differential amplifying circuit 1 comprises a differential amplifying chip U2, an input resistor Ri1, a first voltage dividing resistor Rfb1, a second voltage dividing resistor Rfb2, a first grounding resistor Ri2, a second grounding resistor Rs1, a first filter capacitor Cb5, a second filter capacitor Cocm, a third filter capacitor Cb6 and a fourth filter capacitor Cb7; the No. 2 port of the differential amplification chip U2 is connected with the pulse input signal V through the input resistor Ri1 t The port No. 1 of the differential amplification chip U2 is connected with the port No. 2 through a first voltage dividing resistor Rfb1, after the port No. 3 and the port No. 4 of the differential amplification chip U2 are connected, the differential amplification chip U2 is connected between a 5V power supply and a phase first filter capacitor Cb5, the other end of the first filter capacitor Cb5 is grounded, the port No. 5 of the differential amplification chip U2 is grounded through a second filter capacitor Cocm, the port No. 6 of the differential amplification chip U2 is grounded through a first grounding resistor Ri2 and a second grounding resistor Rs1 which are connected in series, the port No. 6 of the differential amplification chip U2 is also connected with the port No. 7 through a second voltage dividing resistor Rfb2, the port No. 8 of the differential amplification chip U2 is directly grounded, on the other hand, the port No. 9 of the differential amplification chip U2 is connected with the 5V power supply, on the other hand, the port No. 10 of the differential amplification chip U2 is also directly grounded through a third filter capacitor Cb 6; the No. 1 port of the differential amplification chip U2 is also used as an output negative terminal-OUT, and the No. 7 port of the differential amplification chip U2 is also used as an output positive terminal +OUT, and is respectively connected with the voltage comparison circuit 2.
Preferably, the method comprises the steps of,
the voltage comparison circuit 2 comprises a voltage comparison chip U3, first to sixth resistors R1, R2, R3, R5, R6 and a third filter capacitor C3; the port 1 of the voltage comparison chip U3 is connected with the positive output end +OUT of the port 7 of the differential amplification chip U2 through a fifth resistor R5, and the port 2 of the voltage comparison chip U3 is connected with the negative output end-OUT of the port 1 of the differential amplification chip U2 through a second resistor R2; the voltage comparison coreThe ports 3 and 4 of the sheet U3 are connected and then grounded, and the port 5 is directly grounded; the No. 6 port of the voltage comparison chip U3 is connected with the No. 1 port thereof through a first resistor R1 on one hand, and outputs a digital level signal V through an output resistor Ro+ on the other hand 0 (t); the port 7 of the voltage comparison chip U3 is connected with the port 2 thereof through a sixth resistor R6; the No. 8 port of the voltage comparison chip U3 is connected with a 5V power supply through a third resistor R3 on one hand, and is grounded through a third filter capacitor C3 on the other hand.
Compared with the prior art, the invention has the remarkable advantages that:
1. noise interference suppression is good: when differential signals are adopted, interference noise is equivalent and is simultaneously loaded on two signal lines, and the difference value is zero, so that noise interference is well restrained.
2. The temperature drift is small: the symmetry of the circuit parameters is exactly due to the ideal symmetry of the circuit parameters, the mutual compensation effect is achieved, and when the temperature changes, the current changes of the pipes are completely the same, so that the temperature drift can be equivalent to a common mode signal, the temperature drift is restrained, and the circuit is more reliable and stable.
The invention is described in further detail below with reference to the drawings and the detailed description.
Drawings
Fig. 1 is a functional block diagram of a prior art dual channel time of day discriminator.
Fig. 2 is a circuit diagram of the pulse laser ranging time discriminator based on differential signals of the present invention.
Fig. 3 is an input-output curve of the pulse laser ranging time discriminator based on differential signals according to the invention.
Detailed Description
As shown in FIG. 2, the pulse laser ranging time discriminator based on differential signals comprises a differential amplifying circuit 1 and a voltage comparison circuit 2 which are sequentially connected in series, wherein the input end of the differential amplifying circuit 1 is connected with a pulse input signal V t (t) is connected with the output end of the voltage comparison circuit 2, and the output end of the voltage comparison circuit 2 outputs a digital level signal V 0 (t)。
As shown in the left-hand part of figure 2,
the differential amplifying circuit 1 comprises a differential amplifying chip U2, an input resistor Ri1, a first voltage dividing resistor Rfb1, a second voltage dividing resistor Rfb2, a first grounding resistor Ri2, a second grounding resistor Rs1, a first filter capacitor Cb5, a second filter capacitor Cocm, a third filter capacitor Cb6 and a fourth filter capacitor Cb7;
the No. 2 port of the differential amplification chip U2 is connected with the pulse input signal V through the input resistor Ri1 t (t) the port No. 1 is connected with the port No. 2 through a first voltage dividing resistor Rfb1,
the ports 3 and 4 of the differential amplifying chip U2 are connected between a 5V power supply and a phase first filter capacitor Cb5, the other end of the first filter capacitor Cb5 is grounded,
the No. 5 port of the differential amplifying chip U2 is grounded through a second filter capacitor Cocm, the No. 6 port of the differential amplifying chip U2 is grounded through a first grounding resistor Ri2 and a second grounding resistor Rs1 which are connected in series, the No. 6 port of the differential amplifying chip U2 is also connected with the No. 7 port of the differential amplifying chip U2 through a second voltage dividing resistor Rfb2,
the No. 8 port of the differential amplification chip U2 is directly grounded on one hand, and is connected with the No. 9 port of the differential amplification chip U2 through a fourth filter capacitor Cb7 on the other hand, the No. 9 port of the differential amplification chip U2 is connected with a 5V power supply on the other hand, and is also connected with the No. 10 port of the differential amplification chip U2 through a third filter capacitor Cb6, and the No. 10 port of the differential amplification chip U2 is also directly grounded;
the No. 1 port of the differential amplification chip U2 is also used as an output negative terminal-OUT, and the No. 7 port of the differential amplification chip U2 is also used as an output positive terminal +OUT, and is respectively connected with the voltage comparison circuit 2.
As shown in the figure 2 of the drawings,
the No. 2 port of the differential amplification chip U2 is an input positive end +IN, the No. 6 port is an input negative end-IN, the No. 1 port is an output negative end-OUTN, the No. 7 port is an output positive end +OUT, the No. 3 port SHDN is connected with a 5V power supply to enable the differential amplification chip U2 to be IN a normal active working mode, the No. 4 port V+ and the No. 9 port V+ are positive power supply pins, the No. 8 port V+ and the No. 10 port V+ are negative power supply pins, the No. 5 port Vocm outputs a common mode reference voltage, and the No. 11 port V-is a bare gasket.
Preferably, the method comprises the steps of,
the differential amplification chip U2 is LTC6409.
As a preferred alternative to this,
the resistance value of the input resistor Ri1 is 25 ohms, the resistance value of the first voltage dividing resistor Rfb1 is 10 Kohms, the resistance value of the second voltage dividing resistor Rfb2 is 10 Kohms, the resistance value of the first grounding resistor Ri2 is 25 ohms, the resistance value of the second grounding resistor Rs1 is 68 ohms,
the capacity of the first and second filter capacitors Cb5 and Cocm is 0.1uf or 1nf, and the capacity of the third and fourth filter capacitors Cb6 and Cb7 is 0.1uf or 1nf.
As shown in the right-hand part of figure 2,
the voltage comparison circuit 2 comprises a voltage comparison chip U3, first to sixth resistors R1, R2, R3, R5, R6 and a third filter capacitor C3;
the port 1 of the voltage comparison chip U3 is connected with the positive output end +OUT of the port 7 of the differential amplification chip U2 through a fifth resistor R5, and the port 2 of the voltage comparison chip U3 is connected with the negative output end-OUT of the port 1 of the differential amplification chip U2 through a second resistor R2;
the ports 3 and 4 of the voltage comparison chip U3 are connected and then grounded, and the port 5 is directly grounded;
the No. 6 port of the voltage comparison chip U3 is connected with the No. 1 port thereof through a first resistor R1 on one hand, and outputs a digital level signal V through an output resistor Ro+ on the other hand 0 (t)；
The port 7 of the voltage comparison chip U3 is connected with the port 2 thereof through a sixth resistor R6;
the No. 8 port of the voltage comparison chip U3 is connected with a 5V power supply through a third resistor R3 on one hand, and is grounded through a third filter capacitor C3 on the other hand.
As shown in the figure 2 of the drawings,
the port 1 of the voltage comparison chip U3 is a positive receiving end INA+, INB+ of the differential signal, the port 2 and the port 4 are negative receiving ends INA-, INB-, of the differential signal, the port 5 is a grounding end GND, the port 6 and the port 7 of the voltage comparison chip U3 are output ports QB and QA of digital level signals, and the port 8 is an energizing port VCC.
Preferably, the method comprises the steps of,
the voltage comparison chip U3 is MAX961ESA.
As a preferred alternative to this,
the resistance values of the first resistor R1 and the sixth resistor R6 are 10 Kohms, the resistance values of the second resistor R2, the third resistor R3 and the fifth resistor R5 are 50 ohms, and the capacity of the third filter capacitor C3 is 0.1uf.
Fig. 3 is an input-output curve of the pulse laser ranging time discriminator based on differential signals according to the invention.
The following describes in detail the operation of the pulse laser ranging time discriminator based on differential signals with reference to fig. 2 and 3:
pulse input signal V of pulse laser echo signal after photoelectric device conversion and amplifying circuit t (t) passing through a differential amplifier LTC6409 and then converting the voltage signal into two differential signals OUT_N and OUT_P of equal amplitude, identical phase and opposite polarity. The output differential signals out_n and out_p convert the analog pulse signals into digital signals Vo (t) through the super-speed comparator MAX961ESA. The resistor Rs1 is an input compensation resistor, and the direct current common mode voltage can be changed by adjusting the resistance value of the resistor Rs 1. The added feedback resistors R1, R2, R5 and R6 can increase the hysteresis of the circuit and avoid the oscillation phenomenon of the circuit.
The signals are amplified by differential amplifier to output differential voltage signals, which are V respectively + And V - . The DC common mode voltage is changed by adjusting the impedance on the differential signal, and the DC rails of the differential signal are separated by a certain difference of about 50mV. Because the input signal will always jump back and forth between digital signals 0 and 1 due to the presence of noise if the dc rails are not separated. The differential voltage signal then enters a hysteresis comparator, and the output digital voltage V of the hysteresis comparator 0 (t) there are only two states, high level V OH And low level V OL . Before the curve crossing point of the differential signal line, V + Less than V - . If V 0 (t) is currently at low level V OL Then when curve V + Rising edge of greater than V th1 Value time. Output digital signal V 0 (t) from low level V OL Jump to high level V OH . The digital signal outputted thereafter remains high until the curve V + Is smaller than V th2 When in value, the digital signal V is output 0 (t) transitions from a high level to a low level. Because the value of the voltage comparison threshold is determined by the relative value of two curves at a certain moment of the differential signal line, when the circuit is affected by external noise or jitter, the external interference can be simultaneously on the two curves because the differential signal line is two curves with equal amplitude, same phase and opposite polarity, and the threshold is kept unchanged, and the circuit is still in the original level state. Therefore, the differential signal moment discrimination circuit has good noise interference suppression effect.
When differential signals are used, noise interference can be well suppressed because interference noise is generally equal and is simultaneously loaded on two signal lines, and the difference is zero. Meanwhile, the composition analysis of the differential amplifying circuit shows that the symmetry of circuit parameters plays a role in mutual compensation, and the temperature drift can be equivalent to a common mode signal due to the ideal symmetry of the circuit parameters and the identical current change of the tube during the temperature change, so that the temperature drift is restrained, and the differential amplifying circuit is more reliable and stable.

Claims (2)

1. A pulse laser ranging time discriminator based on differential signals comprises a differential amplifying circuit (1) and a voltage comparison circuit (2) which are sequentially connected in series, wherein the input end of the differential amplifying circuit (1) is connected with a pulse input signal V i (t) is connected with the output end of the voltage comparison circuit (2), and the output end of the voltage comparison circuit (2) outputs a digital level signal V 0 (t); the method is characterized in that:
the differential amplifying circuit (1) comprises a differential amplifying chip (U2), an input resistor (Ri 1), a first voltage dividing resistor (Rfb 1), a second voltage dividing resistor (Rfb 2), a first grounding resistor (Ri 2), a second grounding resistor (Rs 1), a first filter capacitor (Cb 5), a second filter capacitor (Cocm), a third filter capacitor (Cb 6) and a fourth filter capacitor (Cb 7);
the No. 2 port of the differential amplifying chip (U2) is connected with the pulse input signal V through an input resistor (Ri 1) i (t) the port No. 1 is connected with the port No. 2 through a first voltage dividing resistor (Rfb 1),
the 3, 4 number ports of the differential amplifying chip (U2) are connected, then connected between the 5V power supply and the phase first filter capacitor (Cb 5), the other end of the first filter capacitor (Cb 5) is grounded,
the No. 5 port of the differential amplifying chip (U2) is grounded through a second filter capacitor (Cocm), the No. 6 port of the differential amplifying chip (U2) is grounded through a first grounding resistor (Ri 2) and a second grounding resistor (Rs 1) which are connected in series, the No. 6 port of the differential amplifying chip (U2) is also connected with the No. 7 port of the differential amplifying chip through a second voltage dividing resistor (Rfb 2),
the No. 8 port of the differential amplification chip (U2) is directly grounded on one hand, and is connected with the No. 9 port of the differential amplification chip (U2) through a fourth filter capacitor (Cb 7), the No. 9 port of the differential amplification chip (U2) is connected with a 5V power supply on the other hand, and is also connected with the No. 10 port of the differential amplification chip (U2) through a third filter capacitor (Cb 6), and the No. 10 port of the differential amplification chip (U2) is also directly grounded;
the No. 1 port of the differential amplification chip (U2) is also used as an output negative terminal (-OUT), and the No. 7 port of the differential amplification chip is also used as an output positive terminal (+ OUT) and is respectively connected with the voltage comparison circuit (2);
the No. 2 port of the differential amplification chip (U2) is an input positive end (+IN), the No. 6 port is an input negative end (-IN), the No. 1 port is an output negative end (-OUTN), the No. 7 port is an output positive end (+OUT), the No. 3 port (SHDN) is connected with a 5V power supply to enable the differential amplification chip (U2) to be IN a normal active working mode, the No. 4 port (V+), the No. 9 port (V+) are positive power supply pins, the No. 8 port (V-), the No. 10 port (V+) are negative power supply pins, the No. 5 port (Vocm) outputs a common mode reference voltage, and the No. 11 port (V-) is a bare pad.
2. The time of day discriminator of claim 1, wherein:
the voltage comparison circuit (2) comprises a voltage comparison chip (U3), first to sixth resistors (R1, R2, R3, R5 and R6) and a third filter capacitor (C3);
the port 1 of the voltage comparison chip (U3) is connected with the positive output end (+OUT) of the port 7 of the differential amplification chip (U2) through a fifth resistor (R5), and the port 2 of the voltage comparison chip (U3) is connected with the negative output end (-OUT) of the port 1 of the differential amplification chip (U2) through a second resistor (R2);
the ports 3 and 4 of the voltage comparison chip (U3) are connected and then grounded, and the port 5 is directly grounded;
the No. 6 port of the voltage comparison chip (U3) is connected with the No. 1 port thereof through a first resistor (R1) on one hand, and outputs a digital level signal V through an output resistor (Ro+) on the other hand 0 (t)；
The port 7 of the voltage comparison chip (U3) is connected with the port 2 thereof through a sixth resistor (R6);
the No. 8 port of the voltage comparison chip (U3) is connected with a 5V power supply through a third resistor (R3) on one hand, and is grounded through a third filter capacitor (C3) on the other hand;
the port 1 and the port 3 of the voltage comparison chip (U3) are positive receiving ends (INA+, INB+) of differential signals, the port 2 and the port 4 are negative receiving ends (INA-, INB-) of the differential signals, the port 5 is a grounding end (GND), the port 6 and the port 7 of the voltage comparison chip (U3) are output ports (QB, QA) of digital level signals, and the port 8 is an energizing port (VCC).
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