CN109120247A

CN109120247A - A kind of burst pulse method for generation of low cost miniaturization

Info

Publication number: CN109120247A
Application number: CN201811007533.7A
Authority: CN
Inventors: 段发阶; 林昊然; 蒋佳佳; 傅骁; 李旭; 叶德超
Original assignee: Tianjin University
Current assignee: Tianjin University
Priority date: 2018-08-31
Filing date: 2018-08-31
Publication date: 2019-01-01

Abstract

The present invention relates to a kind of burst pulse method for generation of low cost miniaturization, used circuit, driving source, delay line module and XOR gate comparator including generating PWM pumping signal, it is characterized in that, the delay parameter of delay line module is determined according to the pulsewidth of required burst pulse, using PWM pumping signal as original signal, postpones signal and original signal by delay line module pass through XOR gate comparator, obtain the narrow pulse signal of final output.The present invention has the advantages that inexpensive stability is good.

Description

A kind of burst pulse method for generation of low cost miniaturization

Technical field

The invention belongs to electronic technology fields, are related to a kind of burst pulse method for generation of low cost miniaturization.

Background technique

Narrow pulse signal is suffered from many fields and is widely applied, such as pulse laser driving, step test, and pulsewidth Mostly in ns rank and following.Traditional burst pulse mode has the modes such as thyratron, snowslide pipe array and high-speed switch, but these sides The impulse waveform that method obtains is bad, and harmonic wave is larger, and the voltage amplitude having is high, is only applicable to driving laser device, universality It is not high.Also there is digital form simultaneously, such as uses FPGA, CPLD pulsing waveform, or the side using gate circuit race hazard Formula.But FPGA price is higher, and encapsulation is larger, does not have advantage in application less in channel and high volume requirement；CPLD then by In not built-in phaselocked loop, it is desirable that crystal oscillator frequency is higher, and as FPGA port number is less and application that volume requirement is high In there is no advantage；The scheme of gate circuit race hazard then depends on the delay time of gate circuit due to pulse width, has pulse The disadvantage of time stability, repeatability and interchangeability difference.Therefore, develop it is a kind of low cost miniaturization narrow pulse generating circuit be It is necessary to.

Summary of the invention

In view of the above-mentioned problems, high the purpose of the present invention is overcoming the deficiencies of the prior art and provide a kind of inexpensive stability Narrow pulse signal occur circuit, it is less for port number and require miniaturization application.Technical scheme is as follows:

A kind of burst pulse method for generation of low cost miniaturization, used circuit, including generating swashing for PWM pumping signal Encourage source, delay line module and XOR gate comparator, which is characterized in that delay line mould is determined according to the pulsewidth of required burst pulse The delay parameter of block, using PWM pumping signal as original signal, postpones signal and original signal by delay line module pass through exclusive or Door comparator, obtains the narrow pulse signal of final output.

Preferably, the delay line module uses the delay line chip with reference end, by using the ginseng of delay line Output is examined to eliminate drift error.

The present invention is directed to burst pulse method for generation, has the advantage that compared with prior art

(1) circuit system only includes two primary elements, at low cost and be easy to minimize；

(2) time delay device configuration flexibly, can satisfy all kinds of pulsewidth demands；

(3) system pulsewidth is stablized, and repetition rate is twice of input stimulus frequency, achievees the effect that frequency multiplication.

Detailed description of the invention

Fig. 1 is electrical block diagram of the invention.

Fig. 2 is timing diagram of the invention.

Fig. 3 is the electrical block diagram of accurate pulse width pulse generation in the present invention.

Fig. 4 is the electrical block diagram of combinatorial delays in the present invention.

Wherein, 1 is outer signals source forcing, and 2 be delay line module, and 3 be XOR gate comparator.

Specific embodiment

Of the invention is described in detail with reference to the accompanying drawings and examples.

Narrow pulse signal method for generation of the invention passes through ratio using the burst pulse method for generation of delay line and XOR gate Compared with the signal without postpones signal and by delay, narrow pulse signal is obtained.

A kind of burst pulse generating system, as shown in Figure 1,1 access delay wire module 2 of outside PWM driving source, by delay Signal and original signal pass through XOR gate 3, obtain the narrow pulse signal of final output.Wherein, the delay line module 2 uses delay Core piece, delay parameter are determined according to required pulse.As shown in Fig. 2, when input source is flipped, due to delay line Presence, another input signal of logic gate not yet overturns, the 3 output high level under XOR logic, remaining time then due to The identical output low level of both end voltage constitutes narrow pulse signal.In order to meet the requirement of output signal, the XOR gate output ginseng Number should be consistent with output narrow pulse signal relevant parameter is required.It can thus be appreciated that when the pulsewidth of output signal is the delay of delay line Between, repetition rate is twice of input stimulus source PWM frequency.In addition, the signal without delay in logic gate input is generally straight It connects and is obtained from signal source, in the case where requiring accurate pulsewidth, the delay line chip with reference end can be used and obtain arteries and veins Punching is exported by such as Fig. 3 using the reference of delay line to eliminate drift error.

For some applications for requiring SARS offset pulsewidth, can be connected by process control or hardware, tandem compound prolongs Value is the module of basic duration late, as shown in figure 4, obtaining the narrow pulse signal of required duration.

Claims

1. a kind of burst pulse method for generation of low cost miniaturization, used circuit, the excitation including generating PWM pumping signal Source, delay line module and XOR gate comparator, which is characterized in that delay line module is determined according to the pulsewidth of required burst pulse Delay parameter, using PWM pumping signal as original signal, postpones signal by delay line module and original signal pass through XOR gate Comparator obtains the narrow pulse signal of final output.

2. burst pulse method for generation according to claim 1, which is characterized in that the delay line module is used with ginseng The delay line chip for examining end is exported by using the reference of delay line to eliminate drift error.