CN109116209A - A kind of test method of silica-interface state density and capture interface - Google Patents

A kind of test method of silica-interface state density and capture interface Download PDF

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Publication number
CN109116209A
CN109116209A CN201810857480.1A CN201810857480A CN109116209A CN 109116209 A CN109116209 A CN 109116209A CN 201810857480 A CN201810857480 A CN 201810857480A CN 109116209 A CN109116209 A CN 109116209A
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interface
state density
interface state
capture
test method
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余学功
秦亚洲
胡泽晨
董鹏
崔灿
杨德仁
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Zhejiang University ZJU
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Zhejiang University ZJU
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor

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  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The invention discloses the test methods of a kind of silica-interface state density and capture interface, the following steps are included: (1) is in silicon chip surface single side growing silicon oxide film, then metallic film is grown on silicon oxide film surface, InGa solution finally is scraped on another surface of silicon wafer, and then the MIS structure device suitable for electrical testing is made;(2) capacitor transient stage test is carried out at different test temperature T, obtains variation of the capacitor in carrier emission process, and becoming charge density by conversion is NitTransient capacitance.To NitDerivation is carried out about time t, acquires the emission rate e of the charge under different test temperaturesp;(3) under the charge density that different test temperature T are obtained, make ln (ep/T2) function about 1/T, interface state density and capture cross-section are acquired with the distribution of energy level by slope and intercept respectively.Using the present invention, available capture cross-section and interface state density are widely used with the distribution of level of energy.

Description

A kind of test method of silica-interface state density and capture interface
Technical field
The invention belongs to technical field of semiconductors, more particularly, to a kind of silica-interface state density and capture interface Test method.
Background technique
With the reduction year by year of bandwidth, influence of the boundary defect for device macroscopic view electric property in device is by day It is increasingly acute.Silicon and silicon oxide interface defect are exactly one of defect type common in industrial production device, this is primarily due to oxygen SiClx is often used as grid oxygen or buries oxygen and be widely used in integrated circuit.Boundary defect can as carrier it is compound in The heart leads to the increase of leakage current, to increase the noise signal under silicon-based devices low frequency in the semiconductor device.Ambipolar Oxygen-silicon interface defect of burying in transistor then will lead to the increase of ground level leakage current, and then reduce gain coefficient, finally to collect At the failure of circuit.And in photovoltaic device, boundary defect can become deep level center and capture carrier, greatly affected Battery efficiency.
Therefore, sufficiently effective detection interfacial state just becomes more important with charge in insulating layer, for device performance The improvement of prediction and technique all has important science and actual production meaning.
It is well known that silica-silicon interface defect can introduce a series of continuously distributed energy levels in the forbidden band of silicon, and And on each energy level corresponding interface state density and capture cross-section and the variations of several orders of magnitude occurs.However, being widely used at present Correlative measurement method, including height-low frequency C/V test, deep level transient spectroscopy test cannot all obtain capture cross-section with can level The variation of distribution is set, but uses constant capture cross-section.Obviously, this is not inconsistent with practical situation.And this will further shadow Ring the accuracy to interface state density with energy level distribution tests result.
Therefore, it needs to find a kind of new effective test method at present, realizes silica-interface state density and capture The test method that section is distributed with energy level, this has great significance for understanding with the performance of modulation semiconductor components and devices.
Summary of the invention
The purpose of the present invention is to provide a kind of novel test methods, realize silica-interface state density and capture The test that section is distributed with energy level.
The present invention adopts the following technical scheme: a kind of silica-interface state density and capture cross-section test method, packet Include following steps:
(1) in silicon chip surface single side growing silicon oxide film, metallic film then is grown on silicon oxide film surface, finally InGa solution is scraped on another surface of silicon wafer, and then the MIS structure device suitable for electrical testing is made;;
(2) capacitor transient stage test is carried out at different test temperature T, obtains change of the capacitor in carrier emission process Change, becoming charge density by conversion is NitTransient capacitance.To NitDerivation is carried out about time t, is acquired in different test temperature Spend the emission rate e of lower chargep
(3) under the charge density that different test temperature T are obtained, make ln (ep/T2) function about 1/T, by slope and cut Away from acquiring interface state density and capture cross-section respectively with the distribution of energy level.
The main function of step (1) is: metal-oxygen SiClx-silicon needed for calculating interface state density and capture cross-section is made Structure MIS device.
Preferably, the resistivity of the silicon wafer is between 0.1-20 Ω .cm, conduction type n in step (1) Type or p-type.
Preferably, the growing method of the silicon oxide film on silicon wafer includes but is not limited to dry oxygen oxygen in step (1) Change, wet-oxygen oxidation, chemical sputtering method, atomic layer deposition method;Silicon oxide film with a thickness of 30-300nm.
Preferably, the metallic film type of MIS device includes but is not limited to gold, aluminium in step (1), thickness is situated between Between 50-100nm;The growing method of metallic film includes but is not limited to magnetron sputtering method, electron beam evaporation, thermal evaporation.
Preferably, temperature locating for the emission rate of charge in transient capacitance is tested in step (2) temperature and step (3) Degree need to be consistent, and be 100-400K.
In step (3), surface charge NitIt is acquired by following formula:
Wherein, A is the area of metallic film, and C is the structure capacitive measured, and q is elementary charge, V1And V2Being is SiO respectively2 The voltage of oxide layer and Si substrate, NaFor doping concentration in silicon, NfixRepresent the charge number in oxide layer, εSiO2And εSiRespectively SiO2The dielectric constant of oxide layer and Si, d1And dRThe respectively thickness of oxide layer and depletion layer.
In step (4), interface state density NTWith capture cross-section σpRelationship acquired by following formula:
Nit=Nit0+NT(EF0-ET)
Wherein, T is temperature, epFor charge emission rate, γ is trapping constant, and k is Boltzmann constant, ETIt is interfacial state Energy level, Nit0And EF0It is the charge density and fermi level under zero-bias.
The present invention proposes the measuring technology composed based on alternating temperature transient capacitance, realizes silica-interface state density and prisoner The test that section is distributed with energy level is obtained, can be used for the prediction of device performance and the improvement of technique.Compared to common High-low C/V test, deep level transient spectroscopy measuring technology test result are more accurate, and the operation of equipment is required it is lower, It is promoted the use of convenient for science and industrial circle.
Detailed description of the invention
Fig. 1 is flow diagram of the invention;
Fig. 2 is the MIS device energy band diagram of embodiment;
Fig. 3 is the MIS device transient capacitance of embodiment and the functional arrangement that surface charge changes over time;
Fig. 4 is the boundary defect density of states of embodiment and the variation diagram that capture cross-section is distributed with energy level.
Specific embodiment
Further detailed description is done to the present invention below in conjunction with Figure of description and specific embodiment.
As shown in Figure 1, the test method of a kind of silica-interface state density and capture interface, comprising the following steps:
(1) method for utilizing dry-oxygen oxidation grows the SiO of 100nm thickness on the p-type silicon chip surface that resistivity is 1 Ω .cm2 Film;Then, using the method for thermal evaporation in SiO2It is 1mm that surface, which grows area,2Aluminium film, and then aluminium-silica-silicon is made The energy band diagram of the MIS device of structure, corresponding MIS device is as shown in Figure 2.
(2) test that transient capacitance under different temperatures is carried out with DLTS obtains MIS device capacitor and interface charge with release The variation of time, for response curve as shown in figure 3, abscissa is the testing time, left ordinate is transient state interface charge density, and the right side is vertical Coordinate is transient capacitance value.Further, surface charge N is calculatedit, specific formula is as follows:
Wherein, A is the area of metallic film, and C is the structure capacitive measured, and q is elementary charge, V1And V2Being is SiO respectively2 The voltage of oxide layer and Si substrate, NaFor doping concentration in silicon, NfixRepresent the charge number in oxide layer, εSiO2And εSiRespectively SiO2The dielectric constant of oxide layer and Si, d1And dRThe respectively thickness of oxide layer and depletion layer.It is asked by the calculating of above three formula Obtain charge density Nit
(3) N that will be acquired in step (2)itMake the partial derivative about release time t, acquires MIS structure according to the following formula Interface state density NTWith capture cross-section σp
Nit=Nit0+NT(EF0-ET)
Wherein, T is temperature, epFor charge emission rate, γ is trapping constant, and k is Boltzmann constant, ETIt is interfacial state Energy level, Nit0And EF0It is the charge density and fermi level under zero-bias.
Interface state density N is acquired by above three formulaTWith capture cross-section σpWith the variation that energy level is distributed, as shown in Figure 4.
The interface state density and capture cross-section that the present invention obtains are greatly improved with the accuracy of energy level distribution tests result, can Prediction for carrying out device performance is studied and the improvement of technique.
The foregoing is merely preferred embodiments of the invention, are not intended to restrict the invention, for those skilled in the art For member, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any modification, It is within the scope of the present invention.

Claims (7)

1. the test method of a kind of silica-interface state density and capture interface, which comprises the following steps:
(1) in silicon chip surface single side growing silicon oxide film, metallic film then is grown on silicon oxide film surface, finally in silicon Another surface of piece scrapes InGa solution, and then the MIS structure device suitable for electrical testing is made;
(2) capacitor transient stage test is carried out at different test temperature T, obtains variation of the capacitor in carrier emission process, warp Crossing conversion to become charge density is NitTransient capacitance.To NitDerivation is carried out about time t, is acquired under different test temperatures The emission rate e of chargep
(3) under the charge density that different test temperature T are obtained, make ln (ep/T2) function about 1/T, by slope and intercept point Interface state density and capture cross-section are not acquired with the distribution of energy level.
2. the test method of silica according to claim 1-interface state density and capture interface, which is characterized in that In step (1), for the resistivity of the silicon wafer between 0.1-20 Ω .cm, conduction type is N-shaped or p-type.
3. the test method of silica according to claim 1-interface state density and capture interface, which is characterized in that In step (1), the silicon oxide film with a thickness of 30-300nm.
4. the test method of silica according to claim 1-interface state density and capture interface, which is characterized in that In step (1), the growing method of silicon oxide film includes but is not limited to dry-oxygen oxidation, wet-oxygen oxidation, chemical sputtering method.
5. the test method of silica according to claim 1-interface state density and capture interface, which is characterized in that In step (1), the type of the metallic film includes but is not limited to gold, aluminium, metallic film with a thickness of 50-100nm.
6. the test method of silica according to claim 1-interface state density and capture interface, which is characterized in that In step (1), the growing method of metallic film includes but is not limited to magnetron sputtering method, electron beam evaporation, thermal evaporation.
7. the test method of silica according to claim 1-interface state density and capture interface, which is characterized in that The range of test temperature T described in step (2) is between 100-400K.
CN201810857480.1A 2018-07-31 2018-07-31 A kind of test method of silica-interface state density and capture interface Withdrawn CN109116209A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111855704A (en) * 2020-07-28 2020-10-30 哈尔滨工业大学 Method for detecting ionization damage sensitive part of bipolar transistor
CN111884588A (en) * 2020-07-28 2020-11-03 上海大学 Method for measuring interface state of silicon-based specific photovoltaic device
CN112666438A (en) * 2019-09-30 2021-04-16 中国科学院半导体研究所 Sample preparation and optimization method for researching silicon carbide MOS interface state by using DLTS
CN114216939A (en) * 2021-12-14 2022-03-22 浙江大学杭州国际科创中心 Method and system for measuring defect state energy distribution of silicon carbide surface and storage medium
CN118011175A (en) * 2024-04-09 2024-05-10 北京智芯微电子科技有限公司 Method and system for analyzing defects of transistor device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112666438A (en) * 2019-09-30 2021-04-16 中国科学院半导体研究所 Sample preparation and optimization method for researching silicon carbide MOS interface state by using DLTS
CN112666438B (en) * 2019-09-30 2023-06-06 中国科学院半导体研究所 Sample preparation and optimization method for researching silicon carbide MOS interface state by DLTS
CN111855704A (en) * 2020-07-28 2020-10-30 哈尔滨工业大学 Method for detecting ionization damage sensitive part of bipolar transistor
CN111884588A (en) * 2020-07-28 2020-11-03 上海大学 Method for measuring interface state of silicon-based specific photovoltaic device
CN111855704B (en) * 2020-07-28 2024-01-12 哈尔滨工业大学 Method for detecting ionization damage sensitive part of bipolar transistor
CN114216939A (en) * 2021-12-14 2022-03-22 浙江大学杭州国际科创中心 Method and system for measuring defect state energy distribution of silicon carbide surface and storage medium
CN114216939B (en) * 2021-12-14 2024-01-30 浙江大学杭州国际科创中心 Silicon carbide surface defect state energy distribution measuring method, system and storage medium
CN118011175A (en) * 2024-04-09 2024-05-10 北京智芯微电子科技有限公司 Method and system for analyzing defects of transistor device

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