CN109061430A - The test method of interface state density and capture cross-section between a kind of semiconductor - Google Patents
The test method of interface state density and capture cross-section between a kind of semiconductor Download PDFInfo
- Publication number
- CN109061430A CN109061430A CN201810857911.4A CN201810857911A CN109061430A CN 109061430 A CN109061430 A CN 109061430A CN 201810857911 A CN201810857911 A CN 201810857911A CN 109061430 A CN109061430 A CN 109061430A
- Authority
- CN
- China
- Prior art keywords
- section
- capture cross
- interface state
- state density
- charge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
Abstract
The invention discloses the test methods of interface state density and capture cross-section between a kind of semiconductor, comprising the following steps: (1) grows homogeneity or heterogeneous semiconductive thin film on wafer surface, and then form homojunction or hetero-junctions;(2) after to metallic film is grown on above-mentioned homojunction or hetero-junctions, capacitor transient stage test is carried out at different test temperature T, is obtained variation of the capacitor in carrier emission process, is become charge N by conversionitTransient capacitance;(3) to above-mentioned charge NitAbout the derivation of time t, the emission rate e of the charge under different test temperatures is acquiredp;(4) under different charge density, make ln (ep/T2) function about 1/T, interface state density and capture cross-section are acquired with the distribution of energy level by slope and intercept respectively.Using the present invention, available capture cross-section and interface state density are widely used with the distribution of level of energy.
Description
Technical field
The invention belongs to technical field of semiconductors, more particularly, to interface state density between a kind of semiconductor and capture cross-section
Test method.
Background technique
With the continuous increase of die size, can have grown-in defects in 8 inches and 12 inches of silicon, reduce device at
Product rate;Simultaneously with the reduction year by year of bandwidth, requirement to silicon wafer is improving year by year again, therefore epitaxial silicon chip is due to can be with
It avoids grown-in defects and is used to improve the yield rate of large size chip and quality.
But the interface in epitaxial silicon chip can also have a boundary defect, boundary defect can as the complex centre of carrier,
Lead to the increase of leakage current, to increase the noise signal under silicon-based devices low frequency in the semiconductor device, results even in
The failure of integrated circuit.
Therefore, the variation of the interface state density and capture cross-section between sufficiently effective detection semiconductor becomes more to aggravate
It wants, the improvement of the prediction and technique for device performance all has important science and actual production meaning.
It is well known that the boundary defect between many semiconductors, includes but are not limited to silicon-silicon interface, it all can be in the taboo of silicon
A series of continuously distributed energy levels can be introduced in band, and on each energy level corresponding interface state density and capture cross-section and number occurs
The variation of a order of magnitude.
However, now widely used Correlative measurement method, including height-low frequency C/V test, deep level transient spectroscopy test are all
The variation that capture cross-section is distributed with level of energy cannot be obtained, but uses constant capture cross-section.Obviously, this and practical feelings
Shape is not inconsistent.And this will further influence interface state density with energy and the accuracy of distribution tests result.
Therefore, it needs to find a kind of new effective test method at present, realizes interface state density and capture between semiconductor
The test method that section is distributed with energy level, this has great significance for understanding with the performance of modulation semiconductor components and devices.
Summary of the invention
The purpose of the present invention is to provide a kind of novel test methods, realize interface state density and capture section between semiconductor
The test that face is distributed with energy level.
The present invention adopts the following technical scheme: between a kind of semiconductor interface state density and capture cross-section test method, packet
Include following steps:
(1) homogeneity or heterogeneous semiconductor (such as silicon, germanium) film are grown in semiconductor (such as silicon, germanium) sheet surface,
And then form homojunction or hetero-junctions;The wafer with a thickness of 300-800 μm, semiconductive thin film with a thickness of 2-20
μm;
(2) after to metal (such as gold, aluminium) film is grown on above-mentioned homojunction or hetero-junctions, at different test temperature T
Capacitor transient stage test is carried out, variation of the capacitor in carrier emission process is obtained, becomes charge N by conversionitTransient state electricity
Lotus;
(3) to above-mentioned charge NitAbout the derivation of time t, the emission rate e of the charge under different test temperatures is acquiredp;
(4) under different charge density, make ln (ep/T2) function about 1/T, boundary is acquired by slope and intercept respectively
The face density of states and capture cross-section with energy level distribution.
The main function of step (1) is: being made and calculates interface state density NTWith homojunction needed for capture cross-section σ or heterogeneous
Knot.
Preferably, the resistivity of the wafer is between 0.001-50 Ω .cm, conductive-type in step (1)
Type is N-shaped or p-type.
Preferably, the growing method of the semiconductive thin film of semiconductor film on piece is including but not limited to changed in step (1)
Learn vapour phase epitaxy method, metalorganic vapor phase epitaxy, liquid phase epitaxial method, molecular beam epitaxy, solid phase epitaxy, ion beam
Epitaxy;The conduction type of semiconductive thin film is N-shaped or p-type.
Therefore, growth semiconductive thin film in wafer surface can form homogeneity homotype knot, homogeneity abnormal shape knot, heterogeneous same
Four seed type of type knot or heterogeneous special-shaped knot.
Preferably, metallic film type includes but is not limited to gold, aluminium, and thickness is between 50-150nm in step (2)
Between;The growing method of metallic film includes but is not limited to magnetron sputtering method, electron beam evaporation method, thermal evaporation.
Preferably, temperature locating for the emission rate of charge in transient capacitance is tested in step (2) temperature and step (3)
Degree need to be consistent, and be 100-450K.
In step (3), surface charge NitIt is acquired by following formula:
Wherein, A is the area of metallic film, and C is the structure capacitive measured, and q is elementary charge, and V is the electricity on metallic film
Pressure, NAFor doping concentration in semiconductor substrate, NitRepresent the charge number in epitaxial layer, ε1For the dielectric constant of semiconductor substrate, d1
And dRThe respectively thickness of epitaxial layer and depletion layer.
In step (4), interface state density NTWith capture cross-section σpRelationship acquired by following formula:
Nit=Nit0+NT(EF0-ET)
Wherein, T is temperature, epFor charge emission rate, γ is trapping constant, and k is Boltzmann constant, ETIt is interfacial state
Energy level, Nit0And EF0It is the charge density and fermi level under zero-bias.
The present invention proposes the measuring technology composed based on alternating temperature transient capacitance, realizes interface state density and capture between semiconductor
The test that section is distributed with energy level can be used for the prediction of device performance and the improvement of technique.Compared to common height-
Low C/V test, deep level transient spectroscopy measuring technology test result are more accurate, and the operation of equipment is required it is lower, just
It is promoted the use of in science and industrial circle.
Detailed description of the invention
Fig. 1 is epitaxial growth p/p+ homojunction energy band diagram in the embodiment of the present invention;
Fig. 2 is the letter that epitaxial growth p/p+ homojunction transient capacitance and surface charge change over time in the embodiment of the present invention
Number figure;
Fig. 3 is the variation diagram that median surface of embodiment of the present invention defect state density and capture cross-section are distributed with energy level.
Specific embodiment
Further detailed description is done to the present invention below in conjunction with Figure of description and specific embodiment.
Embodiment 1
(1) method for utilizing Chemical Vapor-Phase Epitaxy, with a thickness of 600 μm, resistivity is outside the p-type silicon chip surface of 2 Ω .cm
Prolong 10 μm of growth thickness of p+ silicon thin film.Corresponding energy band diagram as shown in Figure 1, when upper figure and the following figure have respectively corresponded zero-bias with
And energy band situation when bias V > 0, wherein Ec is conduction band top, and Ev is valence band bottom, EFFor fermi level.It can from figure
Out, apply direct impulse voltage in gold thin film, charge can be injected in crystal boundary and fill donor state.Non-equilibrium hole in state
It needs by emitting hole under zero-bias come relaxation.
(2) the p+ silicon film surface vapor deposition area grown in above-mentioned homojunction using the method for thermal evaporation is 1mm2, thick
Degree is the gold thin film of 100nm, and the test of transient capacitance under different temperatures is carried out with DLTS, obtains homojunction transient capacitance and interface
Charge is with the variation of release time, and for corresponding curve as shown in Fig. 2, abscissa is the testing time, left ordinate is transient capacitance,
Right ordinate is charge density.
(3) further, surface charge N is calculatedit, specific formula is as follows:
Wherein, A is the area of metallic film, and C is the structure capacitive measured, and q is elementary charge, and V is the electricity on metallic film
Pressure, NAFor doping concentration in Si substrate, NitRepresent the charge number in epitaxial layer, εSiFor the dielectric constant of Si substrate, d1And dRPoint
Not Wei epitaxial layer and depletion layer thickness, ξ1-ξ2=0.06eV is the work function difference of gold and silicon, be can be neglected herein.
Charge density N is acquired by above-mentioned formula calculatingit。
(4) N that will be acquired in step (3)itMake the partial derivative about release time t, acquires MIS structure according to the following formula
Interface state density NTWith capture cross-section σp。
Nit=Nit0+NT(EF0-ET)
Wherein, T is temperature, ETIt is the energy level of interfacial state, Nit0And EF0It is the charge density and fermi level under zero-bias.
Interface state density N is acquired by above-mentioned formulaTWith capture cross-section σpWith the variation that energy level is distributed, as shown in Figure 3.
The interface state density and capture cross-section that the present invention obtains are greatly improved with the accuracy of energy level distribution tests result, can
Prediction for carrying out device performance is studied and the improvement of technique.
The foregoing is merely preferred embodiments of the invention, are not intended to restrict the invention, for those skilled in the art
For member, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any modification,
It is within the scope of the present invention.
Claims (7)
1. the test method of interface state density and capture cross-section between a kind of semiconductor, which comprises the following steps:
(1) homogeneity or heterogeneous semiconductive thin film are grown on wafer surface, and then forms homojunction or hetero-junctions;It is described
Wafer with a thickness of 300-800 μm, semiconductive thin film with a thickness of 2-20 μm;
(2) after to metallic film is grown on above-mentioned homojunction or hetero-junctions, capacitor transient stage survey is carried out at different test temperature T
Examination obtains variation of the capacitor in carrier emission process, becomes charge N by conversionitTransient charges;
(3) to above-mentioned charge NitAbout the derivation of time t, the emission rate e of the charge under different test temperatures is acquiredp;
(4) under different charge density, make ln (ep/T2) function about 1/T, interfacial state is acquired by slope and intercept respectively
Density and capture cross-section with energy level distribution.
2. the test method of interface state density and capture cross-section between semiconductor according to claim 1, which is characterized in that step
Suddenly in (1), the type of the wafer includes but is not limited to silicon, germanium, and resistivity is 0.001-50 Ω .cm, conductive-type
Type is N-shaped or p-type.
3. the test method of interface state density and capture cross-section between semiconductor according to claim 1, which is characterized in that step
Suddenly in (1), the type of the semiconductive thin film includes but is not limited to silicon, germanium, and conduction type is N-shaped or p-type.
4. the test method of interface state density and capture cross-section between semiconductor according to claim 1, which is characterized in that step
Suddenly in (1), the growing method of semiconductive thin film includes but is not limited to Chemical Vapor-Phase Epitaxy method, metal organic chemical vapor deposition
Method, liquid phase epitaxial method, molecular beam epitaxy, solid phase epitaxy, ion beam epitaxy.
5. the test method of interface state density and capture cross-section between semiconductor according to claim 1, which is characterized in that step
Suddenly in (2), the type of the metallic film includes but is not limited to gold, aluminium, metallic film with a thickness of 50-150nm.
6. the test method of interface state density and capture cross-section between semiconductor according to claim 1, which is characterized in that step
Suddenly in (2), the growing method of metallic film includes but is not limited to magnetron sputtering method, electron beam evaporation method, thermal evaporation.
7. the test method of interface state density and capture cross-section between semiconductor according to claim 1, which is characterized in that step
Suddenly the range of test temperature T described in (2) is between 100-450K.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810857911.4A CN109061430A (en) | 2018-07-31 | 2018-07-31 | The test method of interface state density and capture cross-section between a kind of semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810857911.4A CN109061430A (en) | 2018-07-31 | 2018-07-31 | The test method of interface state density and capture cross-section between a kind of semiconductor |
Publications (1)
Publication Number | Publication Date |
---|---|
CN109061430A true CN109061430A (en) | 2018-12-21 |
Family
ID=64831952
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810857911.4A Withdrawn CN109061430A (en) | 2018-07-31 | 2018-07-31 | The test method of interface state density and capture cross-section between a kind of semiconductor |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109061430A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111856237A (en) * | 2020-07-28 | 2020-10-30 | 哈尔滨工业大学 | Deep energy level transient spectrum testing method and device and storage medium |
CN111855704A (en) * | 2020-07-28 | 2020-10-30 | 哈尔滨工业大学 | Method for detecting ionization damage sensitive part of bipolar transistor |
CN114216939A (en) * | 2021-12-14 | 2022-03-22 | 浙江大学杭州国际科创中心 | Method and system for measuring defect state energy distribution of silicon carbide surface and storage medium |
-
2018
- 2018-07-31 CN CN201810857911.4A patent/CN109061430A/en not_active Withdrawn
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111856237A (en) * | 2020-07-28 | 2020-10-30 | 哈尔滨工业大学 | Deep energy level transient spectrum testing method and device and storage medium |
CN111855704A (en) * | 2020-07-28 | 2020-10-30 | 哈尔滨工业大学 | Method for detecting ionization damage sensitive part of bipolar transistor |
CN111856237B (en) * | 2020-07-28 | 2022-09-13 | 哈尔滨工业大学 | Deep energy level transient spectrum testing method and device and storage medium |
CN111855704B (en) * | 2020-07-28 | 2024-01-12 | 哈尔滨工业大学 | Method for detecting ionization damage sensitive part of bipolar transistor |
CN114216939A (en) * | 2021-12-14 | 2022-03-22 | 浙江大学杭州国际科创中心 | Method and system for measuring defect state energy distribution of silicon carbide surface and storage medium |
CN114216939B (en) * | 2021-12-14 | 2024-01-30 | 浙江大学杭州国际科创中心 | Silicon carbide surface defect state energy distribution measuring method, system and storage medium |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Rao et al. | 85–440 K temperature sensor based on a 4H-SiC Schottky diode | |
CN109061430A (en) | The test method of interface state density and capture cross-section between a kind of semiconductor | |
CN109116209A (en) | A kind of test method of silica-interface state density and capture interface | |
Voitsekhovskii et al. | Hysteresis phenomena in MIS structures based on graded-gap MBE HgCdTe with a two-layer plasma-chemical insulator SiO 2/Si 3 N 4 | |
US5943552A (en) | Schottky metal detection method | |
Zubkov et al. | Temperature admittance spectroscopy of boron doped chemical vapor deposition diamond | |
Brezeanu et al. | High temperature sensors based on silicon carbide (SiC) devices | |
Boutchich et al. | Amorphous silicon diamond based heterojunctions with high rectification ratio | |
Voitsekhovskii et al. | Differential Resistance of Space Charge Region in MIS Structures Based on Graded-Gap MBE n-Hg 1–x Cd x Te (x= 0.23) in a Wide Temperature Range | |
CN109085486A (en) | A kind of test method of the semiconductor-insulator interface density of states and capture cross-section | |
Khosa et al. | Electrical properties of 4H-SiC MIS capacitors with AlN gate dielectric grown by MOCVD | |
Nanver et al. | Test structures without metal contacts for DC measurement of 2D-materials deposited on silicon | |
CN111900097B (en) | Method for detecting deep energy level defect state in wide bandgap semiconductor | |
Voitsekhovskii et al. | Special Features of Admittance in Mis Structures Based on Graded-Gap MBE n-Hg 1–x Cd x Te (x= 0.31–0.32) in a Temperature Range OF 8–300 K | |
Voitsekhovskii et al. | Peculiarities of Determining the Dopant Concentration in the Near-Surface Layer of a Semiconductor by Measuring the Admittance of MIS Structures Based on P-Hg 0.78 Cd 0.22 Te Grown by Molecular Beam Epitaxy | |
CN110783218B (en) | Triaxial type test method for doping concentration of silicon carbide epitaxial wafer | |
Mannan | Defect characterization of 4H-SiC by deep level transient spectroscopy (DLTS) and influence of defects on device performance | |
Voitsekhovskii et al. | Admittance in MIS Structures Based on Graded-GAP MBE p-Hg 1–х Cd х Te (x= 0.22–0.23) in the Strong Inversion Mode | |
Sidorov et al. | Effect of Surface Treatment on the Charge Density at the Interface between GdHgTe Epitaxial Films and Al O Grown by Atomic Layer Deposition | |
Matsushima et al. | Suppression of charge accumulation on termination area of 4H-SiC power devices | |
Yamada et al. | Search for midgap levels in 3C-SiC grown on Si substrates | |
Brezeanu et al. | Schottky diode on Silicon Carbide (SiC): ideal detector for very wide temperature range sensors | |
US20230050640A1 (en) | Wide-bandgap semiconductor layer characterization | |
Nguyen et al. | Investigation of 12 μm 4H-SiC epilayers for radiation detection and noise analysis of front-end readout electronics | |
Sumesh et al. | Specific contact resistance at In-nMoSe 2 interfaces |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WW01 | Invention patent application withdrawn after publication |
Application publication date: 20181221 |
|
WW01 | Invention patent application withdrawn after publication |