CN109067675A - A kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter - Google Patents

A kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter Download PDF

Info

Publication number
CN109067675A
CN109067675A CN201810796495.1A CN201810796495A CN109067675A CN 109067675 A CN109067675 A CN 109067675A CN 201810796495 A CN201810796495 A CN 201810796495A CN 109067675 A CN109067675 A CN 109067675A
Authority
CN
China
Prior art keywords
level
preshoot
power consumption
channel equalization
pseudo
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201810796495.1A
Other languages
Chinese (zh)
Inventor
唐枋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chongqing Core Technology Co Ltd In Pai
Original Assignee
Chongqing Core Technology Co Ltd In Pai
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chongqing Core Technology Co Ltd In Pai filed Critical Chongqing Core Technology Co Ltd In Pai
Priority to CN201810796495.1A priority Critical patent/CN109067675A/en
Publication of CN109067675A publication Critical patent/CN109067675A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03248—Arrangements for operating in conjunction with other apparatus
    • H04L25/03254—Operation with other circuitry for removing intersymbol interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03248—Arrangements for operating in conjunction with other apparatus
    • H04L25/03254—Operation with other circuitry for removing intersymbol interference
    • H04L25/03261—Operation with other circuitry for removing intersymbol interference with impulse-response shortening filters

Abstract

The invention discloses a kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitters；This patent in transmitting terminal using postemphasising (de-emphasis) and realize the technology of channel equalization by way of preshoot (preshoot) combines；The design uses the technology of pseudo-differential channel equalization by the transmitting terminal for interconnecting transmitter in high speed serialization to reach and reduce power consumption and the elimination serious intersymbol interference problem as caused by high frequency attenuation.

Description

A kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter
Technical field
The present invention relates to a kind of designs of low-power consumption pseudo-differential channel equalization circuit, are especially a kind of low-power consumption pseudo-differential letter Trace equalization high speed serialization transmitter.
Background technique
Digital signal, since channel transfer characteristic is undesirable and the influence of interchannel noise, connects when actual channel is transmitted Mistake inevitably occurs for the signal that receiving end receives.In order to restore the data information sent, receiving end needs to estimate letter The characteristic in road, and the data received are corrected.
A usual high-speed serial communication system structure is by parallel serial conversion module, code modulation module, transmitting terminal equilibrium model Block is constituted.As shown in Figure 1.
The balanced core component as high-speed serial communication system, the main problem faced in Equalization Design at present are balanced The determination of coefficient and the formulation of joint equalization strategy.
The finite bandwidth of channel and other nonideal responses cause receiving end signal to be distorted, and largely limit data The raising of transmission frequency and the growth of transmission range, the introducing of balancing technique are exactly the non-ideal effects in order to offset channel, solution Certainly high-frequency loss caused by channel.
It is FFE in the common balancing technique of transmitting terminal, is realized using the finite impulse response filter of multi-tap, by pre- It aggravates signal after the jump first symbol amplitude and pre-distortion is carried out to signal, caused by multichannel high-frequency decaying can be eliminated Forward position overcharges and rear edge hangover, or realizes equilibrium using deweighting technique.
One typical FFE is as shown in Figure 2.It is made of 3 parts: delay, adds up at weighting.Box represents delay circuit, T is delay time, and W is weighting coefficient.Transmitting terminal is by encoding with the signal x (k) after pulse-shaping by delay and each pumping It is sent into after accumulator is added after head weighting and is used as final output signal y (k).Time-domain expression are as follows:Pass through choosing Selecting tap coefficient W appropriate can make balanced device have high pass characteristic, to resist the decaying of channel bring.
In high speed transmission of signals, high fdrequency component decaying, the transmission line more much larger than the decaying of low frequency component of signal The characteristic showed is as a low-pass filter.The radio-frequency component decaying of signal is big in transmission process, and low-frequency component decaying is small. The thought of pre-emphasis technique is exactly the radio-frequency component in the beginning of transmission line enhancing signal, to compensate high fdrequency component in transmission process In excessive decaying.The height of signal frequency is mainly to be determined by the speed of signal level variation, so the high frequency division of signal Amount mainly appears on the rising edge and falling edge of signal, and pre-emphasis technique is exactly the width for enhancing signal rising edge and falling edge Degree.As shown in Figure 3.
The thought of deweighting technique is similar with pre-emphasis technique, and only implementation method is different.Preemphasis is increased on signal The amplitude on edge and falling edge is risen, amplitude is constant elsewhere；It postemphasises and is to maintain the amplitude of signal rising edge and falling edge Constant, signal weakens elsewhere.The compensated signal swing that postemphasises signal swing more compensated than preemphasis is small, and eye figure is high Spend low, small power consumption.As shown in Figure 4.
In general, the circuit in high speed serialization transmitter generally uses differential configuration, common-mode signal is inhibited, to differential mode Signal amplification；But due to including a current source in its differential configuration, power consumption is caused to increase.
Summary of the invention
Therefore, in order to solve above-mentioned deficiency, the present invention provides a kind of low-power consumption pseudo-differential channel equalization high speed serialization herein Transmitter.The design uses the technology of pseudo-differential channel equalization by the transmitting terminal for interconnecting transmitter in high speed serialization to reach drop Low-power consumption and the elimination serious intersymbol interference problem as caused by high frequency attenuation.
The invention is realized in this way constructing a kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter, have simultaneously String conversion module, code modulation module, transmitting terminal balance module；It is characterized by: by using (the de- that postemphasises in transmitting terminal Emphasis) and preshoot (preshoot) mode that combines realizes the technology of channel equalization, and will use artifact parallel circuit generation For difference channel to reduce power consumption；
Wherein；It postemphasises, preshoot and Boost are defined as follows；
De-emphasis=20log10Vb/Va；
Preshoot=20log10Vc/Vb；
Boost=20log10Vd/Vb。
As an improvement of the above technical solution, the low-power consumption pseudo-differential channel equalization high speed serialization transmitter, feature Be: balance module is realized by a three rank FIR filters；Wherein v_in is the serial pulse signal of input, and box is one The delay of UI unit, c are weighting coefficient, and v_out is final output signal；Its relational expression met are as follows:
v_outn=(v_inn+1*c-1)+(v_inn*c0)+(v_inn-1*c+1)
|c-1|+|c0|+|c+1|=1
c+1≤ 0, c-1≤0；
Due to c+1And c-1Respectively less than 0, that is, it postemphasises (de-emphasis) and preshoot (preshoot) is respectively acting on and cuts Transposition: it postemphasises and 0 level to 1 level or 1 level only occurs compared with previous position in the present bit of the pattern of signal to 0 electricity It works when truncation is changed；0 level only occurs in the present bit of the pattern of signal compared with latter position for preshoot to 1 level or 1 Level works when switching to 0 level；
Work as c-1It when being 0, postemphasises and works, work as c+1When being 0, preshoot is worked；If the two works simultaneously, will produce Raw Boost, that is, switching while generating 0 level, 1 level, 0 level.
The present invention has the advantage that the present invention is believed by interconnecting the transmitting terminal of transmitter in high speed serialization using pseudo-differential The technology of trace equalization reduces power consumption and the elimination serious intersymbol interference problem as caused by high frequency attenuation to reach.By originally setting Meter, transmitting terminal using postemphasis (de-emphasis) and preshoot (preshoot) combine by the way of can effectively realize The technology of channel equalization, and do not include current source in pseudo differential architectures, under identical driving capability, power consumption is lower, therefore It can effectively reduce power consumption using pseudo differential architectures in circuit.
Detailed description of the invention
Fig. 1 is high speed serialization sender system structural schematic diagram；
Fig. 2 is typical FFE system structure diagram；
Fig. 3 is preemphasis compensation schematic diagram；
Fig. 4 is to postemphasis to compensate schematic diagram；
Fig. 5 is that the present invention is postemphasised, preshoot, Boost define schematic diagram
Fig. 6 is balanced system schematic of the invention.
Specific embodiment
Below in conjunction with attached drawing 1- Fig. 6, the present invention is described in detail, technical solution in the embodiment of the present invention into Row clearly and completely describes, it is clear that described embodiments are only a part of the embodiments of the present invention, rather than whole realities Apply example.Based on the embodiments of the present invention, those of ordinary skill in the art are obtained without making creative work Every other embodiment, shall fall within the protection scope of the present invention.
The present invention provides a kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter by improving herein；The present invention is logical Cross high speed serialization interconnection transmitter transmitting terminal use the technology of pseudo-differential channel equalization with reach reduce power consumption and elimination by Serious intersymbol interference problem caused by high frequency attenuation.The specific implementation process is as follows:
In the design, by transmitting terminal using postemphasising (de-emphasis) and preshoot (preshoot) combines Mode realize the technology of channel equalization, and will be with pseudo-differential circuitry instead difference channel to reduce power consumption.Wherein postemphasis, Preshoot and Boost be defined as follows and Fig. 5 shown in.
De-emphasis=20log10Vb/Va；
Preshoot=20log10Vc/Vb；
Boost=20log10Vd/Vb。
Equal balance system realized by a three rank FIR filters, as shown in Figure 6；Wherein v_in is the serial pulses letter of input Number, box is the delay of a UI unit, and c is weighting coefficient, and v_out is final output signal；Its relational expression met are as follows:
v_outn=(v_inn+1*c-1)+(v_inn*c0)+(v_inn-1*c+1)
|c-1|+|c0|+|c+1|=1
c+1≤ 0, c-1≤0；
Due to c+1And c-1Respectively less than 0, that is, it postemphasises (de-emphasis) and preshoot (preshoot) is respectively acting on and cuts Transposition: it postemphasises and 0 level to 1 level or 1 level only occurs compared with previous position in the present bit of the pattern of signal to 0 electricity It works when truncation is changed；0 level only occurs in the present bit of the pattern of signal compared with latter position for preshoot to 1 level or 1 Level works when switching to 0 level.
Work as c-1It when being 0, postemphasises and works, work as c+1When being 0, preshoot is worked；If the two works simultaneously, will produce Raw Boost, that is, switching while generating 0 level, 1 level, 0 level.
Therefore the present invention uses the technology of pseudo-differential channel equalization to reach by the transmitting terminal for interconnecting transmitter in high speed serialization To reduction power consumption and eliminate the serious intersymbol interference problem as caused by high frequency attenuation.By the design, uses and go in transmitting terminal The mode that exacerbation (de-emphasis) and preshoot (preshoot) combine can effectively realize the technology of channel equalization, and Current source is not included in pseudo differential architectures, under identical driving capability, power consumption is lower, therefore uses pseudo-differential knot in circuit Structure can effectively reduce power consumption.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, of the invention It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one The widest scope of cause.

Claims (2)

1. a kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter has parallel serial conversion module, code modulation module, hair Penetrate end balance module；It is characterized by: by transmitting terminal using postemphasising (de-emphasis) and preshoot (preshoot) phase In conjunction with mode realize the technology of channel equalization, and will be with pseudo-differential circuitry instead difference channel to reduce power consumption；
Wherein；It postemphasises, preshoot and Boost are defined as follows；
De-emphasis=20log10Vb/Va；
Preshoot=20log10Vc/Vb；
Boost=20log10Vd/Vb。
2. low-power consumption pseudo-differential channel equalization high speed serialization transmitter according to claim 1, it is characterised in that: balance module It is realized by a three rank FIR filters；Wherein v_in is the serial pulse signal of input, and box is the delay of a UI unit, c For weighting coefficient, v_out is final output signal；Its relational expression met are as follows:
v_outn=(v_inn+1*c-1)+(v_inn*c0)+(v_inn-1*c+1)
|c-1|+|c0|+|c+1|=1
c+1≤ 0, c-1≤0；
Due to c+1And c-1Respectively less than 0, that is, it postemphasises (de-emphasis) and preshoot (preshoot) is respectively acting on toggle bit: It postemphasises and 0 level to 1 level or 1 level only occurs compared with previous position in the present bit of the pattern of signal is cut to 0 level It works when changing；Only in the present bit of the pattern of signal 0 level to 1 level or 1 level occur compared with latter position for preshoot It works when switching to 0 level；
Work as c-1It when being 0, postemphasises and works, work as c+1When being 0, preshoot is worked；If the two works simultaneously, will generate Boost, that is, switching while generating 0 level, 1 level, 0 level.
CN201810796495.1A 2018-07-19 2018-07-19 A kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter Pending CN109067675A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810796495.1A CN109067675A (en) 2018-07-19 2018-07-19 A kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810796495.1A CN109067675A (en) 2018-07-19 2018-07-19 A kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter

Publications (1)

Publication Number Publication Date
CN109067675A true CN109067675A (en) 2018-12-21

Family

ID=64817397

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810796495.1A Pending CN109067675A (en) 2018-07-19 2018-07-19 A kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter

Country Status (1)

Country Link
CN (1) CN109067675A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111711459A (en) * 2020-07-06 2020-09-25 中国科学院微电子研究所 Transmitter drive equalization device, transmitter drive equalization method and electronic equipment

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008155676A1 (en) * 2007-06-21 2008-12-24 Excem Pseudo-differential interfacing device having a termination circuit
US8793541B2 (en) * 2008-10-10 2014-07-29 Teledyne Lecroy, Inc. Link equalization tester
CN107153553A (en) * 2017-06-09 2017-09-12 郑州云海信息技术有限公司 The method that Purley platform CPU end PCIe Tx Eq adjustment is carried out based on CScripts

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008155676A1 (en) * 2007-06-21 2008-12-24 Excem Pseudo-differential interfacing device having a termination circuit
US8793541B2 (en) * 2008-10-10 2014-07-29 Teledyne Lecroy, Inc. Link equalization tester
CN107153553A (en) * 2017-06-09 2017-09-12 郑州云海信息技术有限公司 The method that Purley platform CPU end PCIe Tx Eq adjustment is carried out based on CScripts

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
21IC: "PCIE3.0的发射机物理层测试", 《NEWS.EEWORLD.COM.CN/TEST_AND_MEASUREMENT/2012/1204/ARTICLE_6462.HTML》 *
21IC中国电子网: "PCIE 3.0的发射机物理层测试", 《HTTPS://WWW.21IC.COM/APP/TEST/201212/152838.HTM》 *
电源网: "力科测试：PCIE 3.0的发射机物理层测试", 《HTTPS://WWW.DIANYUAN.COM/ARTICLE/ 17570.HTML》 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111711459A (en) * 2020-07-06 2020-09-25 中国科学院微电子研究所 Transmitter drive equalization device, transmitter drive equalization method and electronic equipment
CN111711459B (en) * 2020-07-06 2021-08-31 中国科学院微电子研究所 Transmitter drive equalization device, transmitter drive equalization method and electronic equipment

Similar Documents

Publication Publication Date Title
US7868804B2 (en) High speed driver equalization
US6794900B2 (en) Method and circuit for pre-emphasis equalization in high speed data communications
US8929747B1 (en) Reducing pulse narrowing in the transmitter signal that drives a limiting E/O converter for optical fiber channels
US20100141340A1 (en) Method and apparatus for a high bandwidth amplifier with wide band peaking
CN104348771B (en) The method and apparatus encoded to signal
US10880133B2 (en) Voltage-mode transmitter driver
CN104135272A (en) Pre-emphasis LVDS (Low Voltage Differential Signaling) driver circuit capable of saving power consumption
US10009195B2 (en) Nonlinear equalizer
KR101855019B1 (en) Method for sending/receiving signal, corresponding device and system
CN112787963B (en) Signal processing method, device and system for adaptive decision feedback equalization
KR102386885B1 (en) Low Power Multilevel Driver
US7173965B2 (en) Equalizing a signal for transmission
US7668239B2 (en) System and method for transmit timing precompensation for a serial transmission communication channel
US20050122954A1 (en) Electrical backplane transmission using duobinary signaling
CN109067675A (en) A kind of low-power consumption pseudo-differential channel equalization high speed serialization transmitter
Yuminaka et al. PAM-4 eye diagram analysis and its monitoring technique for adaptive pre-emphasis for multi-valued data transmissions
CN111510175B (en) Multi-channel transceiver structure
CN216721352U (en) Voltage mode pre-emphasis equalization circuit, SerDes transmitter and chip
EP3329617B1 (en) Reflection based signal pre-emphasis
CN114422306A (en) Voltage mode pre-emphasis equalization circuit, SerDes transmitter and chip
US20090168941A1 (en) Method and apparatus for duty cycle pre-distortion and two-dimensional modulation
CN115882959A (en) Nonlinear compensation method based on machine learning
KR101148596B1 (en) Voltage-mode driver with capacitive coupling equalizer and pre-emphasis method in the voltage-mode drivers
JPWO2006101159A1 (en) Signal processing apparatus and signal processing method
Baprawski Serdes system ctle basics

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20181221