CN109041095B - Radio frequency circuit debugging method and related device - Google Patents

Radio frequency circuit debugging method and related device Download PDF

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Publication number
CN109041095B
CN109041095B CN201810791365.9A CN201810791365A CN109041095B CN 109041095 B CN109041095 B CN 109041095B CN 201810791365 A CN201810791365 A CN 201810791365A CN 109041095 B CN109041095 B CN 109041095B
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circuit
radio frequency
switch
duplexer
port
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CN109041095A (en
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徐庆山
熊良鹏
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W24/00Supervisory, monitoring or testing arrangements
    • H04W24/06Testing, supervising or monitoring using simulated traffic

Abstract

The application discloses a radio frequency circuit debugging method and related equipment, the method is used for debugging a radio frequency circuit, the radio frequency circuit comprises a radio frequency transceiver, a PA, a duplexer, a first LNA, a master set switch and a master set antenna, the radio frequency transceiver transmits radio frequency signals through the PA, the duplexer, the master set switch and the master set antenna in sequence, the radio frequency transceiver receives the radio frequency signals through the master set antenna, the master set switch, the duplexer and the first LNA in sequence, and the method comprises the following steps: extracting circuit parameters from the master set switch to the master set antenna through the PCB; simulating by simulation software and circuit parameters to obtain target scattering parameters of the master switch far away from the duplexer end; and simulating by simulation software and a target scattering parameter to obtain a first matching parameter of a matching circuit between the duplexer and the main set switch. By adopting the embodiment of the application, the simulation efficiency can be improved.

Description

Radio frequency circuit debugging method and related device
Technical Field
The present application relates to the field of simulation technologies, and in particular, to a method for debugging a radio frequency circuit and a related device.
Background
The third Generation mobile communication technology (3rd-Generation, 3G) communication and the fourth Generation mobile communication technology (4 th-Generation, 4G) communication of a mobile terminal (such as a smart phone) are mainly divided into two communication modes, namely Frequency Division Duplex (FDD) and Time Division Duplex (TDD), wherein the FDD transmit-receive path mainly realizes the simultaneous operation of transmitting and receiving through a duplexer without interfering with each other. In the debugging process, the radio frequency performance of the corresponding FDD frequency band is often optimized by optimizing the matching of the common end of the duplexer. In the conventional method, after a Printed Circuit Board (PCB) is returned, a vector network analyzer is used to analyze scattering parameters of a channel, so as to select a suitable radio frequency matching to achieve the best performance. At present, dozens of matching forms can be replaced in the debugging process to carry out debugging back and forth, and the debugging mode is complex and consumes long time.
Disclosure of Invention
The embodiment of the application provides a radio frequency circuit debugging method and related equipment, which are used for improving simulation efficiency.
In a first aspect, an embodiment of the present application provides a method for debugging a radio frequency circuit, where the method is used to debug a radio frequency circuit, the radio frequency circuit includes a radio frequency transceiver, a PA, a duplexer, a first LNA, a master set switch, and a master set antenna, the radio frequency transceiver transmits radio frequency signals through the PA, the duplexer, the master set switch, and the master set antenna, and the radio frequency transceiver receives radio frequency signals through the master set antenna, the master set switch, the duplexer, and the first LNA, and the method includes:
extracting circuit parameters of a path routing between the main set switch and the main set antenna through a PCB;
simulating by simulation software and the circuit parameters to obtain target scattering parameters of the master switch, which are far away from the duplexer end;
and simulating by the simulation software and the target scattering parameter to obtain a first matching parameter of a matching circuit between the duplexer and the main set switch.
In a second aspect, an embodiment of the present application provides a radio frequency circuit debugging device, the device is used for debugging a radio frequency circuit, the radio frequency circuit includes radio frequency transceiver, PA, duplexer, a first LNA, main set switch and main set antenna, the radio frequency transceiver loops through the PA the duplexer the main set switch with main set antenna transmission radio frequency signal, the radio frequency transceiver loops through the main set antenna the main set switch the duplexer and first LNA receives radio frequency signal, the radio frequency circuit debugging device includes:
the parameter extraction unit is used for extracting circuit parameters of the path routing between the main set switch and the main set antenna through a PCB (printed Circuit Board);
the simulation unit is used for carrying out simulation through simulation software and the circuit parameters to obtain target scattering parameters of the master switch, which are far away from the duplexer end; and simulating by the simulation software and the target scattering parameter to obtain a first matching parameter of a matching circuit between the duplexer and the main set switch.
In a third aspect, an embodiment of the present application provides a radio frequency circuit debugging apparatus, including a processor, a memory, a communication interface, and one or more programs, where the one or more programs are stored in the memory and configured to be executed by the processor, and the program includes instructions for executing steps in the method according to the first aspect of the embodiment of the present application.
In a fourth aspect, the present application provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program for electronic data exchange, where the computer program makes a computer perform some or all of the steps described in the method according to the first aspect of the present application.
In a fifth aspect, the present application provides a computer program product, where the computer program product includes a non-transitory computer-readable storage medium storing a computer program, where the computer program is operable to cause a computer to perform some or all of the steps described in the method according to the first aspect of the present application. The computer program product may be a software installation package.
It can be seen that, in the embodiment of the present application, the circuit parameters from the main set switch to the main set antenna extracted through the PCB are firstly used, and then the matching circuit between the duplexer and the main set switch is simulated through the circuit parameters and the simulation software. Therefore, the debugging method provided by the embodiment of the application is flexible in operation, the common end matching of the duplexer can be accurately simulated only by reasonable modeling, and the simulation efficiency is improved.
These and other aspects of the present application will be more readily apparent from the following description of the embodiments.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a radio frequency circuit according to an embodiment of the present disclosure;
fig. 2 is a schematic flowchart of a method for debugging a radio frequency circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a first two-port network model according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of a second two-port network model provided in an embodiment of the present application;
fig. 5 is a schematic flowchart of another radio frequency circuit debugging method according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of a radio frequency circuit debugging apparatus according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of another radio frequency circuit debugging apparatus according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The following are detailed below.
The terms "first," "second," "third," and "fourth," etc. in the description and claims of this application and in the accompanying drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a radio frequency circuit according to an embodiment of the present disclosure. As shown in fig. 1, the rf circuit includes an rf transceiver, a filter, a second Low Noise Amplifier (LNA), a diversity switch, a diversity antenna, a Power Amplifier (PA), a duplexer, a first LNA, a main set switch, and a main set antenna. The radio frequency transceiver is connected with first LNA, second LNA and PA respectively, and the wave filter is connected with the diversity switch, and the diversity switch is connected with the diversity antenna, and first LNA and PA all are connected with the duplexer, and the duplexer is connected with the main set switch, and the main set switch is connected with the main set antenna. In addition, a filter may be included between the first LNA and the duplexer.
The radio frequency signals sent by the radio frequency transceiver are amplified through the PA, the duplexer and the master set switch respectively and are finally transmitted through the master set antenna. The main set antenna receives radio frequency signals, then respectively passes through the main set switch, the duplexer and the first LNA, and finally reaches the radio frequency transceiver. The diversity antenna receives the radio frequency signal, then passes through the diversity switch, the filter and the second LNA respectively, and finally reaches the radio frequency transceiver.
The number of the main set antennas may be one or multiple, and is not limited herein. The number of diversity antennas may be one or more, and is not limited herein.
The radio frequency signal may be a radio frequency signal in an LTE Band, for example, TDD-LTE Band38, Band39, Band40, and Band41, FDD-LTE Band1, Band3, and Band 7. The radio frequency signal may be a radio frequency signal of a 3G Band, for example, Time Division-Synchronous Code Division Multiple Access (TD-SCDMA) Band34 and Band39, Wideband Code Division Multiple Access (WCDMA) Band1, Band2, Band5, and Band 8. The radio frequency signal may be a radio frequency signal in a 2G Band, and the 2G Band includes, for example, Global System for Mobile Communication (GSM) Band2, Band3, Band5, and Band 8.
The radio frequency transceiver is a device capable of receiving and transmitting radio frequency signals.
Among them, the PA is an important component of a radio frequency signal transmitter. The power amplifier is used for amplifying the power of the radio frequency signal sent by the radio frequency signal transmitter and ensuring that the radio frequency signal can be fed to an antenna for transmission.
The duplexer is a special bidirectional three-terminal filter, is mainly applied to an FDD system, and mainly plays a role in filtering and isolating signals.
The main set antenna is an antenna capable of transmitting and receiving radio frequency signals in an antenna diversity operation mode, and serves as the main set antenna.
The main set switch is a switch for switching the working state of the main set antenna.
The diversity antenna is an antenna that can only receive radio frequency signals in an antenna diversity operation mode.
The diversity switch is a switch for controlling an operating frequency band and a receiving or transmitting state of the diversity antenna.
The following describes embodiments of the present application in detail.
Referring to fig. 2, fig. 2 is a schematic flowchart of a method for debugging a radio frequency circuit according to an embodiment of the present application, where the method is used to debug the radio frequency circuit, and the method for debugging a radio frequency circuit includes:
step 201: the radio frequency Circuit debugging device extracts Circuit parameters of a path between the master set switch and the master set antenna through a Printed Circuit Board (PCB).
Specifically, a specific implementation manner of extracting the circuit parameters of the path routing from the main set switch to the main set antenna is extracted in a passive test manner by a vector network analyzer.
The radio frequency circuit is applied to a Mobile terminal, and the Mobile terminal may include various handheld devices, vehicle-mounted devices, wearable devices (e.g., smartwatches, smartbands, pedometers, etc.), computing devices or other processing devices connected to a wireless modem, and various forms of User Equipment (UE), a Mobile Station (MS), a terminal device (terminal device), and the like, which have a wireless communication function. For convenience of description, the above-mentioned devices are collectively referred to as a mobile terminal.
Wherein the circuit parameters comprise S2P parameters, and the S2P parameters comprise at least one of the following: s parameter, Z parameter, Y parameter and H parameter.
Wherein, the S-parameters are scattering parameters, the S-parameters are used to evaluate the amplitude and phase information of the reflected signal and the transmitted signal, and the S-parameters mainly include S11, S12, S21 and S22. Wherein, S12 is used to represent the inverse isolation in transmission and is used to describe the effect of the signal at the output of the device on the input. S21 is used to indicate gain in transmission, which is an increase in load power due to the insertion of an element or device, or insertion loss, which is a loss in load power due to the insertion of an element or device. S11 is used to indicate the return loss of the input end, and can be described as the ratio of the incident power to the reflected power of the rf signal at the input end. S22 is used to indicate the return loss of the output end, and can be described as the ratio of the incident power to the reflected power of the rf signal at the output end.
The Z parameter is an impedance parameter, and is used to represent the impedance in the two-port network, and the impedance parameter is related to the structure and parameter values of the two-port network and is unrelated to the external network. The impedance parameters mainly comprise Z11, Z21, Z12 and Z22. Where Z11 denotes the input impedance when the output port is open, Z12 denotes the transfer impedance when the input port is open, Z21 denotes the transfer impedance when the output port is open, and Z22 denotes the output impedance when the input port is open.
The Y parameter is an admittance parameter, and is used to indicate an admittance value when a port in the two-port network is short-circuited. The impedance parameters mainly comprise Y11, Y12, Y21 and Y22. Where Y11 denotes an input admittance when the output port is short-circuited, Y12 denotes a transfer admittance when the input port is short-circuited, Y21 denotes a transfer admittance when the input port is short-circuited, and Y22 denotes an output admittance when the input port is short-circuited.
The H parameter is a hybrid parameter, and is used to represent a parameter related to the current and voltage of the two-port network when the port in the port network is short-circuited. The mixing parameters mainly comprise H11, H12, H21 and H22. Where H11 denotes an input impedance when the output port is short-circuited, H12 denotes a reverse transfer voltage ratio when the input port is open-circuited, H21 denotes a forward transfer current ratio when the output port is short-circuited, and H22 denotes an output admittance when the input port is open-circuited.
Step 202: and the radio frequency circuit debugging device simulates the circuit parameters through simulation software to obtain the target scattering parameters of the master switch far away from the duplexer end.
Specifically, the radio frequency circuit debugging device firstly establishes a simulation circuit through simulation software, then introduces the extracted circuit parameters into the simulation circuit, and finally simulates the end of the main set switch far away from the duplexer end through the simulation circuit, so that the target scattering parameters of the main set switch far away from the duplexer end can be obtained.
The simulation software is, for example, Advanced Design System (ADS) simulation software. The target scattering parameter is, for example, S11.
Step 203: and the radio frequency circuit debugging device simulates through the simulation software and the target scattering parameter to obtain a first matching parameter of a matching circuit between the duplexer and the main set switch.
Specifically, the radio frequency circuit debugging apparatus first establishes a simulation circuit through simulation software, and then simulates the matching circuit between the duplexer and the main set switch through the simulation circuit and the target scattering parameter obtained through simulation in step 202, so as to obtain the matching parameter of the matching circuit.
It can be seen that, in the embodiment of the present application, the circuit parameters from the main set switch to the main set antenna extracted through the PCB are firstly used, and then the matching circuit between the duplexer and the main set switch is simulated through the circuit parameters and the simulation software. Therefore, the debugging method provided by the embodiment of the application is flexible in operation, the common end matching of the duplexer can be accurately simulated only by reasonable modeling, and the simulation efficiency is improved.
In an implementation manner of the present application, the specific implementation manner of step 202 is as follows:
the radio frequency circuit debugging device establishes a first two-port network model through simulation software, wherein a first port of the first two-port network model is used as a terminal of the master set switch far away from the duplexer terminal, and a second port of the first two-port network model is used as a terminal of the master set antenna; the radio frequency circuit debugging device leads the circuit parameters into the first two-port network model, and simulates the duplexer end of the master switch to obtain the target scattering parameters of the master switch far away from the duplexer end.
The two-port network model refers to a multi-port network with the port number equal to 2, wherein one port of the two-port network is an input port and used for receiving signals or energy, and the other port of the two-port network is an output port and used for outputting signals or energy.
Specifically, the first two-port network model is shown in fig. 3, and the two-port network model includes a first port, a second port, and a device model, where the first port and the second port are both provided with a resistor, and impedance values of the resistors at the first port and the second port are both equal to 50 ohms. The circuit parameter is led into the first two-port network model, namely the circuit parameter is used as the circuit parameter of the device model. Therefore, in the first two-port network model, when the circuit parameters of the device model are known and the impedance values of the two ports are also known, S11 of the first port of the first two-port network model can be directly simulated through simulation software, that is, S11 of the output end of the master set switch is obtained through simulation.
It should be noted that the first two-port network model is not limited to the structure shown in fig. 3, and the structure shown in fig. 3 is only one example provided in this application.
In an implementation manner of the present application, the specific implementation manner of step 203 includes:
the radio frequency circuit debugging device establishes a second two-port network model through the simulation software, a third port of the second two-port network model is sequentially connected with a duplexer model, a matching circuit model, a master switch model and a fourth port of the second two-port network model, and an impedance value of the fourth port is associated with the target scattering parameter; and the radio frequency circuit debugging device simulates the matching circuit model to realize impedance matching and obtain a first matching parameter of the matching circuit between the duplexer and the master switch.
Further, the impedance value of the fourth port refers to the impedance value of the resistor at the fourth port, which is equal to a solution of the conjugate of the scattering parameter of the target.
Further, before the second port network model is established, the radio frequency circuit debugging device extracts the circuit parameters of the duplexer and the circuit parameters of the main set switch through the PCB.
Further, the matching circuit comprises an electronic device to be matched, and the electronic device to be matched comprises one of the following components: capacitance, inductance, resistance.
Further, the matching circuit is a "pi" type matching circuit.
Furthermore, the electronic device to be matched comprises a first capacitor, a first inductor and a second capacitor, one end of the first capacitor is connected with one end of the first inductor, one end of the second capacitor is connected with the other end of the first inductor, and the other end of the first capacitor and the other end of the second capacitor are both grounded.
Wherein the matching parameters of the matching circuit comprise the values of the electronic devices to be matched. For example, the electronic device to be matched includes a first capacitor, a first inductor and a second capacitor, and the matching parameters of the matching circuit include a capacitance value of the first capacitor, an inductance value of the first inductor and a capacitance value of the second capacitor.
Specifically, as shown in fig. 4, the second two-port network model includes a resistor at each of the third port and the fourth port, the impedance value of the resistor at the third port is equal to 50 ohms, and the impedance value of the resistor at the fourth port is equal to a solution of a conjugate of the target scattering parameter. And the extracted circuit parameters of the duplexer are used as the circuit parameters of the duplexer model, and the extracted circuit parameters of the main set switch are used as the circuit parameters of the main set switch model. It can be seen that, in the second two-port network model, when the circuit parameters of the duplexer model are known, the circuit parameters of the main set switch are known, and the impedance values of the two ports are also known, the values of the matching network model are adjusted so that S11, S21, and S22 of the second two-port network are optimized, that is, S11 is the most convergent, S21 has the least difference loss, and S22 is the closest to 50 ohms, so that the first matching parameters of the matching circuit between the duplexer and the main set switch can be simulated.
It should be noted that the first two-port network model is not limited to the structure shown in fig. 4, and the structure shown in fig. 4 is only one example provided in this application.
In an implementation manner of the present application, after step 203, the method further includes:
welding the matching circuit with the first matching parameters to the PCB by the radio frequency circuit debugging device for actual test to obtain a test result; and the radio frequency circuit debugging device carries out fine adjustment on the basis of the first matching parameters according to the test result to obtain second matching parameters of the matching circuit model.
Specifically, the above test step tests the scattering parameters of the duplexer-to-main set switch, such as S11, S12, S21 and S22, and the test result obtained in the test step contains the values of S11, S12, S21 and S22 of the duplexer-to-main set switch.
Therefore, in the embodiment of the application, after the matching parameters of the matching circuit are simulated through the simulation software, the matching circuit with the matching parameters is welded on the PCB for actual test to obtain a test result, and then fine tuning is performed based on the test result, so that more accurate matching parameters can be obtained, and the simulation accuracy is further improved.
It should be noted that the radio frequency circuit debugging apparatus is a computer device installed with simulation software, and the computer device may be, for example, a computer, a notebook, a tablet computer, an industrial computer, a mobile terminal, and the like.
The embodiment of the present application further provides another more detailed method flow, as shown in fig. 5, where the method is used for debugging the radio frequency circuit, and the method for debugging the radio frequency circuit includes:
step 501: and the radio frequency circuit debugging device extracts circuit parameters from the master set switch to the master set antenna through the PCB.
Step 502: the radio frequency circuit debugging device establishes a first two-port network model through simulation software, a first port of the first two-port network model is used as the far side of the main set switch from the duplexer end, and a second port of the first two-port network model is used as the main set antenna end.
Step 503: and the radio frequency circuit debugging device leads the circuit parameters into the first two-port network model.
Step 504: and the radio frequency circuit debugging device simulates the duplexer end of the master switch far away to obtain the target scattering parameters of the master switch far away from the duplexer end.
Step 505: the radio frequency circuit debugging device establishes a second port network model through the simulation software, a third port of the second port network model is sequentially connected with a duplexer model, a matching circuit model, a master set switch model and a fourth port of the second port network model, and an impedance value of the fourth port is associated with the target scattering parameter.
Step 506: and the radio frequency circuit debugging device simulates the matching circuit model to realize impedance matching and obtain a first matching parameter of the matching circuit between the duplexer and the master switch.
Step 507: and the radio frequency circuit debugging device welds the matching circuit with the first matching parameters onto the PCB for actual test to obtain a test result.
Step 508: and the radio frequency circuit debugging device carries out fine adjustment on the basis of the first matching parameters according to the test result to obtain second matching parameters of the matching circuit model.
It should be noted that, for the specific implementation of the steps of the method shown in fig. 5, reference may be made to the specific implementation of the method, and a description thereof is omitted here.
Referring to fig. 6, in accordance with the embodiments shown in fig. 2 and fig. 5, fig. 6 is a schematic structural diagram of a radio frequency circuit debugging apparatus provided in an embodiment of the present application, where the radio frequency circuit debugging apparatus is used for debugging the radio frequency circuit, and as shown in the figure, the radio frequency circuit debugging apparatus includes a processor, a memory, a communication interface, and one or more programs, where the one or more programs are stored in the memory and configured to be executed by the processor, and the program includes instructions for performing the following steps:
extracting circuit parameters from the master set switch to the master set antenna through a PCB;
simulating by simulation software and the circuit parameters to obtain target scattering parameters of the master switch, which are far away from the duplexer end;
and simulating by the simulation software and the target scattering parameter to obtain a first matching parameter of a matching circuit between the duplexer and the main set switch.
In an implementation manner of the present application, in terms of obtaining the target scattering parameter of the main set switch far from the duplexer end through simulation software and the simulation of the circuit parameter, the above program is specifically configured to execute instructions of the following steps:
establishing a first two-port network model through simulation software, wherein a first port of the first two-port network model is used as a duplexer end far away from the main set switch, and a second port of the first two-port network model is used as a main set antenna end;
and importing the circuit parameters into the first two-port network model, and simulating the duplexer end far away from the master switch to obtain the target scattering parameters of the master switch far away from the duplexer end.
In an implementation manner of the present application, in terms of obtaining the first matching parameter of the matching circuit between the duplexer and the main set switch through simulation performed by the simulation software and the target scattering parameter, the above program is specifically configured to execute instructions of:
establishing a second port network model through the simulation software, wherein a third port of the second port network model is sequentially connected with a duplexer model, a matching circuit model, a master set switch model and a fourth port of the second port network model, and an impedance value of the fourth port is associated with the target scattering parameter;
and simulating the matching circuit model to realize impedance matching, and obtaining a first matching parameter of the matching circuit between the duplexer and the main set switch.
In an implementation manner of the present application, after obtaining the first matching parameter of the matching circuit between the duplexer and the main set switch by performing simulation through the simulation software and the target scattering parameter, the program is further configured to execute instructions of:
welding the matching circuit with the first matching parameters to the PCB for actual testing to obtain a test result;
and carrying out fine adjustment on the basis of the first matching parameter according to the test result to obtain a second matching parameter of the matching circuit model.
In one implementation of the present application, the matching circuit includes an electronic device to be matched, and the electronic device to be matched includes one of the following: capacitance, inductance, resistance.
In one implementation of the present application, the matching circuit is a "pi" type matching circuit.
In an implementation manner of the present application, the electronic device to be matched includes a first capacitor, a first inductor and a second capacitor, one end of the first capacitor is connected to one end of the first inductor, one end of the second capacitor is connected to the other end of the first inductor, and the other end of the first capacitor and the other end of the second capacitor are all grounded.
It should be noted that, for the specific implementation process of the present embodiment, reference may be made to the specific implementation process described in the above method embodiment, and a description thereof is omitted here.
The above embodiments mainly introduce the scheme of the embodiments of the present application from the perspective of the method-side implementation process. It is understood that the radio frequency circuit debugging means comprises corresponding hardware structures and/or software modules for performing the respective functions in order to realize the above functions. Those of skill in the art would readily appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiment of the present application, the radio frequency circuit debugging apparatus may be divided into the functional units according to the method example, for example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated into one processing unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. It should be noted that the division of the unit in the embodiment of the present application is schematic, and is only a logic function division, and there may be another division manner in actual implementation.
The following is an embodiment of the apparatus of the present application, which is used to execute the method implemented by the embodiment of the method of the present application. Referring to fig. 7, fig. 7 is a radio frequency circuit debugging apparatus according to an embodiment of the present application, where the radio frequency circuit debugging apparatus is configured to debug the radio frequency circuit, and the radio frequency circuit debugging apparatus includes:
a parameter extracting unit 701, configured to extract, through a printed circuit board PCB, a circuit parameter of a path routing between the main set switch and the main set antenna;
a simulation unit 702, configured to perform simulation with the circuit parameter through simulation software to obtain a target scattering parameter of the main set switch, which is far away from the duplexer end; and simulating by the simulation software and the target scattering parameter to obtain a first matching parameter of a matching circuit between the duplexer and the main set switch.
In an implementation manner of the present application, in terms of obtaining the target scattering parameter of the main set switch far away from the duplexer end through simulation software and simulation of the circuit parameter, the simulation unit 702 is specifically configured to:
establishing a first two-port network model through simulation software, wherein a first port of the first two-port network model is used as a duplexer end far away from the main set switch, and a second port of the first two-port network model is used as a main set antenna end;
and importing the circuit parameters into the first two-port network model, and simulating the duplexer end far away from the master switch to obtain the target scattering parameters of the master switch far away from the duplexer end.
In an implementation manner of the present application, in terms of obtaining a first matching parameter of a matching circuit between the duplexer and the main set switch through simulation performed by the simulation software and a target scattering parameter, the simulation unit 702 is specifically configured to:
establishing a second port network model through the simulation software, wherein a third port of the second port network model is sequentially connected with a duplexer model, a matching circuit model, a master set switch model and a fourth port of the second port network model, and an impedance value of the fourth port is associated with the target scattering parameter;
and simulating the matching circuit model to realize impedance matching, and obtaining a first matching parameter of the matching circuit between the duplexer and the main set switch.
In an implementation manner of the present application, after the simulation unit 702 performs simulation through the simulation software and the target scattering parameter to obtain a first matching parameter of a matching circuit between the duplexer and the main set switch, the radio frequency circuit debugging apparatus further includes a testing unit 703, where:
the test unit 703 is configured to solder the matching circuit with the first matching parameter onto the PCB for an actual test, so as to obtain a test result;
the simulation unit 702 is further configured to perform fine tuning on the basis of the first matching parameter according to the test result, so as to obtain a second matching parameter of the matching circuit model.
In one implementation of the present application, the matching circuit includes an electronic device to be matched, and the electronic device to be matched includes one of the following: capacitance, inductance, resistance.
In one implementation of the present application, the matching circuit is a "pi" type matching circuit.
In an implementation manner of the present application, the electronic device to be matched includes a first capacitor, a first inductor and a second capacitor, one end of the first capacitor is connected to one end of the first inductor, one end of the second capacitor is connected to the other end of the first inductor, and the other end of the first capacitor and the other end of the second capacitor are all grounded.
It should be noted that the parameter extraction unit 701, the simulation unit 702, and the test unit 703 may be implemented by a processor.
Embodiments of the present application also provide a computer storage medium, where the computer storage medium stores a computer program for electronic data exchange, and the computer program enables a computer to execute part or all of the steps of any one of the methods described in the above method embodiments, and the computer includes a radio frequency circuit debugging apparatus.
Embodiments of the present application also provide a computer program product comprising a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods as described in the above method embodiments. The computer program product may be a software installation package, the computer comprising radio frequency circuitry debugging means.
It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the above-described division of the units is only one type of division of logical functions, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit may be stored in a computer readable memory if it is implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the above-mentioned method of the embodiments of the present application. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable memory, which may include: flash Memory disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.
The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application, and the above description of the embodiments is only provided to help understand the method and the core concept of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (9)

1. A radio frequency circuit debugging method is used for debugging a radio frequency circuit, the radio frequency circuit comprises a radio frequency transceiver, a Power Amplifier (PA), a duplexer, a first Low Noise Amplifier (LNA), a master set switch and a master set antenna, the radio frequency transceiver transmits radio frequency signals through the PA, the duplexer, the master set switch and the master set antenna in sequence, the radio frequency transceiver receives radio frequency signals through the master set antenna, the master set switch, the duplexer and the first LNA in sequence, and the method comprises the following steps:
extracting circuit parameters from the master switch to the master antenna through a Printed Circuit Board (PCB);
simulating by simulation software and the circuit parameters to obtain target scattering parameters of the master switch, which are far away from the duplexer end;
simulating through the simulation software and the target scattering parameter to obtain a first matching parameter of a matching circuit between the duplexer and the main set switch, and specifically comprising:
the radio frequency circuit debugging device establishes a second two-port network model through the simulation software, a third port of the second two-port network model is sequentially connected with a duplexer model, a matching circuit model, a master switch model and a fourth port of the second two-port network model, and an impedance value of the fourth port is associated with the target scattering parameter; the impedance value of the fourth port is the impedance value of the resistor at the fourth port, which is equal to a solution of the conjugate of the target scattering parameter;
the circuit parameter of the circuit parameter as the duplexer model of the duplexer draws the circuit parameter of the main set switch as the circuit parameter of the main set switch model in the second two-port network model the circuit parameter of the duplexer model is known the circuit parameter of the main set switch is known the third port with when the impedance value of the fourth port is also known, through adjusting the value of the matching network model, guarantee that the insertion loss in the transmission of the second two-port network is the minimum of the convergence of the reverse isolation degree and the transmission, the insertion loss is the load power loss that the insertion of the element or the device occurs, the return loss of the output end of the second two-port network model is closest to 50 ohms, and the simulation is obtained the first matching parameter.
2. The method of claim 1, wherein the simulating by the simulation software and the circuit parameters to obtain the target scattering parameters of the main set switch far from the duplexer end comprises:
establishing a first two-port network model through simulation software, wherein a first port of the first two-port network model is used as a duplexer end far away from the main set switch, and a second port of the first two-port network model is used as a main set antenna end;
and importing the circuit parameters into the first two-port network model, and simulating the duplexer end far away from the master switch to obtain the target scattering parameters of the master switch far away from the duplexer end.
3. The method according to any one of claims 1-2, wherein after the simulation by the simulation software and the target scattering parameter to obtain the first matching parameter of the matching circuit between the duplexer and the main set switch, the method further comprises:
welding the matching circuit with the first matching parameters to the PCB for actual testing to obtain a test result;
and carrying out fine adjustment on the basis of the first matching parameter according to the test result to obtain a second matching parameter of the matching circuit model.
4. The method of any of claims 1-2, wherein the matching circuit comprises an electronic device to be matched, the electronic device to be matched comprising one of: capacitance, inductance, resistance.
5. The method of claim 4, wherein the matching circuit is a "pi" type matching circuit.
6. The method according to claim 5, wherein the electronic device to be matched comprises a first capacitor, a first inductor and a second capacitor, one end of the first capacitor is connected with one end of the first inductor, one end of the second capacitor is connected with the other end of the first inductor, and the other end of the first capacitor and the other end of the second capacitor are both grounded.
7. The utility model provides a radio frequency circuit debugging device, its characterized in that, the device is used for debugging radio frequency circuit, radio frequency circuit includes radio frequency transceiver, power amplifier PA, duplexer, first low noise amplifier LNA, main set switch and main set antenna, radio frequency transceiver loops through the PA duplexer main set switch with main set antenna transmission radio frequency signal, radio frequency transceiver loops through main set antenna main set switch duplexer and first LNA receives radio frequency signal, radio frequency circuit debugging device includes:
the parameter extraction unit is used for extracting circuit parameters of the path routing between the master switch and the master antenna through a Printed Circuit Board (PCB);
the simulation unit is used for carrying out simulation through simulation software and the circuit parameters to obtain target scattering parameters of the master switch, which are far away from the duplexer end; simulating through the simulation software and the target scattering parameter to obtain a first matching parameter of a matching circuit between the duplexer and the main set switch, and specifically comprising:
the radio frequency circuit debugging device establishes a second two-port network model through the simulation software, a third port of the second two-port network model is sequentially connected with a duplexer model, a matching circuit model, a master switch model and a fourth port of the second two-port network model, and an impedance value of the fourth port is associated with the target scattering parameter; the impedance value of the fourth port is the impedance value of the resistor at the fourth port, which is equal to a solution of the conjugate of the target scattering parameter;
the circuit parameter of the circuit parameter as the duplexer model of the duplexer draws the circuit parameter of the main set switch as the circuit parameter of the main set switch model in the second two-port network model the circuit parameter of the duplexer model is known the circuit parameter of the main set switch is known the third port with when the impedance value of the fourth port is also known, through adjusting the value of the matching network model, guarantee that the insertion loss in the transmission of the second two-port network is the minimum of the convergence of the reverse isolation degree and the transmission, the insertion loss is the load power loss that the insertion of the element or the device occurs, the return loss of the output end of the second two-port network model is closest to 50 ohms, and the simulation is obtained the first matching parameter.
8. A radio frequency circuit debugging apparatus comprising a processor, a memory, a communication interface, and one or more programs stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps in the method of any of claims 1-6.
9. A computer-readable storage medium, characterized in that a computer program for electronic data exchange is stored, wherein the computer program causes a computer to perform the method according to any one of claims 1-6.
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