CN109039561B - Transmission method and device for synchronous signal block index - Google Patents
Transmission method and device for synchronous signal block index Download PDFInfo
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- CN109039561B CN109039561B CN201810777568.2A CN201810777568A CN109039561B CN 109039561 B CN109039561 B CN 109039561B CN 201810777568 A CN201810777568 A CN 201810777568A CN 109039561 B CN109039561 B CN 109039561B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/003—Arrangements for allocating sub-channels of the transmission path
- H04L5/0053—Allocation of signaling, i.e. of overhead other than pilot signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/0091—Signaling for the administration of the divided path
- H04L5/0094—Indication of how sub-channels of the path are allocated
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W72/00—Local resource management
- H04W72/04—Wireless resource allocation
- H04W72/044—Wireless resource allocation based on the type of the allocated resource
- H04W72/0446—Resources in time domain, e.g. slots or frames
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W72/00—Local resource management
- H04W72/20—Control channels or signalling for resource management
- H04W72/23—Control channels or signalling for resource management in the downlink direction of a wireless link, i.e. towards a terminal
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Abstract
The application discloses a method and a device for transmitting a synchronous signal block index, wherein one or more synchronous signal blocks are newly added on the basis of a plurality of synchronous signal blocks of the existing unlicensed spectrum channel, and the synchronous signal blocks with the same time domain positions of specified downlink signals have the same synchronous signal block index, so that the sending opportunity of synchronous signals can be increased, and the expense for sending the synchronous signal block index can be reduced.
Description
Technical Field
The present invention relates to the field of communications, and in particular, to a method and an apparatus for transmitting a synchronization signal block index.
Background
Under a licensed spectrum of a New Radio (NR) communication system, each Synchronization Signal Block (SSB) occupies 4 consecutive symbols in a time domain, and is sequentially distributed in the time domain as a Primary Synchronization Signal (PSS), a Physical Broadcast Channel (PBCH), a Secondary Synchronization Signal (SSS) + PBCH (SSS is 12 RBs in the middle, and PBCH is 4 RBs on both sides). The subcarrier spacing of the synchronization signal block may be 15KHz, 30KHz, 120KHz, 240 KHz. All synchronization signal blocks are transmitted within a preset duration, within which the maximum number of synchronization signal blocks is 4, 8 or 64.
In the unlicensed spectrum of the NR communication system, the unlicensed spectrum channel is not always in an available state, and the base station needs to monitor whether the unlicensed spectrum channel is in an idle state before transmitting the downlink signal, and may transmit the downlink signal only if the unlicensed spectrum channel is in the idle state. For example: when the subcarrier interval of the synchronization signal block is 15kHz, the preset duration includes 4 SSBs: SSB # 0 to SSB #3, SSB #0 is located at symbols 2 to 5 of slot 0, SSB #1 is located at symbols 8 to 11 of slot 1, SSB #2 is located at symbols 2 to 5 of slot 2, and SSB #3 is located at symbols 8 to 11 of slot 3. If the base station does not hear the unlicensed spectrum channel as idle before symbol 2 of slot 0, then the synchronization signal on SSB # 0 will not be able to be transmitted. If the base station does not monitor that the unlicensed spectrum channel is in an idle state before the symbol 8 of the timeslot 0, the synchronization signal on the SSB # 1 cannot be transmitted, and in order to increase the transmission opportunity of the synchronization signal, a scheme for adding a new synchronization signal block for a preset time length is proposed at present, so that the number of the synchronization signal blocks in the preset time length is greatly increased, and in order to facilitate the terminal device to determine the time domain position of the synchronization signal block, the synchronization signal block indexes of the synchronization signal blocks in the preset time length are also different, so that the scheme for increasing the number of the synchronization signal blocks correspondingly increases the overhead of transmitting the synchronization signal block indexes.
Disclosure of Invention
The technical problem to be solved by the embodiments of the present invention is to provide a method and an apparatus for transmitting a synchronization signal block index. The problem of charging mass terminals of the same account in the prior art can be solved.
In order to solve the above technical problem, the present application provides a method for transmitting a synchronization signal block index, including:
the network equipment determines r synchronous signal blocks in the m synchronous signal blocks according to the occupied time of the unlicensed spectrum channel; the method comprises the steps that m is the maximum number of synchronous signal blocks included in a preset time length, m synchronous signal blocks include p synchronous signal blocks under an authorized spectrum channel, m-p cadre signal blocks are obtained by circularly shifting downlink signals in the synchronous signal blocks, p is smaller than m, r is smaller than m, and r, m and p are integers larger than 0. The network equipment determines a synchronous signal block index according to the position of a designated downlink signal in the r synchronous signal blocks; the network equipment sends r synchronous signals carrying the synchronous signal block indexes to the terminal equipment on the r synchronous signal blocks.
In the embodiment of the invention, one or more synchronous signal blocks are newly added on the basis of p synchronous signal blocks of the existing unlicensed spectrum channel, and the synchronous signal blocks with the same time domain position of the specified downlink signal have the same synchronous signal block index, so that the sending opportunity of the synchronous signal can be increased, and the overhead of sending the synchronous signal block index can be reduced.
In one possible design, the downlink signals are designated as SSS or PSS.
In one possible design, the value of m is related to the current subcarrier spacing.
In one possible design, there is overlap or no overlap between two adjacent ones of the m synchronization signal blocks.
In a second aspect, the present application provides a method for transmitting a synchronization signal block index, including:
the method comprises the steps that terminal equipment receives r synchronous signals which are sent on r synchronous signal blocks from network equipment and carry synchronous signal block indexes, the preset time length comprises m synchronous signal blocks, the m synchronous signal blocks comprise the r synchronous signal blocks, the synchronous signal blocks with the same time domain positions of specified downlink signals have the same synchronous signal block indexes, the m synchronous signal blocks comprise p synchronous signal blocks under an authorized spectrum channel, m-p synchronous signal blocks are obtained by circularly shifting the downlink signals in the synchronous signal blocks, p is less than m, r is less than m, and r, m and p are integers more than 0;
and the terminal equipment determines the time domain position of the synchronous signal block according to the synchronous signal block index and the downlink synchronous time.
In one possible design, the designated downlink signal is a primary synchronization signal SSS or a secondary synchronization signal PSS.
In one possible design, the value of m is related to the current subcarrier spacing.
In one possible design, there is overlap or no overlap between two adjacent ones of the m synchronization signal blocks.
In a third aspect, an apparatus is provided, which may implement the transmission method of the synchronization signal block index in the first aspect or the second aspect. For example, the apparatus may be a chip (such as a baseband chip, or a communication chip, etc.) or a terminal device. The above-described method may be implemented by software, hardware, or by executing corresponding software by hardware.
In one possible implementation manner, the structure of the apparatus includes a processor, a memory; the processor is configured to support the apparatus to perform corresponding functions in the above-described communication method. The memory is used for coupling with the processor, which holds the necessary programs (instructions) and/or data for the device. Optionally, the communication apparatus may further include a communication interface for supporting communication between the apparatus and other network elements.
In another possible implementation manner, the apparatus may include a unit module for performing corresponding actions in the above method.
In yet another possible implementation, the wireless communication device includes a processor and a transceiver, the processor is coupled to the transceiver, and the processor is configured to execute a computer program or instructions to control the transceiver to receive and transmit information; the processor is further configured to implement the above-described method when the processor executes the computer program or instructions. The transceiver may be a transceiver, a transceiver circuit, or an input/output interface. When the communication device is a chip, the transceiver is a transceiver or an input/output interface.
When the device is a chip, the sending unit may be an output unit, such as an output circuit or a communication interface; the receiving unit may be an input unit, such as an input circuit or a communication interface. When the communication device is a network device, the sending unit may be a transmitter or a transmitter; the receiving unit may be a receiver or a receiver.
Yet another aspect of the present application provides an apparatus, comprising: a memory and a processor; wherein the memory stores a set of program codes, and the processor is configured to call the program codes stored in the memory and execute the method of the aspects.
Yet another aspect of the present application provides a computer-readable storage medium having stored therein instructions, which when executed on a computer, cause the computer to perform the method of the above-described aspects.
Yet another aspect of the present application provides a computer program product containing instructions which, when run on a computer, cause the computer to perform the method of the above-described aspects.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a communication system according to an embodiment of the present invention;
fig. 2a is a flowchart illustrating a method for transmitting an index of a synchronization signal block according to an embodiment of the present invention.
FIG. 2b is a diagram illustrating the distribution of synchronization signal blocks in a licensed spectrum;
FIG. 3 is a schematic structural diagram of an apparatus according to an embodiment of the present invention;
FIG. 4 is another schematic diagram of an apparatus according to an embodiment of the present invention;
fig. 5 is another schematic structural diagram of an apparatus according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described below with reference to the drawings in the embodiments of the present invention.
Fig. 1 is a schematic diagram of an architecture of a communication system according to an embodiment of the present invention, where the communication system includes a network device and a terminal device. Fig. 1 shows 1 network device cooperating to communicate with 2 terminal devices. The communication system may be a global system for mobile communication (GSM), a Code Division Multiple Access (CDMA) system, a Wideband Code Division Multiple Access (WCDMA) system, a Worldwide Interoperability for Microwave Access (WiMAX) system, a Long Term Evolution (LTE) system, a 5G communication system (e.g., new radio, NR) system, a communication system in which a plurality of communication technologies are merged (e.g., a communication system in which LTE technology and NR technology are merged), or a communication system in which a subsequent evolution is performed. It should be noted that the number and form of the network devices and the base station devices in fig. 1 are only exemplary illustrations, and do not limit the embodiments of the present invention.
In a long term evolution communication system, to support cell synchronization, two downlink synchronization signals are defined: primary Synchronization Signal (PSS) and Secondary Synchronization Signal (SSS). For Time Division Duplexing (TDD) and Frequency Division Duplexing (FDD), the primary and secondary synchronization signals have the same structure, but differ in their time domain position in a Radio Frame (RF).
For a long term evolution communication system of frequency division duplex, a primary synchronization signal is transmitted on the last Orthogonal Frequency Division Multiplexing (OFDM) symbol of the 1 st slot (slot) of a subframe 0 and a subframe 5, and an auxiliary synchronization signal and the primary synchronization signal are transmitted on the same slot of the same subframe, but the auxiliary synchronization signal is located on the 2 nd from last orthogonal frequency division multiplexing symbol and is 1 OFDM symbol ahead of the primary synchronization signal. For a time division duplex long term evolution communication system, the primary synchronization signal is transmitted on the 3 rd orthogonal frequency division multiplexing symbol of the sub-frame 1 and the sub-frame 6, and the secondary synchronization signal is transmitted on the last 1 orthogonal frequency division multiplexing symbol of the sub-frame 0 and the sub-frame 5, 3 orthogonal frequency division multiplexing symbols ahead of the primary synchronization signal. The terminal equipment can identify a duplex mode of the LTE communication system according to the relative position relation of the primary synchronization signal and the secondary synchronization signal, and when the long-term evolution communication system uses the authorized spectrum, the terminal equipment receives the synchronization signal at the appointed position to obtain the physical layer cell Identity (Identity, ID) and realize wireless frame synchronization, thereby synchronizing with the cell.
In future NR communication systems, a new synchronization signal block structure is adopted. A synchronization signal block is used as a basic unit, a synchronization signal is composed of a plurality of orthogonal frequency division multiplexing symbols in a time domain, a PSS, a SSS and a physical broadcast signal (PBCH) are all transmitted in the synchronization signal block, one or more synchronization signal blocks form a synchronization signal burst (SS burst), and one or more synchronization signal bursts form a synchronization signal burst set (SS burst set), so that the application scene of high-frequency multi-beams can be supported. When the new air interface uses the authorized frequency spectrum, the synchronous signal in the wireless frame is located at the appointed position, and the terminal equipment receives the synchronous signal through the appointed position, so that the terminal equipment is synchronous with the cell.
The terminal device in the present application is a device with a wireless communication function, and may be a handheld device with a wireless communication function, an in-vehicle device, a wearable device, a computing device or other processing device connected to a wireless modem, and the like. The terminal devices in different networks may be called different names, for example: user equipment, access terminal, subscriber unit, subscriber station, mobile station, remote terminal, mobile device, user terminal, wireless communication device, user agent or user equipment, cellular telephone, cordless telephone, Session Initiation Protocol (SIP) telephone, Wireless Local Loop (WLL) station, Personal Digital Assistant (PDA), terminal equipment in a 5G network or future evolution network, and the like.
The network device in this application is a device deployed in a radio access network to provide wireless communication functions, including but not limited to: a base station (e.g., a Base Transceiver Station (BTS), a node B (NodeB, NB), an evolved node B (eNB or eNodeB), a transmission node or a transmission reception point (TRP or TP) or a next generation node B (gNB) in an NR system, a base station or a network device in a future communication network), a relay station, an access point, a vehicle-mounted device, a wearable device, a Wireless-Fidelity (Wi-Fi) station, a Wireless backhaul node, a small station, a micro station, and so on.
Referring to fig. 2a, fig. 2a is a schematic flowchart of a transmission method of a synchronization signal block index according to an embodiment of the present invention, where the method includes:
s201, the network equipment determines r synchronous signals in m synchronous signal blocks according to the occupation time of the unlicensed spectrum channel
Specifically, the preset duration is a time interval, and the start time, the duration time, and the end time of the preset duration may be configured in advance, for example: the duration of the preset duration is 5ms, and the preset duration occurs periodically. m is the maximum number of the synchronization signal blocks included in the preset time duration, that is, the preset time duration includes m synchronization signal blocks at most. m is related to the currently used subcarrier spacing k, the m synchronization signal blocks include p synchronization signal blocks of the subcarrier spacing k under the authorized spectrum channel, and the number s of time slots contained in the preset time duration is related to the subcarrier spacing k.
For example: a distribution diagram of 4 synchronization signal blocks at a subcarrier interval of 15kHz, where in fig. 2b, a preset duration is 5ms, the preset duration includes 5 slots (slots), each slot includes 14 symbols, each synchronization signal block corresponds to 4 symbols, and the 4 synchronization signal blocks are located at the 2 nd symbol to the 5 th symbol and the 8 th symbol to the 11 th symbol of the first two slots, respectively; the sync signal block indexes of the 4 sync signal blocks are denoted by SSB # 0, SSB # 1, SSB #2, and SSB #3, respectively.
The network equipment monitors the state of the unlicensed spectrum channel within a preset time length, determines a transmission time window on the unlicensed spectrum channel when the unlicensed spectrum channel is monitored to be idle, and then determines complete r synchronous signal blocks in the transmission time window.
In one possible embodiment, the value of m is related to the current subcarrier spacing.
For example: adjacent two synchronous signal blocks in the m synchronous signal blocks are not overlapped, the preset time length is 5ms, the subcarrier interval k is 15kHz, the time slot number s of the preset time length is 5, the number p of the synchronous signal blocks under the authorized spectrum channel is 4, and m is 16; or
The preset time length is 5ms, the subcarrier interval k is 15kHz, the time slot number s of the preset time length is 5, the number p of the synchronous signal blocks under the authorized spectrum channel is 8, and m is 15; or
The preset time length is 5ms, the subcarrier interval k is 30kHz, the time slot number s of the preset time length is 10, the number p of the synchronous signal blocks under the authorized spectrum channel is 4, and m is 33; or
The preset time length is 5ms, the subcarrier interval k is 30kHz, the time slot number s of the preset time length is 10, the number p of synchronous signal frequency domain resources under an authorized spectrum channel is 8, and m is 32; or
The preset time length is 5ms, the subcarrier interval k is 30kHz, the time slot number s of the preset time length is 10, the number p of the synchronous signal blocks under the authorized spectrum channel is 4, and m is 35; or
The preset time length is 5ms, the subcarrier interval k is 30kHz, the time slot number s of the preset time length is 10, the number p of synchronous signal frequency domain resources under an authorized spectrum channel is 8, and m is 34; or
The preset time length is 5ms, the subcarrier interval k is 120kHz, the time slot number s of the preset time length is 40, the number p of synchronous signal frequency domain resources under the authorized frequency spectrum is 64, and m is 140; or
The preset time length is 5ms, the subcarrier interval k is 240kHz, the time slot number s of the preset time length is 80, the number p of the synchronization signal blocks under the authorized frequency spectrum is 64, and m is 280.
S202, the network equipment determines a synchronous signal block index according to the time domain position of the designated downlink signal in the r synchronous signal blocks.
Specifically, the synchronization signal blocks with the same time domain position of the designated downlink signal have the same synchronization signal block index, and if the time domain positions of the designated downlink signals in the plurality of synchronization signal blocks are the same, the plurality of synchronization signal blocks have the same synchronization signal block index. And designating the downlink signals as PSS or SSS.
For example: referring to fig. 2b, in the unlicensed spectrum and at 15kHz of the subcarrier, the preset duration is 5ms, and 4 synchronization signal blocks are included in 5ms, where the preset duration includes 5 slots, and each slot includes 14 symbols. And 4 synchronous signal blocks in the preset time length are positioned at symbols 2-5 and symbols 8-11 of the two previous time slots. The distribution of the slot positions of the synchronization signal blocks in only one slot is shown in fig. 2 b.
a. When a synchronization signal block index (SSB index) is determined with a symbol position of the PSS, synchronization signal blocks having the same symbol position of the PSS have the same synchronization signal block index. Then the position of PSS in the sync block with SSB index of 0 is fixed, PSS is located at symbol 2 in fig. 2b, and for this SSB index of 0, the time domain position of the following new sync block is obtained by cyclic shift:
1. symbols 0-3 are sent in sequence: SSS, PBCH, PSS, PBCH. The SSS symbol also has 12 RBs in the middle for transmitting SSS and 4 RBs on both sides for transmitting PBCH.
2. Symbols 1-4 are sent in sequence: PBCH, PSS, PBCH, SSS.
Two new sync signal blocks are added to 1 and 2, and the SSB index of the two new sync signal blocks is also 0.
b. And determining the SSB index according to the symbol position of the SSS, wherein the synchronous signal blocks with the same symbol position of the SSS have the same SSB index. Then the SSS position in the synchronization signal block with SSB index of 0 is fixed and the SSS symbol position is at symbol 4 in fig. 2 b. For the SSB index of 0, the time domain position of the newly added sync signal block is obtained by cyclic shift:
1. symbols 1-4 are sent separately: PBCH, PSS, PBCH, SSS.
2. Symbols 3-6 send PBCH, SSS, PBCH, PSS
3. Symbol 4 ~ 7 sends SSS, PBCH, PSS, PBCH
Three kinds of sync signal blocks 1 to 3 are added above, and the SSB index of the three sync signal blocks is also 0.
After the newly added synchronous signal block, the network device monitors the channel state before the first synchronous signal block, and if the channel is monitored to be in an idle state, the network device sends the synchronous signal block closest to the moment when the channel is monitored to be idle. For example: when the network equipment monitors that an unauthorized frequency spectrum channel is idle before a first synchronous signal block, a synchronous signal is sent on the first synchronous signal block; and if the unauthorized spectrum channel is monitored to be in an idle state at the middle position of the first synchronous signal block, sending a synchronous signal on the second synchronous signal block.
In one possible embodiment, the maximum number of synchronization signals transmitted within a preset duration (e.g., 5ms) may also give a limit, such as: transmitting 4 synchronous signals at most in a preset time length below 3 GHz; transmitting 8 synchronous signals within a preset time length between 3GHz and 6GHz at most; and transmitting 64 synchronous signals within a preset time length above 6GHz at most.
In one possible implementation, when the synchronization signal blocks are consecutive and the channel conditions are the same (e.g., the same transmission beam), multiple consecutive synchronization signals can be transmitted on multiple consecutive synchronization signal blocks only when the unlicensed spectrum channel is monitored to be idle before the first synchronization signal block in the multiple consecutive synchronization signal blocks. When the synchronization signal blocks are not continuous or the channel conditions are different (such as different transmission beams), each synchronization signal block needs to listen to the unlicensed spectrum channel again before being in an idle state.
S203, the network equipment sends r synchronous signals carrying synchronous signal block indexes to the terminal equipment, and the terminal equipment receives the r synchronous signals from the network equipment.
Specifically, each synchronization signal carries a synchronization signal block index, such as: referring to fig. 2b, the synchronization signal transmitted on SSB # 0 carries a synchronization signal block index of 0.
S204, the terminal equipment determines the time domain position of the synchronous signal block according to the synchronous signal block index.
Specifically, the terminal device prestores or preconfigures a mapping relationship between a synchronization signal block index and a time domain position, and the terminal device determines the time domain position of a synchronization signal block that sends the synchronization signal according to the synchronization signal block index carried in the synchronization signal and the arrangement mode of downlink signals in the synchronization signal block.
For example: when a synchronization signal block index (SSB index) is determined with a symbol position of the PSS, synchronization signal blocks having the same symbol position of the PSS have the same synchronization signal block index. The terminal equipment determines that the synchronous signal block index carried by the synchronous signal is 0, and the arrangement mode of the downlink signals in the synchronous signal block is as follows: SSS, PBCH, PSS, PBCH, and the terminal device may know that the synchronization signal block transmitting the synchronization signal is located from symbol 0 to symbol 3 of slot 0 of the preset duration.
In the embodiment of the invention, one or more synchronous signal blocks are newly added on the basis of p synchronous signal blocks of the existing unlicensed spectrum channel, and the synchronous signal blocks with the same time domain position of the specified downlink signal have the same synchronous signal block index, so that the sending opportunity of the synchronous signal can be increased, and the overhead of sending the synchronous signal block index can be reduced.
Fig. 2a illustrates a transmission method of a synchronization signal block index according to an embodiment of the present application in detail.
Referring to fig. 3, fig. 3 is a schematic structural diagram of an apparatus according to an embodiment of the present invention, where the apparatus 3 may include a processing unit 301 and a sending unit 302.
A processing unit 301, configured to determine r synchronization signal blocks from m synchronization signal blocks according to an occupation time of an unlicensed spectrum channel; the method comprises the steps that m is the maximum number of synchronous signal blocks included in a preset time length, m synchronous signal blocks include p synchronous signal blocks under an authorized spectrum channel, m-p synchronous signal blocks are obtained by carrying out cyclic shift on downlink signals in the synchronous signal blocks, p is smaller than m, r is smaller than m, and r, m and p are integers larger than 0.
The processing unit 301 is further configured to determine a synchronization signal block index according to a position of a specified downlink signal in the r synchronization signal blocks; and the synchronous signal blocks with the same time domain position of the specified downlink signal have the same synchronous signal block index.
And the sending unit is used for sending r synchronous signals carrying synchronous signal block indexes to the terminal equipment on the r synchronous signal blocks.
In one possible embodiment, the designated downlink signal is SSS or PSS.
In a possible embodiment, the value of m is related to the current subcarrier spacing.
In one possible embodiment, there is an overlap or no overlap between two adjacent synchronization signal blocks of the m synchronization signal blocks.
The device 3 may be a network device, and the device 3 may also be a field-programmable gate array (FPGA), an application-specific integrated chip (asic), a system on chip (SoC), a Central Processing Unit (CPU), a Network Processor (NP), a digital signal processing circuit, a Micro Controller Unit (MCU), or a Programmable Logic Device (PLD) or other integrated chips.
The embodiment of the present invention and the embodiment of the method in fig. 2a are based on the same concept, and the technical effects brought by the embodiment of the present invention are also the same, and the specific process can refer to the description of the embodiment of the method in fig. 2a, and will not be described again here.
Referring to fig. 4, fig. 4 is a schematic structural diagram of an apparatus according to an embodiment of the present invention, where the apparatus 4 may include a receiving unit 401 and a processing unit 402.
A receiving unit 401, configured to receive r synchronization signals carrying synchronization signal block indexes, sent on r synchronization signal blocks from a network device; the preset time length comprises m synchronous signal blocks, the m synchronous signal blocks comprise r synchronous signal blocks, synchronous signal blocks with the same time domain position of the specified downlink signal have the same synchronous signal block index, the m synchronous signal blocks comprise p synchronous signal blocks under an authorized spectrum channel, m-p synchronous signal blocks are obtained by circularly shifting the downlink signal in the synchronous signal blocks, p is less than m, r is less than m, and r, m and p are integers more than 0.
A processing unit 402, configured to determine a time domain position of the synchronization signal block according to the synchronization signal block index and the downlink synchronization time.
In a possible implementation, the designated downlink signal is a primary synchronization signal SSS or a secondary synchronization signal PSS.
In a possible embodiment, the value of m is related to the current subcarrier spacing.
In one possible embodiment, there is an overlap or no overlap between two adjacent synchronization signal blocks of the m synchronization signal blocks.
The device 4 may be a terminal device, and the device 4 may also be a field-programmable gate array (FPGA), an application-specific integrated chip (asic), a system on chip (SoC), a Central Processing Unit (CPU), a Network Processor (NP), a digital signal processing circuit, a Micro Controller Unit (MCU), or a Programmable Logic Device (PLD) or other integrated chips.
The embodiment of the present invention and the embodiment of the method in fig. 2a are based on the same concept, and the technical effects brought by the embodiment of the present invention are also the same, and the specific process can refer to the description of the embodiment of the method in fig. 2a, and will not be described again here.
Fig. 5 is a schematic structural diagram of an apparatus according to an embodiment of the present invention, which is hereinafter referred to as an apparatus 5, where the apparatus 5 may be integrated in the foregoing transmitting device or receiving device, as shown in fig. 5, the apparatus includes: memory 502, processor 501, transmitter 504, and receiver 503.
The memory 502 may be a separate physical unit, which may be connected to the processor 501, the transmitter 504 and the receiver 503 by a bus. The memory 502, the processor 501, the transmitter 504, and the receiver 501 may also be integrated, implemented in hardware, etc.
The memory 502 is used for storing a program for implementing the above method embodiment, or various modules of the apparatus embodiment, and the processor 901 calls the program to perform the operations of the above method embodiment.
Alternatively, when part or all of the transmission method of the synchronization signal block index of the above embodiment is implemented by software, the apparatus may also include only a processor. The memory for storing the program is located outside the device and the processor is connected to the memory by means of circuits/wires for reading and executing the program stored in the memory.
The processor may be a Central Processing Unit (CPU), a Network Processor (NP), or a combination of a CPU and an NP.
The processor may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a Programmable Logic Device (PLD), or a combination thereof. The PLD may be a Complex Programmable Logic Device (CPLD), a field-programmable gate array (FPGA), a General Array Logic (GAL), or any combination thereof.
The memory may include volatile memory (volatile memory), such as random-access memory (RAM); the memory may also include a non-volatile memory (non-volatile memory), such as a flash memory (flash memory), a Hard Disk Drive (HDD) or a solid-state drive (SSD); the memory may also comprise a combination of memories of the kind described above.
In the above embodiments, the transmitting unit or the transmitter performs the steps transmitted by the above respective method embodiments, the receiving unit or the receiver performs the steps received by the above respective method embodiments, and other steps are performed by other modules or processors. The transmitting unit and the receiving unit may constitute a transceiving unit, and the receiver and the transmitter may constitute a transceiver.
The embodiment of the present application further provides a computer storage medium, which stores a computer program, where the computer program is used to execute the transmission method of the synchronization signal block index provided in the foregoing embodiment.
The embodiment of the present application further provides a computer program product containing instructions, which when run on a computer, causes the computer to execute the transmission method of the synchronization signal provided by the above embodiment.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Claims (16)
1. A method for transmitting an index of a synchronization signal block, comprising:
the network equipment determines r synchronous signal blocks in the m synchronous signal blocks according to the occupied time of the unlicensed spectrum channel; the method comprises the steps that m is the maximum number of synchronous signal blocks included in a preset time length, m synchronous signal blocks include p synchronous signal blocks under an authorized spectrum channel, m-p synchronous signal blocks are obtained by carrying out cyclic shift on downlink signals in the synchronous signal blocks, p is smaller than m, r is smaller than m, and r, m and p are integers larger than 0;
the network equipment determines a synchronous signal block index according to the position of a specified downlink signal in the r synchronous signal blocks; wherein, the synchronous signal blocks with the same time domain position of the specified downlink signal have the same synchronous signal block index;
and the network equipment sends r synchronous signals carrying synchronous signal block indexes to the terminal equipment on the r synchronous signal blocks.
2. The method of claim 1, wherein the designated downlink signal is SSS or PSS.
3. The method of claim 1, wherein the value of m is related to a current subcarrier spacing.
4. The method according to any one of claims 1 to 3, wherein there is an overlap or non-overlap between two adjacent ones of the m synchronization signal blocks.
5. A method for transmitting an index of a synchronization signal block, comprising:
the terminal equipment receives r synchronous signals carrying synchronous signal block indexes, which are sent on r synchronous signal blocks from the network equipment; the preset time length comprises m synchronous signal blocks, the m synchronous signal blocks comprise the r synchronous signal blocks, the synchronous signal blocks with the same time domain position of the specified downlink signal have the same synchronous signal block index, the m synchronous signal blocks comprise p synchronous signal blocks under an authorized spectrum channel, m-p synchronous signal blocks are obtained by circularly shifting the downlink signal in the synchronous signal blocks, p is less than m and r is less than m, and r, m and p are integers more than 0;
and the terminal equipment determines the time domain position of the synchronous signal block according to the synchronous signal block index and the downlink synchronous time.
6. The method of claim 5, wherein the designated downlink signal is a primary synchronization signal (SSS) or a secondary synchronization signal (PSS).
7. The method of claim 5, wherein the value of m is related to a current subcarrier spacing.
8. The method according to any one of claims 5 to 7, wherein there is an overlap or non-overlap between two adjacent ones of the m synchronization signal blocks.
9. An apparatus for transmitting an index of a synchronization signal block, comprising:
the processing unit is used for determining r synchronous signal blocks in the m synchronous signal blocks according to the occupied time of the unlicensed spectrum channel; the method comprises the steps that m is the maximum number of synchronous signal blocks included in a preset time length, m synchronous signal blocks include p synchronous signal blocks under an authorized spectrum channel, m-p synchronous signal blocks are obtained by carrying out cyclic shift on downlink signals in the synchronous signal blocks, p is smaller than m, r is smaller than m, and r, m and p are integers larger than 0;
the processing unit is further configured to determine a synchronization signal block index according to a position of a specified downlink signal in the r synchronization signal blocks; wherein, the synchronous signal blocks with the same time domain position of the specified downlink signal have the same synchronous signal block index;
and the sending unit is used for sending r synchronous signals carrying synchronous signal block indexes to the terminal equipment on the r synchronous signal blocks.
10. The apparatus of claim 9, wherein the designated downlink signal is SSS or PSS.
11. The apparatus of claim 9, wherein the value of m is related to a current subcarrier spacing.
12. The apparatus according to any one of claims 9 to 11, wherein there is an overlap or non-overlap between two adjacent ones of the m synchronization signal blocks.
13. An apparatus for transmitting an index of a synchronization signal block, comprising:
a receiving unit, configured to receive r synchronization signals carrying synchronization signal block indexes, sent on r synchronization signal blocks from a network device; the preset time length comprises m synchronous signal blocks, the m synchronous signal blocks comprise the r synchronous signal blocks, the synchronous signal blocks with the same time domain position of the specified downlink signal have the same synchronous signal block index, the m synchronous signal blocks comprise p synchronous signal blocks under an authorized spectrum channel, m-p synchronous signal blocks are obtained by circularly shifting the downlink signal in the synchronous signal blocks, p is less than m and r is less than m, and r, m and p are integers more than 0;
and the processing unit is used for determining the time domain position of the synchronous signal block according to the synchronous signal block index and the downlink synchronous time.
14. The apparatus of claim 13, wherein the designated downlink signal is a primary synchronization signal (SSS) or a secondary synchronization signal (PSS).
15. The apparatus of claim 13, wherein the value of m is related to a current subcarrier spacing.
16. The apparatus according to any one of claims 13 to 15, wherein there is an overlap or no overlap between two adjacent ones of the m synchronization signal blocks.
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| CN110035028B (en) * | 2019-03-29 | 2020-02-21 | 宇龙计算机通信科技(深圳)有限公司 | Synchronous signal transmission method and device based on unauthorized frequency spectrum and storage medium |
| WO2020252650A1 (en) * | 2019-06-18 | 2020-12-24 | Qualcomm Incorporated | Synchronization signal block (ssb) design for hierarchical coverage |
| CN111294950B (en) * | 2019-07-25 | 2023-04-07 | 北京紫光展锐通信技术有限公司 | Method and device for sending synchronization signal block and determining time slot position |
| CN110460411B (en) * | 2019-08-09 | 2021-12-14 | 北京紫光展锐通信技术有限公司 | PBCH (physical broadcast channel) repeated sending and receiving method and device, storage medium, base station and user equipment |
| CN114900883A (en) * | 2019-12-12 | 2022-08-12 | 展讯通信（上海）有限公司 | Method and device for processing candidate synchronous signal block |
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